Roland Scheidegger [Fri, 7 Jun 2013 19:20:01 +0000 (21:20 +0200)]
gallivm: work around slow code generated for interleaving 128bit vectors
We use 128bit vector interleave for untwiddling in the blend code (with
256bit vectors). llvm generates terrible code for this for some reason,
so instead of generating a shuffle for 2 128bit vectors use a
extract/insert shuffle instead (it only seems to matter we're not using
128bit wide vectors for the shuffle). This decreases instruction count of
the blend code generated for a rgba8 render target without blending from
169 to 113 with llvm 3.1 and from 136 to 114 in llvm 3.2/3.3, and I got
a ~8% (llvm 3.1) and ~5% (3.2/3.3) performance improvement in gears.
(The generated code is still not terribly good as we could actually avoid
the interleaving completely but llvm can't know this.)
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
José Fonseca [Sat, 8 Jun 2013 07:55:06 +0000 (08:55 +0100)]
scons: Fix implicit python dependency discovery on Windows.
Probably due to CRLF endings, the discovery of python import statements
was not working on Windows builds, causing incremental builds to often
fail unless one wiped out the build directory.
NOTE: This is a candidate for stable branches.
Stéphane Marchesin [Sat, 11 May 2013 01:30:46 +0000 (18:30 -0700)]
st/xlib: Flush the front buffer before doing CopySubBuffer
We flush pending rendering before running CopySubBuffer, which
ensures that the right bits get to the screen.
NOTE: This is a candidate for stable release branches.
Reviewed-by: Brian Paul <brianp@vmware.com>
Stéphane Marchesin [Sat, 11 May 2013 01:29:52 +0000 (18:29 -0700)]
st/xlib: Fix upside down coordinates for CopySubBuffer
The coordinates need to be inverted between glX and gallium.
NOTE: This is a candidate for stable release branches.
Reviewed-by: Brian Paul <brianp@vmware.com>
Eric Anholt [Thu, 6 Jun 2013 18:13:02 +0000 (11:13 -0700)]
mesa: Report core FBO incompleteness cases through GL_ARB_debug_output.
Just like we produce from inside the Intel driver, this can help provide
information quickly about FBO incompatibility problems (particularly when
using apitrace replay).
Currently, in driver-marked incompleteness cases, you'll get both the
driver message and the core message on Intel. Until the other drivers are
fixed to produce output, I think this is better than not putting in a
message for driver-marked incomplete.
Reviewed-by: Brian Paul <brianp@vmware.com>
Paul Berry [Fri, 31 May 2013 16:45:49 +0000 (09:45 -0700)]
intel: flush fake front buffer if server is about to destroy it.
Fixes piglit test "spec/!OpenGL 1.0/gl-1.0-front-invalidate-back"
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Paul Berry [Wed, 29 May 2013 16:48:26 +0000 (09:48 -0700)]
intel: flush fake front buffer more robustly.
When a fake front buffer is in use, if we request the front buffer
(using screen->dri2.loader->getBuffersWithFormat()), the X server
copies the real front buffer to the fake front buffer and returns the
fake front buffer. We sometimes make redundant requests for the front
buffer (due to using a single counter to track invalidates for both
the front and back buffers), so there's a danger of pending front
buffer rendering getting overwritten when the redundant front buffer
request occurs.
Previous to this patch, intel_update_renderbuffers() worked around
that problem by sometimes doing intel_flush() and intel_flush_front()
before calling intel_query_dri2_buffers(). But it only did the
workaround when the front buffer was bound for drawing; it didn't do
it when the front buffer was bound for reading.
This patch moves the workaround code to intel_query_dri2_buffers(), so
that it happens in exactly the circumstances where it is needed.
This should fix some of the sporadic failures in Piglit tests
fbo-sys-blit and fbo-sys-sub-blit.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Paul Berry [Thu, 30 May 2013 14:08:07 +0000 (07:08 -0700)]
intel: make intel_flush_front safe to call during initial MakeCurrent
The patch that follows will fix a bug that prevents
intel_flush_front() from being called often enough. In doing so, it
will create a situation where intel_flush_front() is called during the
initial call to glXMakeCurrent(). In this circumstance,
ctx->DrawBuffer hasn't been initialized yet and is NULL. Fortunately,
intel->front_buffer_dirty is false, so intel_flush_front() doesn't
actually need to do anything. To avoid a segfault, swap the order of
terms in intel_flush_front()'s if statement.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Eric Anholt [Wed, 5 Jun 2013 21:46:19 +0000 (14:46 -0700)]
mesa: Expose MAX_FRAGMENT_INPUT_COMPONENTS on ES3 and desktop 3.2.
piglit OpenGL ES 3.0/minmax now passes. This was also one of the subcase
failures in OpenGL 3.2/minmax (and still is, because our value is too low
for 3.2, but at least we report what it is).
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 5 Jun 2013 21:37:36 +0000 (14:37 -0700)]
mesa: Expose texture array getters on GLES3.
Part of fixing piglit OpenGL ES 3.0/minmax.
v2: s/_gles3/_es3/ in extra name, for consistency (review by Matt).
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
Eric Anholt [Wed, 5 Jun 2013 23:20:18 +0000 (16:20 -0700)]
mesa: Fix the return value of TEXTURE_BINDING_2D_ARRAY.
Noticed by inspection when reviewing the next commit.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Wed, 5 Jun 2013 21:27:34 +0000 (14:27 -0700)]
mesa: Expose texel offset limits in GLES3.
Part of fixing piglit OpenGL ES 3.0/minmax.
v2: s/_gles3/_es3/ in extra name, for consistency (review by Matt).
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v1)
Roland Scheidegger [Fri, 7 Jun 2013 19:12:22 +0000 (21:12 +0200)]
util: add comment about bogus transfer flags
Roland Scheidegger [Fri, 7 Jun 2013 19:10:59 +0000 (21:10 +0200)]
util: fix util_clear_render_target and util_clear_depth_stencil layer handling
These functions must clear all bound layers, not just the first.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Fri, 7 Jun 2013 00:27:49 +0000 (02:27 +0200)]
llvmpipe: move create_surface/destroy_surface functions to lp_surface.c
Believe it or not but these two are actually the first two functions which
really belong in this file nowadays.
Reviewed-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Fri, 7 Jun 2013 19:03:40 +0000 (21:03 +0200)]
llvmpipe: add support for layered rendering
Mostly just make sure the layer parameter gets passed through to the right
places (and get clamped, can do this at setup time), fix up clears to
clear all layers and disable opaque optimization. Luckily don't need to
touch the jitted code.
(Clears invoked via pipe's clear_render_target method will not work however
since the pipe_util_clear function used for it doesn't handle clearing
multiple layers yet.)
v2: per Brian's suggestion, prettify var initialization and add some comments,
add assertion for impossible layer specification for surface.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Fri, 7 Jun 2013 18:54:54 +0000 (20:54 +0200)]
gallium/docs: fix up transfer description for 1d arrays, add cube map arrays
Transfers always use z/depth for layers no matter if it's a 1d or 2d array
texture, we don't follow OpenGL's crazyness there. Luckily this appears to
only be a doc bug, everyone doing the right thing already.
While here also document z/depth parameter for cube map arrays.
v2: fix typo spotted by Eric Anholt
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Chia-I Wu [Fri, 7 Jun 2013 07:10:19 +0000 (15:10 +0800)]
ilo: fix textureSize() for single-layered array textures
We returned 0 instead of 1 for the number of layers when the array texutre is
single-layered. This fixed it on GEN7+.
Chia-I Wu [Fri, 7 Jun 2013 06:52:48 +0000 (14:52 +0800)]
util: add util_resource_is_array_texture()
Checking if array_size is greater than 1 is not enough for single-layered
array textures.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Brian Paul [Fri, 7 Jun 2013 16:12:28 +0000 (10:12 -0600)]
docs: update some environment variable info
Drop the GALLIUM_NOSSE/PPC env vars, added ST_DEBUG and some of the
VMware SVGA driver env vars.
Arnas Milasevicius [Thu, 6 Jun 2013 22:21:19 +0000 (01:21 +0300)]
gallium: Remove draw_arrays() and draw_arrays_instanced() functions
Moved draw_arrays() to st_draw_feedback.c and removed draw_arrays_instanced().
draw_arrays() was used by nobody else. Now there's just one "draw" entrypoint
into the draw module.
Signed-off-by: Brian Paul <brianp@vmware.com>
Brian Paul [Thu, 6 Jun 2013 15:46:40 +0000 (09:46 -0600)]
tgsi: replace tgsi_file_names tgsi_file_names[] with tgsi_file_name() function
This change came from the discovery that the STATIC_ASSERT to check that
the number of register file strings didn't actually work.
Similar changes could be made for the other string arrays in tgsi_string.c
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Chia-I Wu [Tue, 4 Jun 2013 08:39:07 +0000 (16:39 +0800)]
u_vbuf: fix index buffer leak
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
Chris Forbes [Mon, 20 May 2013 10:10:29 +0000 (22:10 +1200)]
i965/vs: add support for emitting gl_ClipVertex
Removes the special-case suppression of gl_ClipVertex in the VUE map.
Also calculate vertex outcodes for user clip planes based on
gl_ClipVertex if written; otherwise gl_Position.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Forbes [Mon, 20 May 2013 09:51:43 +0000 (21:51 +1200)]
i965/clip: Add support for gl_ClipVertex
When clipping triangles against a user clip plane, and gl_ClipVertex
is provided in the vertex, use it instead of hpos.
TODO: A similar change should be made at some point for line clipping.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chia-I Wu [Fri, 7 Jun 2013 05:39:41 +0000 (13:39 +0800)]
ilo: advertise PIPE_CAP_CUBE_MAP_ARRAY
It was supported but not advertised. Also remove TODO tag for
PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT, as it is not a TODO.
Chia-I Wu [Fri, 7 Jun 2013 06:18:59 +0000 (14:18 +0800)]
ilo: add support for TEX2/TXB2/TXL2 in fs
They were already supported, just being rejected in the TGSI translator.
Vinson Lee [Fri, 24 May 2013 06:48:28 +0000 (23:48 -0700)]
glsl linker: Initialize member variable interface_namespace.
Fixes "Uninitialized pointer field" defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chia-I Wu [Fri, 7 Jun 2013 05:11:49 +0000 (13:11 +0800)]
ilo: use slab allocator for transfers
Slab allocator is perfect for transfer. Improved OpenArena performance by 1%
with several casual runs.
Chia-I Wu [Tue, 4 Jun 2013 08:20:05 +0000 (16:20 +0800)]
ilo: clean up states upon context destroy
We need to unreference resources that we referenced.
Chia-I Wu [Tue, 4 Jun 2013 05:25:38 +0000 (13:25 +0800)]
ilo: unmap cp bo before destroying it
The BOs are mapped in their entire life times for the chipsets we support so
do not forget to unmap it.
Chia-I Wu [Wed, 5 Jun 2013 18:41:21 +0000 (02:41 +0800)]
ilo: enable bo reuse
This magical line of code must have got lost at some point in the history...
Chia-I Wu [Wed, 5 Jun 2013 04:04:46 +0000 (12:04 +0800)]
ilo: construct 3DSTATE_SF in create_rasterizer_state()
Add ilo_rasterizer_sf and initialize it in create_rasterizer_state().
Chia-I Wu [Tue, 4 Jun 2013 10:37:23 +0000 (18:37 +0800)]
ilo: construct 3DSTATE_CLIP in create_rasterizer_state()
Add ilo_rasterizer_clip and initialize it in create_rasterizer_state().
Chia-I Wu [Mon, 3 Jun 2013 07:34:13 +0000 (15:34 +0800)]
ilo: use emit_SURFACE_STATE() for render targets
Introduce ilo_surface_cso and initialize it in create_surface(). With the
change, we can emit SURFACE_STATE directly from the CSO and remove
emit_surf_SURFACE_STATE(). We do not deal with depth/stencil surfaces yet.
Chia-I Wu [Mon, 3 Jun 2013 07:25:48 +0000 (15:25 +0800)]
ilo: use emit_SURFACE_STATE() for constant buffers
Introduce ilo_cbuf_cso and initialize it in set_constant_buffer(). As
ilo_view_surface is embedded in ilo_cbuf_cso, switch to emit_SURFACE_STATE()
for constant buffers and remove emit_cbuf_SURFACE_STATE().
Chia-I Wu [Thu, 6 Jun 2013 03:28:02 +0000 (11:28 +0800)]
ilo: add emit_SURFACE_STATE() for sampler views
Introduce ilo_view_cso and initialize it in create_sampler_view(). Add
emit_SURFACE_STATE() to GPE, which can emit SURFACE_STATE from
ilo_view_surface.
Chia-I Wu [Thu, 6 Jun 2013 03:16:13 +0000 (11:16 +0800)]
ilo: add ilo_view_surface for SURFACE_STATE
Define struct ilo_view_surface for SURFACE_STATE construction and emission.
Courtney Goeltzenleuchter [Fri, 31 May 2013 19:43:11 +0000 (13:43 -0600)]
ilo: convert generic depth-stencil-alpha pipe state to ilo pipe state
Moving the work to create time reduces the work at emit time.
Saves time overall as create work is only done once.
Fix compiler warning in gen7_pipeline_sol.
[olv: remember pipe_alpha_state instead of pipe_depth_stencil_alpha_state in
ilo_dsa_state]
Chia-I Wu [Fri, 31 May 2013 18:00:55 +0000 (02:00 +0800)]
ilo: introduce vertex element CSO
Introduce ilo_ve_cso and initialize it in create_vertex_elements_state().
This commit goes a step further by setting up mappings from HW VB to PIPE VB,
which we failed to do previously. That allows us to support instanced
rendering.
Chia-I Wu [Mon, 3 Jun 2013 04:35:01 +0000 (12:35 +0800)]
ilo: simplify emit_3DSTATE_DEPTH_BUFFER()
Remove hiz and dsa from the parameters. We would know whether HiZ buffer
exists from ilo_texture once it is supported. DSA state should not affect
3DSTATE_DEPTH_BUFFER.
Chia-I Wu [Fri, 31 May 2013 08:11:38 +0000 (16:11 +0800)]
ilo: introduce blend CSO
Introduce ilo_blend_cso and initialize it in create_blend_state(). This saves
us from having to construct hardware blend states in draw_vbo().
Chia-I Wu [Fri, 31 May 2013 03:52:47 +0000 (11:52 +0800)]
ilo: introduce sampler CSO
Introduce ilo_sampler_cso and initialize it in create_sampler_state(). This
saves us from having to perform CPU-intensive calculations to construct
hardware sampler states in draw_vbo().
Chia-I Wu [Thu, 30 May 2013 11:48:32 +0000 (19:48 +0800)]
ilo: construct SCISSOR_RECT in set_scissor_states()
This allows us to memcpy() the state in draw_vbo(). Add ilo_init_states() and
ilo_cleanup_states() that are called when contexts are created and destroyed
respectively, and properly set the initial scissor state in ilo_init_states().
Chia-I Wu [Thu, 30 May 2013 06:37:49 +0000 (14:37 +0800)]
ilo: introduce viewport CSO
Introduce ilo_viewport_cso and initialize it in set_viewport_states(). This
saves us from having to perform CPU-intensive calculations to construct
hardware viewport states in draw_vbo().
Chia-I Wu [Wed, 29 May 2013 07:43:38 +0000 (15:43 +0800)]
ilo: switch to ilo states for shaders and resources
Define and use
struct ilo_sampler_state;
struct ilo_view_state;
struct ilo_cbuf_state;
struct ilo_resource_state;
struct ilo_global_binding;
in ilo_context.
Chia-I Wu [Wed, 29 May 2013 07:06:48 +0000 (15:06 +0800)]
ilo: switch to ilo states for CC stage
Define and use
struct ilo_dsa_state;
struct ilo_blend_state;
struct ilo_fb_state;
in ilo_context.
Chia-I Wu [Wed, 29 May 2013 07:02:31 +0000 (15:02 +0800)]
ilo: switch to ilo states for WM stage
Define and use
struct ilo_rasterizer_state;
in ilo_context.
Chia-I Wu [Wed, 29 May 2013 06:42:13 +0000 (14:42 +0800)]
ilo: switch to ilo states for CLIP and SF stages
Define and use
struct ilo_viewport_state;
struct ilo_scissor_state;
in ilo_context.
Chia-I Wu [Wed, 29 May 2013 06:39:17 +0000 (14:39 +0800)]
ilo: switch to ilo states for SOL stage
Define and use
struct ilo_so_state;
in ilo_context.
Chia-I Wu [Wed, 29 May 2013 06:25:34 +0000 (14:25 +0800)]
ilo: switch to ilo states for VF stage
Define and use
struct ilo_vb_state;
struct ilo_ve_state;
struct ilo_ib_state;
in ilo_context.
Chia-I Wu [Mon, 27 May 2013 07:17:19 +0000 (15:17 +0800)]
ilo: move hardware limits to ilo_gpe.h
Roland Scheidegger [Thu, 6 Jun 2013 21:50:45 +0000 (23:50 +0200)]
draw: trivial fix comment typo
Roland Scheidegger [Thu, 6 Jun 2013 21:50:21 +0000 (23:50 +0200)]
gallium/tgsi: add missing string for layer semantic
Also report if a shader writes the layer semantic
Reviewed-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Thu, 6 Jun 2013 00:43:51 +0000 (02:43 +0200)]
llvmpipe: bump 3d and cube map limits to 2048 and 8192 respectively
These should just work, required by d3d10. Too large resources will
get thrown out separately anyway.
Reviewed-by: Brian Paul <brianp@vmware.com>
Eric Anholt [Thu, 23 May 2013 18:10:15 +0000 (11:10 -0700)]
glsl: Fix uniform buffer object counting.
We were counting uniforms located in UBOs against the default uniform
block limit, while not doing any counting against the specific combined
limit.
Note that I couldn't quite find justification for the way I did this, but
I think it's the only sensible thing: The spec talks about components, so
each "float" in a std140 block would count as 1 component and a "vec4"
would count as 4, though they occupy the same amount of space. Since GPU
limits on uniform buffer loads are surely going to be about the size of
the blocks, I just counted them that way.
Fixes link failures in piglit
arb_uniform_buffer_object/maxuniformblocksize when ported to geometry
shaders on Paul's GS branch, since in that case the max block size is
bigger than the default uniform block component limit.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Thu, 23 May 2013 17:14:37 +0000 (10:14 -0700)]
glsl: Make a local variable to avoid restating this array lookup.
v2: Convert another instance of the array lookup. (caught by Tapani)
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Wed, 5 Jun 2013 02:01:51 +0000 (19:01 -0700)]
intel: Use the CHIPSET macro in the PCI ID tables for the device name.
Putting the human readable device names directly in the PCI ID list
consolidates things in one place. It also makes it easy to customize
the name on a per-PCI ID basis without a huge code explosion.
Based on a patch by Kristian Høgsberg.
v2: Fix 830M/845G names and #undef CHIPSET (caught by Emit Velikov).
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Kenneth Graunke [Wed, 5 Jun 2013 01:41:53 +0000 (18:41 -0700)]
intel: Remove 'misc' parameter from CHIPSET macro in PCI ID tables.
This has never actually been used for anything.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Andreas Boll [Wed, 5 Jun 2013 08:43:10 +0000 (10:43 +0200)]
build: Use PACKAGE_VERSION from autoconf
Both variables had the same value.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Andreas Boll [Tue, 4 Jun 2013 18:39:13 +0000 (20:39 +0200)]
build: Unify PACKAGE_VERSION on autotools, scons and Android
This patch unifies mesa's PACKAGE_VERSION on autotools, scons and
Android build systems.
Current behaviour is:
- Autotools uses 9.2.0 as PACKAGE_VERSION
- Scons and Android use 9.2-devel as PACKAGE_VERSION
With this patch all three build systems use 9.2.0-devel as
PACKAGE_VERSION.
Reviewed-by: Brian Paul <brianp@vmware.com>
Jonathan Gray [Wed, 5 Jun 2013 05:00:33 +0000 (15:00 +1000)]
radeon/winsys: correct RADEON_GEM_WAIT_IDLE use
RADEON_GEM_WAIT_IDLE is declared DRM_IOW but mesa
uses it with drmCommandWriteRead instead of drmCommandWrite
which leads to the ioctl being unmatched and returning an
error on at least OpenBSD.
Problem originally noticed in libdrm by Mark Kettenis.
Dave Airlie pointed out that mesa has the same issue.
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Mike Stroyan [Mon, 18 Mar 2013 19:34:35 +0000 (13:34 -0600)]
configure.ac: Build dricommon for gallium swrast
When building dri-swrast, use gallium_check_st to set HAVE_COMMON_DRI.
Commit
07f2dee7 added setting of HAVE_COMMON_DRI in gallium_check_st.
But the dri-swrast case did not use gallium_check_st.
So dri/common was still not built.
v2: set HAVE_COMMON_DRI=yes instead of using gallium_check_st
NOTE: This is a candidate for the 9.1 branch.
(Depends on
7de78ce5 and
07f2dee)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61821
Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com>
Rodrigo Vivi [Mon, 13 May 2013 20:53:39 +0000 (17:53 -0300)]
i965: Adding more reserved PCI IDs for Haswell.
At DDX commit Chris mentioned the tendency we have of finding out more
PCI IDs only when users report. So Let's add all new reserved Haswell IDs.
NOTE: This is a candidate for stable branches.
Bugzilla: http://bugs.freedesktop.org/show_bug.cgi?id=63701
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Rico Schüller [Wed, 5 Jun 2013 14:54:14 +0000 (08:54 -0600)]
mesa: remove outdated version lines in comments
Signed-off-by: Brian Paul <brianp@vmware.com>
Richard Sandiford [Wed, 5 Jun 2013 08:26:29 +0000 (09:26 +0100)]
gallium: System z support
The main change is to use MCJIT rather than the old JIT, which will never
be supported for System z. The endianness part is by example since the
patch was tested on a glibc system.
Signed-off-by: Richard Sandiford <rsandifo@linux.vnet.ibm.com>
Signed-off-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Tue, 4 Jun 2013 01:20:55 +0000 (03:20 +0200)]
llvmpipe: improve alignment calculation for fetching/storing pixels
This was always doing per-pixel alignment which isn't necessary, except
for the buffer case (due to the per-element offset). The disabled code
for calculating it was incorrect because it assumed that always the full
block would be fetched, which may not be the case, so fix this up.
The original code failed for instance for r10g10b10a2 the alignment would
have been calculated as 4 (block_width) * 4 (bytes) so 16, but the actual
fetch may have only fetched 2 values at a time, hence only alignment 8 -
it is unclear what exactly would happen in this case (alignment larger
than size to fetch).
So just use the (already calculated) fetch size instead and get alignment
from that which should always work, no matter if fetching 1,2 or 4 pixels.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Tue, 4 Jun 2013 22:17:22 +0000 (00:17 +0200)]
llvmpipe: reduce alignment requirement for 1d resources from 4x4 to 4x1
For rendering to buffers, we cannot have any y alignment.
So make sure that tile clear commands only clear up to the fb width/height,
not more (do this for all resources actually as clearing more seems
pointless for other resources too). For the jit fs function, skip execution
of the lower half of the fragment shader for the 4x4 stamp completely,
for depth/stencil only load/store the values from the first row
(replace other row with undef).
For the blend function, also only load half the values from fs output,
replace the rest with undefs so that everything still operates on the
full 4x4 block to keep code the same between 4x1 and 4x4 (except for
load/store of course which also needs to skip (store) or replace these
values with undefs (load))., at the cost of slightly less optimal code
being produced in some cases.
Also reduce 1d and 1d array alignment too, because they can be handled the
same as buffers so don't need to waste memory.
v2: don't try to run special blend code for 4x1, (very) slightly less
complexity if we just use the same code as for 4x4 which may or may not
make it easier to optimize in the future (as we care a lot more about 4x4
performance than 1d).
v2: don't use undef values for unused fs src outputs with llvm 3.1 as it
apparently can trigger a bug in llvm.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Mon, 3 Jun 2013 14:01:05 +0000 (16:01 +0200)]
llvmpipe: cleanup of generate_unswizzled_blend
Some parameters were used inconsistently, for instance not using
block_width/block_height/block_size for deferring number of pixels
but rather relying on guesses from the number of fragment shaders etc,
so fix this up (no actual change in behavior since the block size stays
fixed). (Though most of the code would work with different block_height,
with three exceptions, one being the hacked r11g11b10 conversions and
twiddle code which only work with block_height 2 not 1, and the last
one being blend vector type not being 128bit wide.)
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Tue, 4 Jun 2013 22:11:45 +0000 (00:11 +0200)]
gallivm: enhance special sse2 4x4f and 2x8f -> 1x16ub conversion
There's no good reason why it can't handle 2x4f->1x8ub, 1x4f->1x4ub and
1x8f->1x8ub cases, there might be legitimate reasons why we don't have
enough input vectors for a full destination vector, and using pack
intrinsics should still be much better than using generic conversion
(it looks like convert_alpha from the blend code might hit this though
I suspect it could be avoided).
v2: add another test vector format to lp_test_conv so this gets tested.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Sat, 1 Jun 2013 18:55:17 +0000 (20:55 +0200)]
gallivm: (trivial) fix lp_build_concat_n
The code was designed to handle no-op concat but failed (unless the
caller was using same pointer for src and dst).
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Brian Paul [Tue, 4 Jun 2013 16:51:15 +0000 (09:51 -0700)]
mesa: change MAX_PROGRAM_ADDRESS_REGS to 1, clamp to it in state tracker
We've never properly supported more than one address register. There
isn't even a field in prog_src_register or prog_dst_register to indicate
which address register to use if RelAddr!=0.
In the state tracker, clamp MaxAddressRegs against MAX_PROGRAM_ADDRESS_REGS
since many gallium drivers do support more.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65226
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Paul Berry [Sun, 2 Jun 2013 23:25:03 +0000 (16:25 -0700)]
intel: Don't try to blorp or blit CopyTexSubImage(1D_ARRAY).
Blorp and the hardware blitter can't be used to implement
CopyTexSubImage when the image type is 1D_ARRAY, because of a
coordinate system mismatch (the Y coordinate in the source image is
supposed to be matched up to the Z coordinate in the destination
texture).
The hardware blitter path (intel_copy_texsubimage) contained a perf
debug warning for this case, but it failed to actually fall back. The
blorp path didn't even check.
Fixes piglit test "copyteximage 1D_ARRAY".
Reviewed-by: Eric Anholt <eric@anholt.net>
Paul Berry [Sun, 2 Jun 2013 21:31:46 +0000 (14:31 -0700)]
i965/gen6+: Fix multisample assertions in CopyTexSubImage hw blitter path.
Commit
045612c (intel: Add an assert for glCopyTexSubImage() being
called on MSAA buffers) added an assertion to intel_copy_texsubimage()
to make sure that multisampling was not in use, based on the
assumption that glCopyTexSubImage() can't legally be used with
multisampling.
However, there is one case where glCopyTexSubImage() can legally be
used with multisampling: when the source buffer is a multisampled
window system buffer. If the source and destination color formats
don't match, the blorp path will fail, so intel_copy_texsubimage()
will be called. In this case, we need intel_copy_texsubimage() to
return false so that we fall back to meta to do the copy. (The
multisampled source buffer won't cause a problem for the meta path,
because it uses glReadPixels, which forces a multisample resolve).
It's still safe to assert that the destination image is
single-sampled, because it's not legal to call glCopyTexSubImage() on
multisampled textures.
Fixes some failures with piglit tests "copyteximage
{1D,2D,CUBE,RECT,2D_ARRAY}" (with "samples=..." argument).
Reviewed-by: Eric Anholt <eric@anholt.net>
Vinson Lee [Mon, 3 Jun 2013 06:16:42 +0000 (23:16 -0700)]
mesa: Prevent possible out-of-bounds read by save_SamplerParameterfv.
Fixes "Out-of-bounds access" defect reported by Coverity.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Brian Paul <brianp@vmware.com>
Dave Airlie [Thu, 30 May 2013 10:21:56 +0000 (20:21 +1000)]
i965: fix problem with constant out of bounds access (v3)
Okay I now understand why Frank would want to run away, this is
my attempt at fixing the CVE out of bounds access to constants
outside the range. This attempt converts any illegal constants
to constant 0 as per the GL spec, and is undefined behaviour.
A future patch should add some debug for users to find this out,
but this needs to be backported to stable branches.
CVE-2013-1872
v2: drop the last hunk which was a separate fix (now in master).
hopefully fix the indentations.
v3: don't fail piglit, the whole 8/16 dispatch stuff was over
my head, and I spent a while figuring it out, but this one is
definitely safe, one piglit pass extra on my Ironlake.
NOTE: This is a candidate for stable branches.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Eric Anholt [Thu, 30 May 2013 21:20:04 +0000 (14:20 -0700)]
intel: Fix copying of separate stencil data in glCopyTexSubImage().
We were copying the source stencil data onto the destination depth data.
Fixes piglit copyteximage other than 1D_ARRAY.
v2: Fix unintentional dropping of the "don't double-copy for packed
depth/stencil" check. While blorp is only supported on separate
stencil hardware at the moment, hopefully that will change soon.
Review by Jordan.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Eric Anholt [Thu, 30 May 2013 17:06:49 +0000 (10:06 -0700)]
meta: Fix temporary image type for float depth/stencil.
Fixes assertion failure in piglit copyteximage.
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Eric Anholt [Thu, 30 May 2013 16:43:45 +0000 (09:43 -0700)]
intel: Fix performance regression from miptree blit changes.
When making v2 of
da2880bea05bfc87109477ab026a7f5401fc8f0c, I carefully
checked all of the calls in that commit to see that I'd updated them, but
forgot to update the new calls in the later commits such as
.
e845c5cf7abce55759501a473459aff3bf25c9ca. As a result, we were getting Y
tiled temporaries even though the whole point of the temporary was to
untile!
The steady state of the intro scene of lightsmark goes from 13 to 17 fps.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65154
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>
Carl Worth [Mon, 3 Jun 2013 19:49:10 +0000 (12:49 -0700)]
glcpp: Add test case for recently fixed loop-control underflow bug.
To trigger the bug, it suffices to have a line-continuation followed by
a newline and then a non-line-continuation backslash.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Carl Worth [Mon, 3 Jun 2013 18:35:43 +0000 (11:35 -0700)]
glcpp: Fix post-decrement underflow in loop-control variable
This loop-control condition with a post-decrement operator would lead to
an underflow of collapsed_newlines. This in turn would cause a subsequent
execution of the loop to labor inordinately trying to return the loop-control
variable to a value of 0 again.
Fix this by dis-intertwining the test and the decrement.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65112
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chad Versace [Tue, 28 May 2013 23:26:07 +0000 (16:26 -0700)]
i965: Fix glColorPointer(GL_FIXED)
When a gl_client_array is created with glColorPointer,
gl_client_array::Normalized is true. This caused the translation from the
gl_client_array's type to a BRW_SURFACEFORMAT to assertion fail.
Fixes the spinning cube's color in Android 4.2's ApiDemos.apk,
"Graphics > OpenGL ES".
Fixes assertion failure in mesa-demos/src/egl/opengles1/tri_x11 on Haswell
and Ivybridge:
brw_draw_upload.c:287: get_surface_type: Assertion `0' failed.
No Piglit regressions on Haswell.
Note: This is a candidate for the 9.1 branch.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42182
Issue: AXIA-2954
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Zack Rusin [Thu, 30 May 2013 21:01:19 +0000 (17:01 -0400)]
softpipe: draw_find_shader_output returns -1 on invalid outputs
It was changed from 0 to allow shader outputs at 0 that are
different from position.
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Tom Stellard [Tue, 14 May 2013 02:13:53 +0000 (22:13 -0400)]
radeonsi/compute: Upload work group, work item size in input buffer
Tom Stellard [Tue, 7 May 2013 02:11:39 +0000 (22:11 -0400)]
radeonsi/compute: Pass kernel arguments in a buffer v2
v2:
- Fix memory leak in si_set_constant_buffer()
Tom Stellard [Fri, 17 May 2013 21:02:25 +0000 (17:02 -0400)]
radeonsi/compute: Implement un-binding of global buffers
Tom Stellard [Tue, 21 May 2013 21:02:33 +0000 (17:02 -0400)]
radeonsi/compute: Support multiple kernels in a compute program
Tom Stellard [Tue, 14 May 2013 02:14:50 +0000 (22:14 -0400)]
radeonsi/compute: Add missing PIPE_COMPUTE caps
Jordan Justen [Fri, 19 Apr 2013 08:13:31 +0000 (01:13 -0700)]
i965 gen7: use SURFACE_STATE fields to select render level/layer
Rather than pointing the surface_state directly at a single
sub-image of the texture for rendering, we now point the
surface_state at the top level of the texture, and configure
the surface_state as needed based on this.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jordan Justen [Wed, 17 Apr 2013 23:30:59 +0000 (16:30 -0700)]
mesa/texformat: add _mesa_tex_target_is_array function
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jordan Justen [Fri, 19 Apr 2013 08:00:20 +0000 (01:00 -0700)]
intel: add layered parameter to update_renderbuffer_surface
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jordan Justen [Thu, 18 Apr 2013 21:18:09 +0000 (14:18 -0700)]
intel_fbo: set gl_renderbuffer Depth field
Set the renderbuffer's Depth field to match the texture's
Depth when rendering to a texture.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jordan Justen [Thu, 18 Apr 2013 20:40:56 +0000 (13:40 -0700)]
intel: print image depth in debug message
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Brian Paul [Mon, 3 Jun 2013 00:07:55 +0000 (18:07 -0600)]
mesa: handle missing read buffer in _mesa_get_color_read_format/type()
We were crashing when GL_READ_BUFFER == GL_NONE. Check for NULL
pointers and reorganize the code. The spec doesn't say which error
to generate in this situation, but NVIDIA raises GL_INVALID_OPERATION.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65173
NOTE: This is a candidate for the stable branches.
Tested-by: Vedran Rodic <vrodic@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Brian Paul [Mon, 3 Jun 2013 00:06:17 +0000 (18:06 -0600)]
meta: move vertex array enables for mipmap generation
Before, on the second call to GenerateMipmap we were enabling two
vertex arrays for the current vertex array object, rather than
the private generate-mipmap vertex array object. This caused
things to blow up elsewhere.
This patch moves the array enables into the block where the
generate-mipmap vertex array object is created, as we do in
the setup_ff_generate_mipmap() function.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=60518
NOTE: This is a candidate for the stable branches.
Tested-by: core13@gmx.net
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Mon, 3 Jun 2013 00:06:17 +0000 (18:06 -0600)]
mesa: fix hodge podge indentation, update comments in texformat.c
Roland Scheidegger [Sat, 1 Jun 2013 18:02:17 +0000 (20:02 +0200)]
gallium: add support for layered rendering
Since pipe_surface already has all the necessary fields no interface
changes are necessary except adding a new shader semantic value
(TGSI_SEMANTIC_LAYER).
(Note that what GL knows as "gl_Layer" variable d3d10 is naming
"RENDER_TARGET_ARRAY_INDEX".)
v2: drop cap bit (just tied to geometry shader), add docs.
Roland Scheidegger [Sat, 1 Jun 2013 00:17:09 +0000 (02:17 +0200)]
gallivm: fix out-of-bounds access with mirror_clamp_to_edge address mode
Surprising this bug survived so long, we were missing a clamp (in the
linear filtering version).
(Valgrind complained a lot about invalid reads with piglit texwrap,
I've also seen spurios failures in this test which might have
happened due to this. Valgrind probably didn't complain before the
alignment reduction in llvmpipe to 4x4 since the test is using tiny
textures so the reads were still always well within allocated area.)
While here, also do an effective clamp (after half subtraction)
of [0,length-0.5] instead of [0, length-1] which saves an instruction
(the filtering weight could be different due to this, but only if
both texels point to the same max texel so it doesn't matter).
(Both changes are borrowed from PIPE_TEX_CLAMP_TO_EDGE case.)
Note: This is a candidate for the stable branches.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Roland Scheidegger [Sat, 1 Jun 2013 14:48:03 +0000 (16:48 +0200)]
llvmpipe: fix bogus assertions for buffer surfaces
One of the assertion made no sense for buffer rendertargets
(due to the union), so drop it. (The same assertion is present already in
the path for texture surfaces later.).
v2: make assertion completely accurate (suggested by Jose).
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Kenneth Graunke [Thu, 30 May 2013 01:51:29 +0000 (18:51 -0700)]
i965: Fix haswell_upload_cut_index when there's no index buffer.
brw->ib.type is reset to -1 at the start of each batch. If there's no
index buffer, it won't get updated to a sensible value, resulting in
_mesa_primitive_restart_index's "Invalid index buffer type" assertion
tripping.
Fixes a regression since
7c87a3b5dac118697a9b67caa7b6d5cab60f316d.
NOTE: This is a candidate for the 9.1 branch (and should be squashed).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=65195
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>