Chris Forbes [Sat, 25 Jan 2014 05:09:34 +0000 (18:09 +1300)]
glapi: Add (empty) api section for ARB_fragment_layer_viewport
This extension is purely GLSL -- there are no new GL API elements.
Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Kenneth Graunke [Thu, 19 Jun 2014 05:25:33 +0000 (22:25 -0700)]
i965: Save meta stencil blit programs in the context.
When the last context in a share group is destroyed, the hash table
containing all of the shader programs (ctx->Shared->ShaderObjects) is
destroyed, throwing away all of the shader programs.
Using a static variable to store program IDs ends up holding on to them
after this, so we think we still have a compiled program, when it
actually got destroyed. _mesa_UseProgram then hits GL errors, since no
program by that ID exists.
Instead, store the program IDs in the context, so we know to recompile
if our context gets destroyed and the application creates another one.
Fixes es3conform tests when run without -minfmt (where it creates
separate contexts for testing each visual).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77865
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Emil Velikov [Thu, 19 Jun 2014 00:47:38 +0000 (01:47 +0100)]
scons: avoid building any piece of i915
Leftover from commit
c21fca8bf24.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Aaron Watry [Sat, 21 Jun 2014 00:13:30 +0000 (19:13 -0500)]
gallivm: Fix build after LLVM commit 211259
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Daniel Manjarres [Fri, 20 Jun 2014 17:51:33 +0000 (10:51 -0700)]
glx: Don't crash on swap event for a Window (non-GLXWindow)
Prior to GLX 1.3 there was the glxMakeCurrent() function that took a
single drawable handle. The Drawable could be either a bare XID for a
Window or an XID for a glxpixmap.
GLX 1.3 added glxMakeContextCurrent that takes 2 handles: one for
reading, one for writing. Nowadays the old glxMakeCurrent call is
implemented as a call to glxMakeContextCurrent with the single handle
duplicated.
Because of this it is allowed to use a plain-old Window ID as an
argument to glxMakeContextCurrent, although nobody really documents this
sort of thing. The manpage for the NEW call specifies the arguments as
GLXPixmaps, but the actual code accepts Window XIDs too, and handles
them correctly.
Similarly, the glxSelectEvents function can also take a bare Window XID.
The "piglit" tests all use GLXWindows and/or GLXPixmaps. You never
tested swap events with a bare Window XID. That is what my app was
doing.
The swap_events code worked with Window XIDs in mesa 7.x.y. The new code
added in versions 8, 9, and 10 assumes that all buffer swap events have
a GLXPixmap associated with them. Because of the historical quirks
above, this is not true. Swap events for bare Window XIDs do NOT have a
glxpixmap resulting in a segfault.
Any app that uses the old school glxMakeCurrent call with a Window XID
while trying to use swap_events will crash when the libs try to lookup
the nonexistent GLXPixmap associated with the incoming swap event.
I believe that the people who wrote the spec overlooked this, because
the "sbc" field comes from the OML_sync extension that is defined in
terms of glxpixmaps only.
v2 (idr): Formatting changes.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=54372
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Bruno Jiménez [Wed, 18 Jun 2014 15:01:59 +0000 (17:01 +0200)]
r600g/compute: Use gallium util functions for double lists
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Bruno Jiménez [Wed, 18 Jun 2014 15:01:58 +0000 (17:01 +0200)]
r600g/compute: Map only against intermediate buffers
With this we can assure that mapped buffers will never change
its position when relocating the pool.
This patch should finally solve the mapping bug.
v2: Use the new is_item_in_pool util function,
as suggested by Tom Stellard
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Bruno Jiménez [Wed, 18 Jun 2014 15:01:57 +0000 (17:01 +0200)]
r600g/compute: Implement compute_memory_demote_item
This function will be used when we want to map an item
that it's already in the pool.
v2: Use temporary variables to avoid so many castings in functions,
as suggested by Tom Stellard
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Bruno Jiménez [Wed, 18 Jun 2014 15:01:56 +0000 (17:01 +0200)]
r600g/compute: Avoid problems when promoting items mapped for reading
Acording to the OpenCL spec, it is possible to have a buffer mapped
for reading and at read from it using commands or buffers.
With this we can keep the mapping (that exists against the
temporary item) and read with a kernel (from the item we have
just added to the pool) without problems.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Bruno Jiménez [Wed, 18 Jun 2014 15:01:55 +0000 (17:01 +0200)]
r600g/compute: Only move to the pool the buffers marked for promoting
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Bruno Jiménez [Wed, 18 Jun 2014 15:01:54 +0000 (17:01 +0200)]
r600g/compute: divide the item list in two
Now we will have a list with the items that are in the pool
(item_list) and the items that are outside it (unallocated_list)
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Bruno Jiménez [Wed, 18 Jun 2014 15:01:53 +0000 (17:01 +0200)]
r600g/compute: Add statuses to the compute_memory_items
These statuses will help track whether the items are mapped
or if they should be promoted to or demoted from the pool
v2: Use the new is_item_in_pool util function,
as suggested by Tom Stellard
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Bruno Jiménez [Wed, 18 Jun 2014 15:01:52 +0000 (17:01 +0200)]
r600g/compute: Add an util function to know if an item is in the pool
Every item that has been placed in the pool must have start_in_dw
different from -1.
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Bruno Jiménez [Wed, 18 Jun 2014 15:01:51 +0000 (17:01 +0200)]
r600g/compute: Add an intermediate resource for OpenCL buffers
This patch changes completely the way buffers are added to the
compute_memory_pool. Before this, whenever we were going to
map a buffer or write to or read from it, it would get placed
into the pool. Now, every unallocated buffer has its own
r600_resource until it is allocated in the pool.
NOTE: This patch also increase the GPU memory usage at the moment
of putting every buffer in it's place. More or less, the memory
usage is ~2x(sum of every buffer size)
v2: Cleanup
v3: Use temporary variables to avoid so many castings in functions,
as suggested by Tom Stellard
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Iago Toral Quiroga [Mon, 16 Jun 2014 15:00:15 +0000 (17:00 +0200)]
mesa: Copy Geom.UsesEndPrimitive when cloning a geometry program.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Iago Toral Quiroga [Mon, 16 Jun 2014 14:57:59 +0000 (16:57 +0200)]
mesa: Init Geom.UsesEndPrimitive in shader programs.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Sun, 2 Mar 2014 16:59:50 +0000 (08:59 -0800)]
glsl: Optimize (v.x + v.y) + (v.z + v.w) into dot(v, 1.0).
Cuts five instructions out of SynMark's Gl32VSInstancing benchmark.
Matt Turner [Sat, 1 Mar 2014 01:49:20 +0000 (17:49 -0800)]
glsl: Pass in options to do_algebraic().
Will be used in the next commit.
Reviewed-by: Eric Anholt <eric@anholt.net>
Matt Turner [Sat, 1 Mar 2014 04:11:32 +0000 (20:11 -0800)]
glsl: Rebalance expression trees that are reduction operations.
The intention of this pass was to give us better instruction scheduling
opportunities, but it unexpectedly reduced some instruction counts as
well:
total instructions in shared programs:
1666639 ->
1666073 (-0.03%)
instructions in affected programs: 54612 -> 54046 (-1.04%)
(and trades 4 SIMD16 programs in SS3)
Emil Velikov [Thu, 19 Jun 2014 21:46:25 +0000 (22:46 +0100)]
automake: include the libdeps in the correct order
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80254
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Francisco Jerez [Sat, 14 Jun 2014 19:03:02 +0000 (21:03 +0200)]
clover: Calculate the serialized size of a module efficiently.
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Francisco Jerez [Sat, 14 Jun 2014 18:53:35 +0000 (20:53 +0200)]
clover: Optimize module serialization for vectors of fundamental types.
Tested-by: Tom Stellard <thomas.stellard@amd.com>
Roland Scheidegger [Thu, 19 Jun 2014 01:27:26 +0000 (03:27 +0200)]
gallivm: set mcpu when initializing llvm execution engine
Previously llvm detected cpu features automatically when the execution engine
was created (based on host cpu). This is no longer the case, which meant llvm
was then not able to emit some of the intrinsics we used as we didn't specify
any sse attributes (only on avx supporting systems this was not a problem since
despite at least some llvm versions enabling it anyway we always set this
manually). So, instead of trying to figure out which MAttrs to set just set
MCPU.
This fixes https://bugs.freedesktop.org/show_bug.cgi?id=77493.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Vinson Lee <vlee@freedesktop.org>
Tom Stellard [Tue, 17 Jun 2014 15:12:06 +0000 (08:12 -0700)]
clover: Don't use llvm's global context
An LLVMContext should only be accessed by a single and using the global
context was causing crashes in multi-threaded environments. Now we use
a separate context for each compile.
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
CC: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Tom Stellard [Mon, 12 May 2014 20:32:29 +0000 (16:32 -0400)]
clover: Prevent Clang from printing number of errors and warnings to stderr.
https://bugs.freedesktop.org/show_bug.cgi?id=78581
CC: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Michel Dänzer [Thu, 19 Jun 2014 06:53:42 +0000 (15:53 +0900)]
radeon/llvm: Adapt to AMDGPU.rsq intrinsic change in LLVM 3.5
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Emil Velikov [Fri, 16 May 2014 14:09:26 +0000 (15:09 +0100)]
configure: add HAVE_GALLIUM_STATIC_TARGETS
Will be used to control the linking mode of pipe-drivers
in gallium targets.
Keep this hardcoded to static, as the pipe-drivers bare
an unstable interface which we do not want to expose to
the normal user.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Mon, 9 Jun 2014 22:37:19 +0000 (23:37 +0100)]
targets: use GALLIUM_PIPE_LOADER_WINSYS_LIB_DEPS
Drop ~50 lines of buildsystem mayhem.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Thu, 15 May 2014 19:08:10 +0000 (20:08 +0100)]
automake: introduce helper variable
- gallium_pipe_loader_winsys_libs
Will be used in upcomming commits to reduce duplication
in the build.
v2: Drop the megadriver/static_target variables.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Sat, 17 May 2014 23:20:47 +0000 (00:20 +0100)]
target-helpers: add dd_configuration(), dd_driver_name()
Add a couple of helpers to be used by the dri targets when
built with static pipe-drivers. Both functions provide
functionality required by the dri state-tracker.
With this patch ilo, nouveau and r300 gain support for
throttle dri configuration.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Wed, 14 May 2014 17:50:15 +0000 (18:50 +0100)]
target-helpers: add dd_create_screen() helper
Will be used by gallium targets that statically link the
pipe-drivers in the final library. Provides identical
functionality to device_descriptor.create_screan.
v2:
- Don't sw_screen_wrap the i915/svga screen.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Wed, 14 May 2014 17:48:49 +0000 (18:48 +0100)]
target-helpers: add a note about debug wrappers
If memory serves me right, at least one debug wrapper does
not return the base screen on failure.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Sat, 17 May 2014 17:53:36 +0000 (18:53 +0100)]
targets/pipe-loader: add driver specific drm_configuration
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Sat, 17 May 2014 14:31:32 +0000 (15:31 +0100)]
pipe-loader: add pipe_loader_ops::configuration()
Required for the dri state-tracker. Will be used to retrieve
driver specific configuration parameters:
- share_fd (dmabuf) capability
- throttle
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Sat, 17 May 2014 14:04:59 +0000 (15:04 +0100)]
pipe-loader: note that we leak pipe_loader_drm_device->base->driver_name
The string is malloc'd (strdup) in loader_get_driver_for_fd().
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Emil Velikov [Wed, 18 Jun 2014 23:28:49 +0000 (00:28 +0100)]
automake: stop building i915-sw and drop explicit linking to softpipe
Unused and possibly broken. Will be completely removed in
upcomming commits.
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Ilia Mirkin [Wed, 18 Jun 2014 03:28:56 +0000 (23:28 -0400)]
nv30: hack to avoid errors on unexpected color/zeta combinations
This is just a hack, it should be possible to create a temporary zeta
surface and render to that instead. However that's more complicated and
this avoids the render being entirely broken and errors being reported
by the card.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Wed, 18 Jun 2014 03:21:34 +0000 (23:21 -0400)]
nv30: tidy screen caps, add missing ones
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Wed, 18 Jun 2014 02:32:03 +0000 (22:32 -0400)]
nv30: avoid dangling references to deleted contexts
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Wed, 18 Jun 2014 02:22:56 +0000 (22:22 -0400)]
nv30: plug some memory leaks on screen destroy and shader compile
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Ilia Mirkin [Mon, 16 Jun 2014 07:25:44 +0000 (03:25 -0400)]
nv50: organize screen caps
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Mon, 16 Jun 2014 07:16:51 +0000 (03:16 -0400)]
nvc0: organize screen caps
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sun, 15 Jun 2014 21:05:35 +0000 (17:05 -0400)]
nvc0: remove vport_int hack and instead use the usual state validation
Commit
ad4dc772 fixed an issue with the viewport not being restored
correctly. However it's rather hackish and confusing. Instead just mark
the viewport dirty and let the viewport validation take care of it.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
David Heidelberger [Wed, 18 Jun 2014 20:52:41 +0000 (22:52 +0200)]
r300g: don't advertize PIPE_FORMAT_B10G10R10X2_UNORM on < r500
Signed-off-by: David Heidelberger <david.heidelberger@ixit.cz>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Marek Olšák [Mon, 16 Jun 2014 14:53:42 +0000 (16:53 +0200)]
radeonsi: implement ARB_texture_query_lod
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Sat, 14 Jun 2014 15:58:30 +0000 (17:58 +0200)]
radeonsi: pass ARB_conservative_depth parameters to the hardware
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Sat, 14 Jun 2014 01:19:26 +0000 (03:19 +0200)]
gallium: implement ARB_texture_query_levels
The extension is always supported if GLSL 1.30 is supported.
Softpipe and llvmpipe support is also added (trivial).
Radeon and nouveau support is already done.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Marek Olšák [Sat, 14 Jun 2014 00:49:11 +0000 (02:49 +0200)]
st/mesa: set sampler_view::last_level correctly
It was set to pipe_resource::last_level and _MaxLevel was embedded in max_lod,
that's why it worked for ordinary texturing. However, min_lod doesn't have
any effect on texelFetch and textureQueryLevels, so we must still set
last_level correctly.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Dave Airlie [Sat, 14 Jun 2014 01:04:22 +0000 (03:04 +0200)]
st/mesa: handle array textures in st_texture_image_copy
Marek: also handle cube arrays
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Marek Olšák [Fri, 6 Jun 2014 01:04:21 +0000 (03:04 +0200)]
radeonsi: cosmetic changes in si_shader.c
reviewed by Michel Dänzer
Marek Olšák [Fri, 6 Jun 2014 01:00:18 +0000 (03:00 +0200)]
radeonsi: implement ARB_texture_gather and Gather functions from GLSL 4.00
All ARB_texture_gather and gather-related ARB_gpu_shader5 piglit tests pass.
reviewed by Michel Dänzer
Marek Olšák [Thu, 9 May 2013 11:33:11 +0000 (13:33 +0200)]
st/mesa: fix geometry shader max texture limit in state validation
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Thu, 2 May 2013 03:24:27 +0000 (05:24 +0200)]
r600g: fix the max vertex shader input limit
Ian Romanick [Tue, 17 Jun 2014 18:14:17 +0000 (11:14 -0700)]
meta: Respect the driver's maximum number of draw buffers
Commit
c1c1cf5f9 added infrastructure for saving and restoring draw
buffer state. However, it universially used MAX_DRAW_BUFFERS, but many
drivers support far fewer than that at limit. For example, the radeon
and i915 drivers only support 1. Using MAX_DRAW_BUFFERS causes meta to
generate GL errors.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80115
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Kenneth Graunke <kenneth@whitecape.org> [on Broadwell]
Tested-by: jpsinthemix@verizon.net
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Roland Scheidegger [Tue, 17 Jun 2014 23:34:49 +0000 (01:34 +0200)]
gallivm: fix SCALED -> NORM conversions
Such conversions (which are most likely rather pointless in practice) were
resulting in shifts with negative shift counts and shifts with counts the same
as the bit width. This was always undefined in llvm, the code generated was
rather horrendous but happened to work.
So make sure such shifts are filtered out and replaced with something that
works (the generated code is still just as horrendous as before).
This fixes lp_test_format, https://bugs.freedesktop.org/show_bug.cgi?id=73846.
v2: prettify by using build context shift helpers.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Kristian Høgsberg [Mon, 12 May 2014 22:46:11 +0000 (15:46 -0700)]
mesa: Remove glClear optimization based on drawable size
A drawable size of 0x0 means that we don't have buffers for a drawable yet,
not that we have a zero-sized buffer. Core mesa shouldn't be optimizing out
drawing based on buffer size, since the draw call could be what triggers
the driver to go and get buffers. As discussed in the referenced bug report,
the optimization was added as part of a scatter-shot attempt to fix a
different problem. There's no other example in mesa core of using the
buffer size in this way.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=74005
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Juha-Pekka Heikkila [Mon, 24 Feb 2014 07:42:17 +0000 (09:42 +0200)]
mesa: In emit_texenv() type mismatch was forced with typecast
Type mismatch caused random memory to be copied when casted
memory area was smaller than expected type.
Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Grigori Goronzy [Wed, 4 Jun 2014 16:54:38 +0000 (18:54 +0200)]
radeon/uvd: disable VC-1 simple/main on UVD 2.x
It's about as broken as on later UVD revisions.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66452
Cc: "10.1 10.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
Grigori Goronzy [Wed, 4 Jun 2014 16:54:37 +0000 (18:54 +0200)]
radeonsi: add sampling of 4:2:2 subsampled textures
This makes 4:2:2 video surfaces work in VDPAU.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Grigori Goronzy [Wed, 4 Jun 2014 16:54:36 +0000 (18:54 +0200)]
util/u_format: move utility function from r600g
We need this for radeonsi, and it might be useful for other drivers,
too.
Leo Liu [Thu, 12 Jun 2014 16:48:05 +0000 (12:48 -0400)]
radeon/vce: set number of cpbs based on level
v2: add error check for cpb size 0
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Thu, 12 Jun 2014 16:27:31 +0000 (12:27 -0400)]
radeon/vce: implement h264 level support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Thu, 12 Jun 2014 16:27:30 +0000 (12:27 -0400)]
st/omx/enc: implement h264 level support
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Thu, 12 Jun 2014 16:27:29 +0000 (12:27 -0400)]
vl: add level interface
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Leo Liu [Thu, 12 Jun 2014 16:27:28 +0000 (12:27 -0400)]
st/st/omx: fix switch-case indentation in vid_enc.c
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Jon TURNEY [Sat, 10 May 2014 10:04:44 +0000 (11:04 +0100)]
glx: Add an error message when a direct renderer's createScreen() routine fails
because no matching fbConfigs or visuals could be found.
Nearly all the error cases in *createScreen() issue an error message to diagnose
the failure to initialize before branching to handle_error. The few remaining
error cases which don't should probably do the same.
(At the moment, it seems this can be triggered in drisw with an X server which
reports definite values for MAX_PBUFFFER_(WIDTH|HEIGHT|SIZE), because those
attributes are checked for an exact match against 0.)
Signed-off-by: Jon TURNEY <jon.turney@dronecode.org.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chia-I Wu [Mon, 14 Apr 2014 13:52:34 +0000 (21:52 +0800)]
i965/vec4: unit test for copy propagation and writemask
This unit test demonstrates a subtle bug fixed by
4ddf51db6af36736d5d42c1043eeea86e47459ce.
Signed-off-by: Chia-I Wu <olv@lunarg.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Matt Turner [Sun, 15 Jun 2014 05:53:16 +0000 (22:53 -0700)]
i965/vec4/gs: Silence warning about unused 'success' in release build.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Sun, 15 Jun 2014 05:52:08 +0000 (22:52 -0700)]
i965/disasm: Mark three_source_reg_encoding[] static.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Sun, 15 Jun 2014 05:51:29 +0000 (22:51 -0700)]
i965/blorp: Remove unused 'brw' member.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Sun, 15 Jun 2014 06:21:24 +0000 (23:21 -0700)]
i965/blorp: Mark branch unreachable to silence uninitialized var warning.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Sun, 15 Jun 2014 05:52:35 +0000 (22:52 -0700)]
i965: Silence warning about unused brw in release builds.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Sun, 15 Jun 2014 05:53:40 +0000 (22:53 -0700)]
i965: Mark backend_instruction and bblock_t as structs.
They have to be marked as structs for C code elsewhere. bblock_t is
already defined as a struct, and all of backend_instruction's fields are
public anyway.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Sun, 15 Jun 2014 05:31:33 +0000 (22:31 -0700)]
i965: Use standard SSE intrinsics instead of gcc built-ins.
Let's this file compile with clang.
Reviewed-by: Frank Henigman <fjhenigman@google.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Sun, 15 Jun 2014 06:15:05 +0000 (23:15 -0700)]
mesa: Remove unused functions from perfomance query code.
Perhaps useful for debugging? Never used otherwise. Added by commit
8cf5bdad.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Sun, 15 Jun 2014 06:09:59 +0000 (23:09 -0700)]
mesa: Remove unused extra_EXT_texture_integer.
Unused since commit
b6475f94.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Sun, 15 Jun 2014 05:50:43 +0000 (22:50 -0700)]
mesa: Mark default case unreachable to silence warning.
Warned about 'coord' being undefined in the default case, which is
unreachable.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Sun, 15 Jun 2014 06:02:37 +0000 (23:02 -0700)]
egl: Remove unused variable dri_driver_path.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Sun, 15 Jun 2014 05:38:18 +0000 (22:38 -0700)]
swrast: Remove unused solve_plane_recip().
Unused since commit
9e8a961d.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Sun, 15 Jun 2014 05:35:36 +0000 (22:35 -0700)]
glsl: Remove 'struct' from ir_variable declaration.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Matt Turner [Sat, 14 Jun 2014 03:51:12 +0000 (20:51 -0700)]
Revert "i965: Add 'wait' instruction support"
This reverts commit
20be3ff57670529a410b30a1008a71e768d08428.
No evidence of ever being used.
Matt Turner [Fri, 18 Apr 2014 17:01:41 +0000 (10:01 -0700)]
i965/fs: Optimize SEL with the same sources into a MOV.
instructions in affected programs: 474 -> 462 (-2.53%)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Fri, 11 Apr 2014 19:26:25 +0000 (12:26 -0700)]
i965/fs: Perform CSE on texture operations.
Helps Unigine Tropics and some (old) gstreamer shaders in shader-db.
instructions in affected programs: 792 -> 744 (-6.06%)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Matt Turner [Thu, 17 Apr 2014 22:13:00 +0000 (15:13 -0700)]
i965/fs: Copy propagate from load_payload.
But only into non-load_payload instructions. Otherwise we would prevent
register coalescing from combining identical payloads.
Matt Turner [Sun, 30 Mar 2014 19:41:55 +0000 (12:41 -0700)]
i965/fs: Perform CSE on load_payload instructions if it's not a copy.
Since CSE creates instructions, if we let CSE generate things register
coalescing can't remove, bad things will happen. Only let CSE combine
non-copy load_payloads.
E.g., allow CSE to handle this
load_payload vgrf4+0, vgrf5, vgrf6
but not this
load_payload vgrf4+0, vgrf5+0, vgrf5+1
Matt Turner [Thu, 27 Mar 2014 19:02:48 +0000 (12:02 -0700)]
i965/fs: Support register coalescing on LOAD_PAYLOAD operands.
Matt Turner [Tue, 25 Mar 2014 22:43:21 +0000 (15:43 -0700)]
i965/fs: Emit load_payload instead of multiple MOVs for large VGRFs.
Matt Turner [Tue, 25 Mar 2014 22:28:17 +0000 (15:28 -0700)]
i965/fs: Only consider real sources when comparing instructions.
Matt Turner [Mon, 24 Mar 2014 23:18:58 +0000 (16:18 -0700)]
i965/fs: Apply cube map array fixup and restore the payload.
So that we don't have partial writes to a large VGRF. Will be cleaned up
by register coalescing.
Matt Turner [Mon, 17 Mar 2014 17:43:38 +0000 (10:43 -0700)]
i965/fs: Use LOAD_PAYLOAD in emit_texture_gen7().
Matt Turner [Fri, 18 Apr 2014 18:56:46 +0000 (11:56 -0700)]
i965/fs: Lower LOAD_PAYLOAD and clean up.
Clean up with with register_coalesce()/dead_code_eliminate().
Matt Turner [Wed, 28 May 2014 01:47:40 +0000 (18:47 -0700)]
i965/fs: Add SHADER_OPCODE_LOAD_PAYLOAD.
Will be used to simplify the handling of large virtual GRFs in SSA form.
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Tapani Pälli [Thu, 12 Jun 2014 09:48:43 +0000 (12:48 +0300)]
glsl: type check between switch init-expression and case
Patch adds a type check between switch init-expression and case label
and performs a implicit signed->unsigned type conversion when possible.
v2: add GLSL spec reference, do implicit conversion if possible (Matt)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79724
Reviewed-by: Matt Turner <mattst88@gmail.com>
Tobias Klausmann [Sun, 15 Jun 2014 19:24:06 +0000 (21:24 +0200)]
nv50/ir: Remove NV50_SEMANTIC_VIEWPORTINDEX
Use TGSI_SEMANTIC_VIEWPORT_INDEX for the last consumer.
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tobias Klausmann [Sun, 15 Jun 2014 19:24:05 +0000 (21:24 +0200)]
docs: update GL3.txt, relnotes: mark GL_ARB_viewport_array as done for nvc0
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Tobias Klausmann [Sun, 15 Jun 2014 19:24:04 +0000 (21:24 +0200)]
nvc0: implement multiple viewports/scissors, enable ARB_viewport_array
Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
[imirkin: mark things dirty on ctx switch, 3d blit]
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Ilia Mirkin [Sat, 14 Jun 2014 17:23:47 +0000 (13:23 -0400)]
nv50: make sure to mark first scissor dirty after blit
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Kenneth Graunke [Fri, 13 Jun 2014 22:26:40 +0000 (15:26 -0700)]
i965: Use 8x4 aligned rectangles for HiZ operations on Broadwell.
Like on Haswell, we need to use 8x4 aligned rectangle primitives for
hierarchical depth buffer resolves and depth clears. See the comments
in brw_blorp.cpp's brw_hiz_op_params() constructor. (The Broadwell
documentation confirms that this is still necessary.)
This patch makes the Broadwell code follow the same behavior as Chad and
Jordan's Gen7 BLORP code. Based on a patch by Topi Pohjolainen.
This fixes es3conform's framebuffer_blit_functionality_scissor_blit
test, with no Piglit regressions.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "10.2" <mesa-stable@lists.freedesktop.org>
Kenneth Graunke [Fri, 13 Jun 2014 22:25:14 +0000 (15:25 -0700)]
i965: Make INTEL_DEBUG=mip print out whether HiZ is enabled.
We only enable HiZ for miplevels which are aligned on 8x4 blocks. When
debugging HiZ failures, it's useful to know whether a particular
miplevel is using HiZ or not.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jordan Justen [Mon, 9 Jun 2014 21:14:15 +0000 (14:14 -0700)]
glsl/cs: Fix local_size_y and local_size_z
flags.q.local_size has 3 bits. One each for x, y and z.
Fixes piglit's:
* spec/ARB_compute_shader/linker/mismatched_local_work_sizes
* spec/ARB_compute_shader/compiler/default_local_size.comp
* spec/ARB_compute_shader/compiler/work_group_size_too_large
* spec/ARB_compute_shader/compiler/gl_WorkGroupSize_matches_layout.comp
This was regressed in
738c9c3c.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>