mesa.git
6 years agosvga: enable MSAA for SM4_1 device
Brian Paul [Wed, 5 Sep 2018 15:48:35 +0000 (09:48 -0600)]
svga: enable MSAA for SM4_1 device

The SVGA device is deprecating the DX9 MSAA support.
This patch enables MSAA for SM4_1 device by explicitly
setting the SVGA3D_SURFACE_MULTISAMPLE bit.
For SM4_1 device, only 4 samples is supported.

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agosvga: add sample count to the surface_can_create interface
Charmaine Lee [Tue, 26 Sep 2017 23:23:58 +0000 (16:23 -0700)]
svga: add sample count to the surface_can_create interface

With this patch, sample count is also taken into account
when determining if a resource can be created.

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agosvga: implement support for GL_ARB_texture_query_lod
Brian Paul [Wed, 4 Oct 2017 17:21:18 +0000 (11:21 -0600)]
svga: implement support for GL_ARB_texture_query_lod

Just translate the TGSI LODQ intruction to VGPU10 LOD instruction.
All (4) Piglit GL_ARB_texture_query_lod tests pass.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
6 years agosvga: Add support for arb_texture_gather
Neha Bhende [Fri, 25 Aug 2017 12:06:41 +0000 (05:06 -0700)]
svga: Add support for arb_texture_gather

With sm4_1, we can support single channel 2D or CubeMap textures.
This patch exercises this feature.

Tested with piglit

v2: As per Brian's comment

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
6 years agosvga: add support for interpolation at sample position
Brian Paul [Tue, 1 Aug 2017 03:12:07 +0000 (21:12 -0600)]
svga: add support for interpolation at sample position

Vs. sampling at the centroid or the fragment center.

Note that this does not fix failures with the Piglit
arb_sample_shading-interpolate-at-sample-position or
arb_sample_shading-ignore-centroid-qualifier.exe tests at this time.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
6 years agosvga: clarify sys value -> input register mapping
Brian Paul [Tue, 1 Aug 2017 03:12:07 +0000 (21:12 -0600)]
svga: clarify sys value -> input register mapping

We translate TGSI system value registers to VGPU10 input registers.
Add a comment and set file = TGSI_FILE_INPUT.  That's not stricly
necessary since we map both TGSI_FILE_INPUT and TGSI_FILE_SYSTEM_VALUE
to VGPU10_OPERAND_TYPE_INPUT, but this makes the code a bit more
understandable.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
6 years agosvga: add support for FS sample mask output
Brian Paul [Tue, 1 Aug 2017 03:12:07 +0000 (21:12 -0600)]
svga: add support for FS sample mask output

This, with the previous work for sample position/id query, allows
us to enable per-sample shading for VGPU 10.1.

Note that quite a few Piglit arb_sample_shading tests still do not
pass, but many do.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
6 years agosvga: add support for sample id, sample position
Brian Paul [Tue, 1 Aug 2017 03:12:07 +0000 (21:12 -0600)]
svga: add support for sample id, sample position

Sample ID is just a system value.  Sample position must be implemented
with the VGPU10_OPCODE_SAMPLE_POS instruction.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
6 years agosvga: implement no-op svga_set_min_samples()
Brian Paul [Tue, 1 Aug 2017 03:12:07 +0000 (21:12 -0600)]
svga: implement no-op svga_set_min_samples()

This is part of the per-sample shading feature (PIPE_CAP_SAMPLE_SHADING).

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
6 years agosvga: add support for independent blend function per render target
Charmaine Lee [Wed, 4 Oct 2017 17:05:58 +0000 (11:05 -0600)]
svga: add support for independent blend function per render target

This patch adds support for GL_ARB_draw_buffers_blend extension
for SM4_1 device.

Fixes piglit test fbo-draw-buffers-blend.

This patch is squashed with a subsequent patch which fixed a
regression.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
6 years agosvga: emit shader version as 4.0 or 4.1 depending on device support
Brian Paul [Thu, 25 May 2017 19:46:49 +0000 (13:46 -0600)]
svga: emit shader version as 4.0 or 4.1 depending on device support

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
6 years agosvga: restructure nested if's in emit_src_register()
Brian Paul [Thu, 25 May 2017 18:45:01 +0000 (12:45 -0600)]
svga: restructure nested if's in emit_src_register()

To make it cleaner for subsequent changes.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
6 years agosvga: sync VGPU10ShaderTokens.h with upstream changes
Brian Paul [Wed, 24 May 2017 13:38:48 +0000 (07:38 -0600)]
svga: sync VGPU10ShaderTokens.h with upstream changes

This includes new DX 10.1 opcodes and tokens.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
6 years agosvga: add support for shadow cubemap array
Charmaine Lee [Sat, 6 May 2017 00:00:55 +0000 (17:00 -0700)]
svga: add support for shadow cubemap array

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agosvga: add support for rendering to cubemap array
Charmaine Lee [Fri, 5 May 2017 21:32:45 +0000 (14:32 -0700)]
svga: add support for rendering to cubemap array

Fixes piglit test arb_texture_cube_map_array-fbo-cubemap-array

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agosvga: add support for TXL2 opcode
Charmaine Lee [Fri, 5 May 2017 21:24:53 +0000 (14:24 -0700)]
svga: add support for TXL2 opcode

This patch adds support for cubemap array texture lookup with
explicit LOD.

Fixes piglit test arb_texture_cube_map_array-cubemap-lod

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agosvga: add support for cubemap array
Charmaine Lee [Wed, 4 Oct 2017 16:56:30 +0000 (10:56 -0600)]
svga: add support for cubemap array

This patch adds support for cubemap array for SM4_1.

Fixes piglit test arb_texture_cube_map_array-cubemap

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agosvga: add have_sm4_1 flag, helper function
Brian Paul [Wed, 4 Oct 2017 16:49:42 +0000 (10:49 -0600)]
svga: add have_sm4_1 flag, helper function

Signed-off-by: Brian Paul <brianp@vmware.com>
6 years agogallium/u_inlines: remove the destroy variable in pipe_reference_described
Marek Olšák [Sat, 1 Sep 2018 05:28:08 +0000 (01:28 -0400)]
gallium/u_inlines: remove the destroy variable in pipe_reference_described

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agogallium/u_inlines: improve pipe_reference_described perf for debug builds
Marek Olšák [Sat, 1 Sep 2018 05:22:08 +0000 (01:22 -0400)]
gallium/u_inlines: improve pipe_reference_described perf for debug builds

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
6 years agogallium/auxiliary: don't dereference counters twice needlessly
Marek Olšák [Sat, 1 Sep 2018 05:17:03 +0000 (01:17 -0400)]
gallium/auxiliary: don't dereference counters twice needlessly

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agogallium/u_inlines: normalize naming, use dst & src, style fixes (v2)
Marek Olšák [Sat, 1 Sep 2018 04:36:14 +0000 (00:36 -0400)]
gallium/u_inlines: normalize naming, use dst & src, style fixes (v2)

v2: update comments

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agoutil: try to fix the Android and MacOS build
Marek Olšák [Sun, 9 Sep 2018 01:02:18 +0000 (21:02 -0400)]
util: try to fix the Android and MacOS build

Bionic does not have pthread_setaffinity_np.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107869
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
6 years agoanv: Support v3 of VK_EXT_vertex_attribute_divisor
Jason Ekstrand [Mon, 10 Sep 2018 17:05:41 +0000 (12:05 -0500)]
anv: Support v3 of VK_EXT_vertex_attribute_divisor

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agovulkan: Update the XML and headers to 1.1.84
Jason Ekstrand [Mon, 10 Sep 2018 17:07:51 +0000 (12:07 -0500)]
vulkan: Update the XML and headers to 1.1.84

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agomesa/meson: 32bit xmlconfig linkage
Sergii Romantsov [Fri, 7 Sep 2018 09:43:41 +0000 (12:43 +0300)]
mesa/meson: 32bit xmlconfig linkage

Building of 32bit mesa with meson causes linkage issue:
"undefined reference to `util_get_process_name'"
Fixed by adding link-with mesa_util for xmlconfig primary.

v2: Removed '[]', commit message corrected.

v3: Reverted changes in gbm and glx libraries.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107843
Fixes: 2e1e6511f76370870b5cd "util: extract get_process_name from xmlconfig.c"
Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agoRequire Visual Studio 2015.
Jose Fonseca [Fri, 7 Sep 2018 12:27:47 +0000 (13:27 +0100)]
Require Visual Studio 2015.

We no longer need or use Visual Studio 2013.

https://ci.appveyor.com/project/jrfonseca/mesa/build/52

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
6 years agoutil: Make util_context_thread_changed a no-op on Windows.
Jose Fonseca [Mon, 10 Sep 2018 09:08:36 +0000 (10:08 +0100)]
util: Make util_context_thread_changed a no-op on Windows.

Spite using thrd_t types, these functions are wed to pthreads, and break
Windows builds, because thrd_current() is not implemented there, as it's
impossible to have an efficient thrd_current() implementation on
Windows.

Trivial.

6 years agovirgl: do not map zero-sized resource
Erik Faye-Lund [Wed, 5 Sep 2018 13:34:51 +0000 (14:34 +0100)]
virgl: do not map zero-sized resource

When creating textures, we avoid creating backing-store for all
multisampled textures, not just depth buffers.

So we can't try to map them later. That's just going to fail. So
let's take the blit-based code-path that seems to avoid this problem.

This make this piglit test-case no longer crash (although it still
fails):

bin/copyteximage 2D -samples=2 -auto

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agovirgl: remove dead code
Erik Faye-Lund [Wed, 5 Sep 2018 13:17:24 +0000 (14:17 +0100)]
virgl: remove dead code

We don't use the size we calculate in this function, so let's just
drop the calculation

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agovirgl: drop needless return-code
Erik Faye-Lund [Wed, 5 Sep 2018 12:58:35 +0000 (13:58 +0100)]
virgl: drop needless return-code

We always return TRUE, and we never check the return-value. Let's
just drop the return value instead.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agovirgl: free trans on map-error
Erik Faye-Lund [Wed, 5 Sep 2018 11:50:18 +0000 (12:50 +0100)]
virgl: free trans on map-error

When we fail to map memory, we should also free trans to avoid
leaking memory.

Noticed while reading code.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agoi965: Bump aperture tracking to u64
Chris Wilson [Fri, 7 Sep 2018 13:32:05 +0000 (14:32 +0100)]
i965: Bump aperture tracking to u64

As a prelude to handling large address spaces, first allow ourselves the
luxury of handling the full 4G.

Reported-by: Andrey Simiklit <asimiklit.work@gmail.com>
Cc: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agoetnaviv: Reduce max offset to available hardware bits.
Mathias Fröhlich [Thu, 6 Sep 2018 14:13:42 +0000 (16:13 +0200)]
etnaviv: Reduce max offset to available hardware bits.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agogallium: New cap PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET.
Mathias Fröhlich [Thu, 6 Sep 2018 14:13:42 +0000 (16:13 +0200)]
gallium: New cap PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET.

Introduce a new capability for the maximum value of
pipe_vertex_element::src_offset. Initially just every driver
backend returns the value previously set from _mesa_init_constants.
So this shall end up in no functional change.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agovirgl: don't send a shader create with no data. (v2)
Dave Airlie [Tue, 28 Aug 2018 22:32:29 +0000 (08:32 +1000)]
virgl: don't send a shader create with no data. (v2)

This fixes the situation where we'd send a shader with just the
header and no data.

piglit/glsl-max-varyings test was causing this to happen, and
the renderer fix was breaking it.

v2: drop fprintf

Fixes: a8987b88ff1d "virgl: add driver for virtio-gpu 3D (v2)"
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
6 years agomesa: enable ARB_vertex_buffer_object in core profile
Timothy Arceri [Sun, 2 Sep 2018 10:27:40 +0000 (20:27 +1000)]
mesa: enable ARB_vertex_buffer_object in core profile

This extension is required by "Wolfenstein: The Old Blood"
and is exposed in core in the Nvidia binary driver.

All the functions are just alias of the core functions so
there should be nothing more to do.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
6 years agost/mesa: throttle texture uploads if their memory usage goes beyond a limit
Marek Olšák [Sat, 1 Sep 2018 00:58:10 +0000 (20:58 -0400)]
st/mesa: throttle texture uploads if their memory usage goes beyond a limit

This prevents radeonsi from running out of memory. It also increases
texture upload performance by being nice to the kernel memory manager.

6 years agogallium: add PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET
Marek Olšák [Sat, 1 Sep 2018 00:52:29 +0000 (20:52 -0400)]
gallium: add PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET

6 years agodocs: update calendar, add news item and link release notes for 18.2.0
Andres Gomez [Fri, 7 Sep 2018 21:40:43 +0000 (00:40 +0300)]
docs: update calendar, add news item and link release notes for 18.2.0

Signed-off-by: Andres Gomez <agomez@igalia.com>
6 years agodocs: add sha256 checksums for 18.2.0
Andres Gomez [Fri, 7 Sep 2018 21:26:57 +0000 (00:26 +0300)]
docs: add sha256 checksums for 18.2.0

Signed-off-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit cb1ddf48e223231fc4e2cfdc92fbcdaec673929d)

6 years agodocs: update 18.2.0 release notes
Andres Gomez [Fri, 7 Sep 2018 21:10:22 +0000 (00:10 +0300)]
docs: update 18.2.0 release notes

Signed-off-by: Andres Gomez <agomez@igalia.com>
(cherry picked from commit 7378180e7aa652f3f95e4b953a552dcaf8fb8408)

6 years agoRevert "gallium/os_thread: simplify helper pipe_current_thread_get_time_nano"
Marek Olšák [Fri, 7 Sep 2018 20:42:00 +0000 (16:42 -0400)]
Revert "gallium/os_thread: simplify helper pipe_current_thread_get_time_nano"

This reverts commit 6d477bc5460eec14c6a0d047a0384c9ce5c7609b.

It fixes the Windows build hopefully.

6 years agoanv: Clamp scissors to the framebuffer boundary
Jason Ekstrand [Wed, 22 Aug 2018 01:43:57 +0000 (20:43 -0500)]
anv: Clamp scissors to the framebuffer boundary

The Vulkan 1.1.81 spec says:

    "It is legal for offset.x + extent.width or offset.y + extent.height
    to exceed the dimensions of the framebuffer - the scissor test still
    applies as defined above. Rasterization does not produce fragments
    outside of the framebuffer, so such fragments never have the scissor
    test performed on them."

Elsewhere, the Vulkan 1.1.81 spec says:

    "The application must ensure (using scissor if necessary) that all
    rendering is contained within the render area, otherwise the pixels
    outside of the render area become undefined and shader side effects
    may occur for fragments outside the render area. The render area
    must be contained within the framebuffer dimensions."

Unfortunately, there's some room for interpretation here as to what the
consequences are of having the render area set to exactly the
framebuffer dimensions and having a scissor that is larger than the
framebuffer.  Given that GL and other APIs provide automatic clipping to
the framebuffer, it makes sense that applications would assume that
Vulkan does this as well.  It costs us very little to play it safe and
just clamp client-provided scissors to the framebuffer dimensions.
Fortunately, the user is required to provide us with at least one
scissor so we don't need to handle the case where they don't.

Fixes: fb2a5ceb3264 "anv: Emit DRAWING_RECTANGLE once at driver..."
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agoanv: Disable the vertex cache when tessellating on SKL GT4
Jason Ekstrand [Wed, 22 Aug 2018 01:40:50 +0000 (20:40 -0500)]
anv: Disable the vertex cache when tessellating on SKL GT4

I have no idea if I'm correct about what's going wrong or if this is the
correct fix.  However, in my multiple weeks of banging my head on this
hang, a VUE reference counting bug seems to match all the symptoms and
it definitely fixes the hang.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107280
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agoanv: Implement a VF cache invalidate workaround
Jason Ekstrand [Tue, 21 Aug 2018 22:52:54 +0000 (17:52 -0500)]
anv: Implement a VF cache invalidate workaround

Known to fix nothing whatsoever but it's in the docs.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agoanv: Re-emit vertex buffers when the pipeline changes
Jason Ekstrand [Tue, 21 Aug 2018 22:14:38 +0000 (17:14 -0500)]
anv: Re-emit vertex buffers when the pipeline changes

Some of the bits of VERTEX_BUFFER_STATE such as access type, instance
data step rate, and pitch come from the pipeline.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agoradeonsi: pin the winsys thread to the requested L3 cache (v2)
Marek Olšák [Thu, 6 Sep 2018 03:13:56 +0000 (23:13 -0400)]
radeonsi: pin the winsys thread to the requested L3 cache (v2)

v2: rebase

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agogallium/u_threaded: implement set_context_param for thread pinning (v2)
Marek Olšák [Thu, 6 Sep 2018 03:12:27 +0000 (23:12 -0400)]
gallium/u_threaded: implement set_context_param for thread pinning (v2)

v2: - use set_context_param
    - set set_context_param even if the driver doesn't implement it

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agost/mesa: pin driver threads to a specific L3 cache on AMD Zen (v2)
Marek Olšák [Thu, 6 Sep 2018 03:10:57 +0000 (23:10 -0400)]
st/mesa: pin driver threads to a specific L3 cache on AMD Zen (v2)

v2: use set_context_param

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agogallium: add pipe_context::set_context_param for tuning perf on AMD Zen (v2)
Marek Olšák [Thu, 6 Sep 2018 02:57:19 +0000 (22:57 -0400)]
gallium: add pipe_context::set_context_param for tuning perf on AMD Zen (v2)

State trackers will not use the new param directly, but will instead use
a helper in MakeCurrent that does the right thing.

v2: rework the interface

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agogallium/os_thread: simplify helper pipe_current_thread_get_time_nano
Marek Olšák [Thu, 6 Sep 2018 03:00:07 +0000 (23:00 -0400)]
gallium/os_thread: simplify helper pipe_current_thread_get_time_nano

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agogallium/u_cpu_detect: get the number of cores per L3 cache for AMD Zen
Marek Olšák [Thu, 6 Sep 2018 01:30:44 +0000 (21:30 -0400)]
gallium/u_cpu_detect: get the number of cores per L3 cache for AMD Zen

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agogallium/u_cpu_detect: fix parsing the CPU family
Marek Olšák [Thu, 6 Sep 2018 00:11:34 +0000 (20:11 -0400)]
gallium/u_cpu_detect: fix parsing the CPU family

According to:
https://support.amd.com/TechDocs/54945_PPR_Family_17h_Models_00h-0Fh.pdf

Also Intel:
https://www.microbe.cz/docs/CPUID.pdf

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agogallium/u_cpu_detect: fix a race condition on initialization
Marek Olšák [Wed, 5 Sep 2018 23:15:56 +0000 (19:15 -0400)]
gallium/u_cpu_detect: fix a race condition on initialization

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agoReplace uses of _mesa_bitcount with util_bitcount
Dylan Baker [Tue, 21 Aug 2018 16:46:46 +0000 (09:46 -0700)]
Replace uses of _mesa_bitcount with util_bitcount

and _mesa_bitcount_64 with util_bitcount_64. This fixes a build problem
in nir for platforms that don't have popcount or popcountll, such as
32bit msvc.

v2: - Fix additional uses of _mesa_bitcount added after this was
      originally written

Acked-by: Eric Engestrom <eric.engestrom@intel.com> (v1)
Acked-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
6 years agomove u_math to src/util
Dylan Baker [Fri, 17 Aug 2018 00:20:38 +0000 (17:20 -0700)]
move u_math to src/util

Currently we have two sets of functions for bit counts, one in gallium
and one in core mesa. The ones in core mesa are header only in many
cases, since they reduce to "#define _mesa_bitcount popcount", but they
provide a fallback implementation. This is important because 32bit msvc
doesn't have popcountll, just popcount; so when nir (for example)
includes the core mesa header it doesn't (and shouldn't) link with core
mesa. To fix this we'll promote the version out of gallium util, then
replace the core mesa uses with the util version, since nir (and other
non-core mesa users) can and do link with mesautils.

Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
6 years agodocs: update calendar, add news item and link release notes for X.Y.Z
Dylan Baker [Fri, 7 Sep 2018 17:19:33 +0000 (10:19 -0700)]
docs: update calendar, add news item and link release notes for X.Y.Z

Signed-off-by: Dylan Baker <dylan@pnwbakers.com>
6 years agodocs/relnotes: Add sha256 sums for mesa 18.1.8
Dylan Baker [Fri, 7 Sep 2018 17:10:13 +0000 (10:10 -0700)]
docs/relnotes: Add sha256 sums for mesa 18.1.8

6 years agodocs: Add release notes for 18.1.8
Dylan Baker [Fri, 7 Sep 2018 15:27:26 +0000 (08:27 -0700)]
docs: Add release notes for 18.1.8

6 years agoi965: Workaround the gen9 hw astc5x5 sampler bug
Jason Ekstrand [Fri, 7 Sep 2018 05:40:54 +0000 (00:40 -0500)]
i965: Workaround the gen9 hw astc5x5 sampler bug

gen9 hardware has a bug in the sampler cache that can cause GPU hangs
whenever an texture with aux compression enabled is in the sampler cache
together with an ASTC5x5 texture.  Because we can't control what the
client binds at any given time, we have two options: resolve the CCS or
decompresss the ASTC.  Doing a CCS or HiZ resolve is far less drastic
and will likely have a smaller performance impact.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
6 years agov3d: Fix setup of the VCM cache size.
Eric Anholt [Fri, 24 Aug 2018 22:45:37 +0000 (15:45 -0700)]
v3d: Fix setup of the VCM cache size.

There were two bugs working together to make things mostly work: I wasn't
dividing the VPM output size available by the size of a batch (vertex),
but I also had the size of the VPM reduced by a factor of 8.

Fixes dEQP-GLES3.functional.vertex_array_objects.all_attributes and it
seems also my intermittent varying failures.

Fixes: 1561e4984eb0 ("v3d: Emit the VCM_CACHE_SIZE packet.")
6 years agov3d: Fix SRC_ALPHA_SATURATE blending for RTs without alpha.
Eric Anholt [Thu, 6 Sep 2018 20:37:37 +0000 (13:37 -0700)]
v3d: Fix SRC_ALPHA_SATURATE blending for RTs without alpha.

Fixes
dEQP-GLES3.functional.fragment_ops.blend.default_framebuffer.rgb_func_alpha_func.dst.src_alpha_saturate_src_alpha_saturate
and friends with --deqp-egl-config-name=rgb565d0s0

Cc: "18.2" <mesa-stable@lists.freedesktop.org>
6 years agointel/genxml: turn SLM Enable bit into boolean
Lionel Landwerlin [Fri, 7 Sep 2018 10:55:45 +0000 (11:55 +0100)]
intel/genxml: turn SLM Enable bit into boolean

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agoi965/tools: 32bit compilation with meson
Sergii Romantsov [Thu, 6 Sep 2018 09:59:47 +0000 (12:59 +0300)]
i965/tools: 32bit compilation with meson

Building of 32bit mesa with meson causes issue:
"implicit declaration of function ‘__builtin_ia32_clflush’".
Fixed by adding msse2 compilation flag.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107843
Fixes: 314879f7fec0 (i965: Fix asynchronous mappings on !LLC platforms.)
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
6 years agointel: compiler option msse2 and mstackrealign
Sergii Romantsov [Thu, 6 Sep 2018 08:07:45 +0000 (11:07 +0300)]
intel: compiler option msse2 and mstackrealign

Seems in case of 32-bit library, usage of msse2 makes
some stack corruption or incorrect instructions.
Usage with mstackrealign fixes that case.

v2: Fixed meson.

v3: Definition of c_sse2_args moved on the top (L.Landwerlin).
    Added mstackrealign for Android's mks where msee4.1 is used.

v4: Added for Vulkan also.

v5: Commit message correction.

CC: <mesa-stable@lists.freedesktop.org>
Fixes: 6b05c080f202 (i965: Compile with -msse3)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107779
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
6 years agofreedreno: fix rast->depth_cleap_near/far
Rob Clark [Fri, 7 Sep 2018 11:41:43 +0000 (07:41 -0400)]
freedreno: fix rast->depth_cleap_near/far

Fixes: daa19363def gallium: split depth_clip into depth_clip_near & depth_clip_far
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agogallium: enable GL_AMD_depth_clamp_separate on r600, radeonsi
Marek Olšák [Wed, 22 Aug 2018 02:00:11 +0000 (22:00 -0400)]
gallium: enable GL_AMD_depth_clamp_separate on r600, radeonsi

6 years agogallium: split depth_clip into depth_clip_near & depth_clip_far
Marek Olšák [Wed, 22 Aug 2018 01:59:23 +0000 (21:59 -0400)]
gallium: split depth_clip into depth_clip_near & depth_clip_far

for AMD_depth_clamp_separate.

6 years agoanv/pipeline: Only consider double elements which actually exist
Jason Ekstrand [Tue, 4 Sep 2018 18:58:01 +0000 (13:58 -0500)]
anv/pipeline: Only consider double elements which actually exist

The brw_vs_prog_data::double_inputs_read field comes directly from
shader_info::double_inputs which may contain inputs which are not
actually read.  Instead of using it directly, AND it with inputs_read
which is only things which are read.  Otherwise, we may end up
subtracting too many elements when computing elem_count.

Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103241
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
6 years agonir: Drop the vs_inputs_dual_locations option
Jason Ekstrand [Fri, 31 Aug 2018 12:35:17 +0000 (07:35 -0500)]
nir: Drop the vs_inputs_dual_locations option

It was very inconsistently handled; the only things that made use of it
were glsl_to_nir, glspirv, and nir_gather_info.  In particular,
nir_lower_io completely ignored it so anyone using nir_lower_io on
64-bit vertex attributes was going to be in for a shock.  Also, as of
the previous commit, it's set by every driver that supports 64-bit
vertex attributes.  There's no longer any reason to have it be an option
so let's just delete it.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
6 years agoradeonsi/nir: Set vs_inputs_dual_locations and let NIR do the remap
Jason Ekstrand [Fri, 31 Aug 2018 12:55:07 +0000 (07:55 -0500)]
radeonsi/nir: Set vs_inputs_dual_locations and let NIR do the remap

We were going out of our way to disable dual-location re-mapping in NIR
only to then do the remapping in st_glsl_to_nir.cpp.  Presumably, this
was so that double_inputs would be correct for the core state tracker.
However, now that we've it to gl_program::DualSlotInputs which is
unaffected by NIR lowering, we can let NIR lower things for us.  The one
tricky bit here is that we have to remap the inputs_read bitfield back
to the single-slot convention for the gallium state tracker to use.

Since radeonsi is the only NIR-capable gallium driver that also supports
GL_ARB_vertex_attrib_64bit, we only have to worry about radeonsi when
making core gallium state tracker changes.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
6 years agocompiler: Move double_inputs to gl_program::DualSlotInputs
Jason Ekstrand [Thu, 30 Aug 2018 20:02:25 +0000 (15:02 -0500)]
compiler: Move double_inputs to gl_program::DualSlotInputs

Previously, we had two field in shader_info: double_inputs_read and
double_inputs.  Presumably, the one was for all double inputs that are
read and the other is all that exist.  However, because nir_gather_info
regenerates these two values, there is a possibility, if a variable gets
deleted, that the value of double_inputs could change over time.  This
is a problem because double_inputs is used to remap the input locations
to a two-slot-per-dvec3/4 scheme for i965.  If that mapping were to
change between glsl_to_nir and back-end state setup, we would fall over
when trying to map the NIR outputs back onto the GL location space.

This commit changes the way slot re-mapping works.  Instead of the
double_inputs field in shader_info, it adds a DualSlotInputs bitfield to
gl_program.  By having it in gl_program, we more easily guarantee that
NIR passes won't touch it after it's been set.  It also makes more sense
to put it in a GL data structure since it's really a mapping from GL
slots to back-end and/or NIR slots and not really a NIR shader thing.

Tested-by: Alejandro Piñeiro <apinheiro@igalia.com> (ARB_gl_spirv tests)
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
6 years agogallium: add PIPE_CAP_RASTERIZER_SUBPIXEL_BITS
Marek Olšák [Thu, 6 Sep 2018 04:09:27 +0000 (00:09 -0400)]
gallium: add PIPE_CAP_RASTERIZER_SUBPIXEL_BITS

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
6 years agomeson: disable asserts by default on release builds
Eric Engestrom [Tue, 17 Jul 2018 14:12:32 +0000 (15:12 +0100)]
meson: disable asserts by default on release builds

By the time Mesa 18.3 comes out (probably December '18), Meson 0.45 will
be 9 months old (March '18), so I think this is reasonable.

(btw, the currently-required Meson 0.44.1 was released less than 12 days
 before 0.45, so we're really not bumping by much.)

Currently, the Meson versions in the major distributions are:
Arch:     ships 0.47.2
CentOS:   7 ships 0.47.1
Debian:   stable ships 0.37.1, so it hasn't been usable in a long time.
          everything more recent ships 0.47.2
Fedora:   28 ships 0.45.1
FreeBSD:  ships 0.46.1 (ports)
Gentoo:   ships 0.46.1
OpenSUSE: 15 ships 0.46
Ubuntu:   18.04 ships 0.45.1

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agomesa/util: add missing va_end() after va_copy()
Andrii Simiklit [Thu, 6 Sep 2018 14:43:54 +0000 (17:43 +0300)]
mesa/util: add missing va_end() after va_copy()

MSDN:
"va_end must be called on each argument list that's initialized
 with va_start or va_copy before the function returns."

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107810
Fixes: c6267ebd6c8a "gallium/util: Stop bundling our snprintf implementation."
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
6 years agomesa/util: don't ignore NULL returned from 'malloc'
Andrii Simiklit [Thu, 6 Sep 2018 14:43:53 +0000 (17:43 +0300)]
mesa/util: don't ignore NULL returned from 'malloc'

We should exit from the function 'util_vasprintf'
with error code -1 for case where 'malloc'
returns NULL

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: 864148d69e1e "util: add util_vasprintf() for Windows (v2)"
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
6 years agomesa/util: don't use the same 'va_list' instance twice
Andrii Simiklit [Thu, 6 Sep 2018 14:43:52 +0000 (17:43 +0300)]
mesa/util: don't use the same 'va_list' instance twice

The first usage of the 'va_list' instance could change it.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: 864148d69e1e "util: add util_vasprintf() for Windows (v2)"
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
6 years agoapple/glx/log: added missing va_end() after va_copy()
Andrii Simiklit [Thu, 6 Sep 2018 14:43:51 +0000 (17:43 +0300)]
apple/glx/log: added missing va_end() after va_copy()

Each invocation of va_copy() must be matched by a
corresponding invocation of va_end()

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: 51691f0767f6 "darwin: Use ASL for logging"
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
6 years agomeson: drop unnecessary llvm version hacks
Eric Engestrom [Thu, 6 Sep 2018 14:39:07 +0000 (15:39 +0100)]
meson: drop unnecessary llvm version hacks

The current minimum meson version supported is 0.44.1, so we have met
both the 0.43 and 0.44 requirement to not need these hacks anymore :)

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agomesa: add missing return statement for GL_RG_SNORM case
Danylo Piliaiev [Thu, 6 Sep 2018 14:01:07 +0000 (17:01 +0300)]
mesa: add missing return statement for GL_RG_SNORM case

Fixes: 0d356cf4781bece0dc9a7 "mesa: enable EXT_render_snorm extension"
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
6 years agomeson: consolidate langs lists
Eric Engestrom [Tue, 28 Aug 2018 16:16:48 +0000 (17:16 +0100)]
meson: consolidate langs lists

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agointel/compiler: remove unused get_image_base_type()
Eric Engestrom [Mon, 3 Sep 2018 17:07:45 +0000 (18:07 +0100)]
intel/compiler: remove unused get_image_base_type()

Unused since 09f1de97a76a4990fd7c "anv,i965: Lower away image derefs in
the driver".

Cc: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agotnl: Fix green gun regression in xonotic.
Mathias Fröhlich [Fri, 10 Aug 2018 09:37:43 +0000 (11:37 +0200)]
tnl: Fix green gun regression in xonotic.

Fix an other regression of
mesa: Make gl_vertex_array contain pointers to first order VAO members.
The regression showed up with drivers using the tnl module and
was reproducible using xonotic-glx -benchmark demos/the-big-keybench.dem.

Fixes: 64d2a204805
    mesa: Make gl_vertex_array contain pointers to first order VAO members.
Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agoRevert "i965/tools: 32bit compilation with meson"
Lionel Landwerlin [Thu, 6 Sep 2018 11:25:07 +0000 (12:25 +0100)]
Revert "i965/tools: 32bit compilation with meson"

This reverts commit 4aec44c0d9c4c0649c362199fac97efe0a3b38a4.

Unfortunately this patch needed a another one to be committed first.

6 years agoi965/tools: 32bit compilation with meson
Sergii Romantsov [Thu, 6 Sep 2018 09:59:47 +0000 (12:59 +0300)]
i965/tools: 32bit compilation with meson

Building of 32bit mesa with meson causes issue:
"implicit declaration of function ‘__builtin_ia32_clflush’".
Fixed by adding msse2 compilation flag.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107843
Fixes: 314879f7fec0 (i965: Fix asynchronous mappings on !LLC platforms.)
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
6 years agoglsl: fixer lexer for unreachable defines
Timothy Arceri [Sat, 1 Sep 2018 13:57:38 +0000 (23:57 +1000)]
glsl: fixer lexer for unreachable defines

If we have something like:

   #ifdef NOT_DEFINED
   #define A_MACRO(x) \
if (x)
   #endif

The # on the #define is not skipped but the define itself is so
this then gets recognised as #if.

Until 28a3731e3f this didn't happen because we ended up in
<HASH>{NONSPACE} where BEGIN INITIAL was called stopping the
problem from happening.

This change makes sure we never call RETURN_TOKEN_NEVER_SKIP for
if/else/endif when processing a define.

Cc: Ian Romanick <idr@freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107772
Tested-By: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
6 years agofreedreno/ir3: insert mov if same instruction in the outputs.
Hyunjun Ko [Thu, 30 Aug 2018 02:58:54 +0000 (11:58 +0900)]
freedreno/ir3: insert mov if same instruction in the outputs.

For example,

    result0 = texture(sampler[indexBase + 5], coords);
    result1 = texture(sampler[indexBase + 0], coords);
    result2 = texture(sampler[indexBase + 0], coords);
    out_result0 = result0;
    out_result1 = result1;
    out_result2 = result2;

In this kind of case we need to insert an extra mov to the outputs
so that the result could be assigned to each register respectively.

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agofreedreno/ir3: make immediates array dynamic
Hyunjun Ko [Thu, 30 Aug 2018 02:58:53 +0000 (11:58 +0900)]
freedreno/ir3: make immediates array dynamic

Since most shaders wouldn't need that large array of immediates, making
the array dynamic could save unnecessary spaces.

In addition, sometimes we can potentially have a much larger array
of immediates to be lowered, which might be more than 64.

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agofreedreno: allocate ctx's batch on demand
Rob Clark [Mon, 3 Sep 2018 20:33:59 +0000 (16:33 -0400)]
freedreno: allocate ctx's batch on demand

Don't fall over when app wants more than 32 contexts.  Instead allocate
contexts on demand.

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agofreedreno: add fd_context_batch() accessor
Rob Clark [Mon, 3 Sep 2018 20:07:17 +0000 (16:07 -0400)]
freedreno: add fd_context_batch() accessor

For cases in which (after the following commit) ctx->batch may be null.
Prep work for following commit.

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agofreedreno/a6xx: fix mem2gmem for zsbuf
Rob Clark [Sun, 2 Sep 2018 17:24:12 +0000 (13:24 -0400)]
freedreno/a6xx: fix mem2gmem for zsbuf

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agofreedreno/batch: fix crash in !reorder case
Rob Clark [Wed, 29 Aug 2018 20:04:22 +0000 (16:04 -0400)]
freedreno/batch: fix crash in !reorder case

We aren't using the batch-cache if reorder==false.

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agofreedreno/ir3: better compile_error() printing
Rob Clark [Wed, 29 Aug 2018 19:31:13 +0000 (15:31 -0400)]
freedreno/ir3: better compile_error() printing

Try to show the error at the appropriate line of nir

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agofreedreno/a6xx: bordercolor fixes
Rob Clark [Wed, 22 Aug 2018 13:33:06 +0000 (09:33 -0400)]
freedreno/a6xx: bordercolor fixes

Port fixes from a5xx (f0715442)

TODO maybe this should move to shared code, since it seems to be the
same.

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agofreedreno: fix context teardown harder
Rob Clark [Wed, 22 Aug 2018 13:07:37 +0000 (09:07 -0400)]
freedreno: fix context teardown harder

The border_color_uploaders need to be torn down before the transfer_pool
is destroyed.

Fixes: e11e9d63943 freedreno: fix context teardown race
Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agofreedreno/ir3: ignore unused inputs
Rob Clark [Tue, 21 Aug 2018 12:33:39 +0000 (08:33 -0400)]
freedreno/ir3: ignore unused inputs

We could end up w/ inputs larger than vec4, simply because unused inputs
are not split.

Fixes things like dEQP-GLES31.functional.separate_shader.random.77 (and
probably a handful of others)

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agofreedreno/a6xx: fix debug build crash
Rob Clark [Mon, 20 Aug 2018 14:55:37 +0000 (10:55 -0400)]
freedreno/a6xx: fix debug build crash

Porting 0c8d9e923aa9239e20f9bc969faf9caa0b85237f to a6xx.

Signed-off-by: Rob Clark <robdclark@gmail.com>
6 years agomeson: Print a message about why a libdrm version was selected
Dylan Baker [Tue, 4 Sep 2018 21:42:07 +0000 (14:42 -0700)]
meson: Print a message about why a libdrm version was selected

We require a single version of libdrm for all of our libdrm
dependencies (core and driver), but the way this is structured can make
the error message less than helpful, as one driver might be the one
setting the libdrm requirement, while another might be the one that
generates the version failure.

This adds a simple message to the output announcing which libdrm module
set the version, which might be more helpful.

v2: - Use message suggested by Eric Engstrom

Fixes: c445b1d56f47922206de55e557444aadb62e11f6
       ("meson: Use the same version for all libdrm checks")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
6 years agosvga: rename face to layer_face
Charmaine Lee [Fri, 5 May 2017 19:16:33 +0000 (12:16 -0700)]
svga: rename face to layer_face

Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>