Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 12:22:43 +0000 (12:22 +0000)]
start removing unneeded imports
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 12:19:04 +0000 (12:19 +0000)]
split out pipeline and statemachine to separate modules
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 12:14:19 +0000 (12:14 +0000)]
split out addstages to separate module
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 12:11:56 +0000 (12:11 +0000)]
split out add1 to separate module
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 12:10:00 +0000 (12:10 +0000)]
split out add stage 0 to separate module
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 12:07:19 +0000 (12:07 +0000)]
split out add align into separate module
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 12:02:53 +0000 (12:02 +0000)]
split out add specialcases to separate module
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 11:56:48 +0000 (11:56 +0000)]
split out putz to separate module
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 11:54:45 +0000 (11:54 +0000)]
split out normtopack to separate module
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 11:51:36 +0000 (11:51 +0000)]
split out pack to separate module
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 11:49:37 +0000 (11:49 +0000)]
split out corrections to separate module
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 11:47:10 +0000 (11:47 +0000)]
split out rounding to separate module
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 11:44:20 +0000 (11:44 +0000)]
remove accidentally-included code
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 11:43:19 +0000 (11:43 +0000)]
move FPID to fpbase
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 11:42:30 +0000 (11:42 +0000)]
split out normalisation to separate module
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 11:35:44 +0000 (11:35 +0000)]
split out prenormalisation to separate module
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 11:33:28 +0000 (11:33 +0000)]
split out denorm to separate module
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 11:29:53 +0000 (11:29 +0000)]
start splitting out common code from nmigen_add_experiment.py
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 11:29:32 +0000 (11:29 +0000)]
create separate pipeline examples
Luke Kenneth Casson Leighton [Fri, 29 Mar 2019 01:24:17 +0000 (01:24 +0000)]
new ObjectProxy class for use in pipelines
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 23:22:33 +0000 (23:22 +0000)]
use Signal.like instead of value_bits_sign
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 23:07:55 +0000 (23:07 +0000)]
use singlepipe.eq function
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 20:15:16 +0000 (20:15 +0000)]
add test, temporary comb variable to stage2
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 16:46:17 +0000 (16:46 +0000)]
make FPGet2Ops conform to Stage API, use in compact StageChain
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 16:40:02 +0000 (16:40 +0000)]
use StageChain in FPADDBaseMod compact mode
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 16:38:22 +0000 (16:38 +0000)]
missed out assignment in new specallocate=True StageChain mode
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 16:31:05 +0000 (16:31 +0000)]
add new mode to StageChain which uses python output variables
instead of allocating ispec/ospec
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 16:06:54 +0000 (16:06 +0000)]
use StageChain for SCDeNorm
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 15:55:14 +0000 (15:55 +0000)]
solve sync/comb issue with using state-machine or pipeline in DeNorm block
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 15:51:47 +0000 (15:51 +0000)]
solve sync/comb issue with using state-machine or pipeline in FPNormToPack
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 15:49:49 +0000 (15:49 +0000)]
solve sync/comb for stage/state
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 15:03:07 +0000 (15:03 +0000)]
add comments as a reminder to make code use sync for state-based
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 14:54:09 +0000 (14:54 +0000)]
multi-out temporary, simplify graphs
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 14:50:35 +0000 (14:50 +0000)]
try tidyup on multi-in ready/valid logic
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 14:45:55 +0000 (14:45 +0000)]
create temporary, simplifies graph
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 14:38:55 +0000 (14:38 +0000)]
cleanup
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 14:36:42 +0000 (14:36 +0000)]
move inputgroup to separate module
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 14:32:23 +0000 (14:32 +0000)]
remove redundant code
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 14:18:24 +0000 (14:18 +0000)]
add comments
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 14:16:11 +0000 (14:16 +0000)]
remove unneeded ports functions
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 14:14:56 +0000 (14:14 +0000)]
use PassThroughStage
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 14:14:21 +0000 (14:14 +0000)]
create base multi-in ports function
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 14:07:44 +0000 (14:07 +0000)]
move flexible ports fn to MultiOutControlBase
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 14:02:35 +0000 (14:02 +0000)]
use PassThroughStage instead of making one
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 13:59:41 +0000 (13:59 +0000)]
whitespace
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 13:54:30 +0000 (13:54 +0000)]
cleanup: remove redundant classes/code
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 13:51:01 +0000 (13:51 +0000)]
reorg, move similar classes to multipipe
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 13:41:58 +0000 (13:41 +0000)]
move PriorityCombMuxInPipe to multipipe
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 12:46:26 +0000 (12:46 +0000)]
woo! got FPADD pipeline to work
required some m.d.sync to be converted to m.d.comb in multi-stage chains
state-based version did not care but pipeline did
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 10:55:23 +0000 (10:55 +0000)]
create actual FPADD Pipeline from stages
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 10:23:26 +0000 (10:23 +0000)]
move decode from FPNumOp to SpecialCases
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 09:05:31 +0000 (09:05 +0000)]
move classes to before use
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 09:02:58 +0000 (09:02 +0000)]
add process function to FPGet2OpMod
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 04:14:22 +0000 (04:14 +0000)]
modify FPPackData to just a signal and mid
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 04:06:30 +0000 (04:06 +0000)]
remove FPADDStageIn, use FPADDBaseData
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 03:45:36 +0000 (03:45 +0000)]
complicated. change ControlBase.connect API to return list of eq statements
nmigen module elaborate is not done recursively on submodules in
depth-first order. connect fn was having a side-effect of establishing
the p.i_data and n.o_data... which were not set up from a submodule yet.
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 03:40:29 +0000 (03:40 +0000)]
remove print debug statements
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 03:39:57 +0000 (03:39 +0000)]
add unit test for multi-in multi-out FPADDBasePipe
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 03:28:04 +0000 (03:28 +0000)]
rename pipes
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 01:56:14 +0000 (01:56 +0000)]
add start of FPADD Fan-in / Fan-out pipeline
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 00:51:11 +0000 (00:51 +0000)]
whoops connect 2nd pipe to outpipe
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 00:29:23 +0000 (00:29 +0000)]
add sub-calling of ports on o_data/i_data in ControlBase.ports
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 00:27:26 +0000 (00:27 +0000)]
make FPADDBasePipe derive from ControlBase
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 00:14:51 +0000 (00:14 +0000)]
add process function to AddSpecialCasesMod
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 00:13:42 +0000 (00:13 +0000)]
add ospec/ispec to FPAddSpecialCasesDeNorm, also comment out out_do_z
Luke Kenneth Casson Leighton [Thu, 28 Mar 2019 00:09:17 +0000 (00:09 +0000)]
add process function to 3 stage-chained modules
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 23:28:00 +0000 (23:28 +0000)]
add comments
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 23:25:33 +0000 (23:25 +0000)]
add comments
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 23:18:04 +0000 (23:18 +0000)]
add comments
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 21:43:15 +0000 (21:43 +0000)]
remove print statement
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 21:43:06 +0000 (21:43 +0000)]
add inout muxer test
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 21:42:53 +0000 (21:42 +0000)]
add sync pipe to outmux test
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 21:07:41 +0000 (21:07 +0000)]
add important detection ArrayProxy and workaround in eq()
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 21:07:13 +0000 (21:07 +0000)]
remove unneeded data_value
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 14:57:22 +0000 (14:57 +0000)]
give example data out a name
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 14:54:57 +0000 (14:54 +0000)]
reorganise MultiOutPipe, seems to be near-identical to UnbufferedPipeline
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 14:27:06 +0000 (14:27 +0000)]
move data_valid to local variable
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 14:26:53 +0000 (14:26 +0000)]
move data_valid to local variable
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 14:08:04 +0000 (14:08 +0000)]
add start of outputmux pipe test
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 13:55:35 +0000 (13:55 +0000)]
lost removal of result intermediary from UnbufferedPipeline
combinatorial result intermediary not necessary, was removed earlier
and got restored accidentally when reverting array-based pipeline
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 13:20:20 +0000 (13:20 +0000)]
whitespace cleanup
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 12:38:37 +0000 (12:38 +0000)]
add comment
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 12:34:44 +0000 (12:34 +0000)]
whoops, cut/paste from email resulted in weird EOL characters
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 12:30:35 +0000 (12:30 +0000)]
add comment that i_data and o_data have to be added by user
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 12:27:31 +0000 (12:27 +0000)]
tidy up comments
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 11:06:08 +0000 (11:06 +0000)]
add RecordBasedStage, PassThroughStage and RegisterPipeline classes
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 09:17:16 +0000 (09:17 +0000)]
split out pipeline classes into singlepipe.py
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 09:11:05 +0000 (09:11 +0000)]
update comments
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 09:06:10 +0000 (09:06 +0000)]
update comments
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 09:04:44 +0000 (09:04 +0000)]
rename MultiIn/Out to MultiIn/OutControlBase
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 08:49:10 +0000 (08:49 +0000)]
update comments
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 08:46:02 +0000 (08:46 +0000)]
rename connect_in/out to _connect_in/out in multipipe
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 08:16:14 +0000 (08:16 +0000)]
identify test 9 code with comment
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 08:15:36 +0000 (08:15 +0000)]
2-chain pipeline doesnt need pipe instances to be members
move to local variables
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 08:13:15 +0000 (08:13 +0000)]
replace manual pipe-connection with a general-purpose ControlBase.connect
Luke Kenneth Casson Leighton [Wed, 27 Mar 2019 07:40:11 +0000 (07:40 +0000)]
update comments
Luke Kenneth Casson Leighton [Tue, 26 Mar 2019 14:23:25 +0000 (14:23 +0000)]
add multi-out pipe module (untested)
Luke Kenneth Casson Leighton [Tue, 26 Mar 2019 13:26:53 +0000 (13:26 +0000)]
rename PipelineBase to MultiInControl in multi-input pipe
Luke Kenneth Casson Leighton [Tue, 26 Mar 2019 13:26:34 +0000 (13:26 +0000)]
document and clarify test cases for pipeline
Luke Kenneth Casson Leighton [Tue, 26 Mar 2019 13:15:52 +0000 (13:15 +0000)]
add abstract Stage classes, rename PipelineBase to ControlBase