Luke Kenneth Casson Leighton [Mon, 29 Jul 2019 20:47:14 +0000 (21:47 +0100)]
minor tidyup
Luke Kenneth Casson Leighton [Mon, 29 Jul 2019 20:38:13 +0000 (21:38 +0100)]
add explicit operator comparison (in case operation enum is changed)
Luke Kenneth Casson Leighton [Mon, 29 Jul 2019 20:33:56 +0000 (21:33 +0100)]
clarify / get indentation down
Luke Kenneth Casson Leighton [Mon, 29 Jul 2019 20:29:20 +0000 (21:29 +0100)]
replace m.d.comb with comb (reduce indentation)
Luke Kenneth Casson Leighton [Mon, 29 Jul 2019 15:03:16 +0000 (16:03 +0100)]
tidyup
Jacob Lifshay [Mon, 29 Jul 2019 14:13:03 +0000 (07:13 -0700)]
fix the mess introduced by "fix pipeline stage count"
not a pure revert
This reverts commit
30a3d1e975cd3df7ea701fdf0fe3bd0ba0757d3e.
Luke Kenneth Casson Leighton [Mon, 29 Jul 2019 13:50:39 +0000 (14:50 +0100)]
add fprsqrt coverage tests for fp16 and fp32
Luke Kenneth Casson Leighton [Mon, 29 Jul 2019 13:43:37 +0000 (14:43 +0100)]
add comment on n_comb_stages
Luke Kenneth Casson Leighton [Mon, 29 Jul 2019 13:41:29 +0000 (14:41 +0100)]
add FP32/64 coverage test for fpsqrt
Luke Kenneth Casson Leighton [Mon, 29 Jul 2019 13:26:54 +0000 (14:26 +0100)]
id_wid (muxid bitwidth) based on num_rows, not the data width
Luke Kenneth Casson Leighton [Mon, 29 Jul 2019 13:18:26 +0000 (14:18 +0100)]
add fpsqrt 16 coverage test
Jacob Lifshay [Sun, 28 Jul 2019 23:16:19 +0000 (16:16 -0700)]
fix pipeline stage count
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 20:28:11 +0000 (21:28 +0100)]
remove redundant imports
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 20:23:51 +0000 (21:23 +0100)]
move fpcvt downsize to separate module
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 20:21:15 +0000 (21:21 +0100)]
move fpcvt upsize to separate module
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 20:19:15 +0000 (21:19 +0100)]
substitute comb for m.d.comb
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 20:13:02 +0000 (21:13 +0100)]
simplify code
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 20:11:47 +0000 (21:11 +0100)]
split out int2float fcvt to separate module
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 19:48:48 +0000 (20:48 +0100)]
move float2int fcvt to separate module
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 19:46:07 +0000 (20:46 +0100)]
simplify
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 19:43:58 +0000 (20:43 +0100)]
add code comments
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 19:27:42 +0000 (20:27 +0100)]
add F2Int f64 i64 test
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 19:23:22 +0000 (20:23 +0100)]
add signed FP2INT
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 17:09:44 +0000 (18:09 +0100)]
add TODO, check mantissa overflow
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 17:00:17 +0000 (18:00 +0100)]
add f2int f64->ui64
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 16:53:18 +0000 (17:53 +0100)]
exponent too big to fit FP2int
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 16:48:57 +0000 (17:48 +0100)]
add NaN FP2int overflow
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:33:45 +0000 (13:33 +0100)]
add code comments
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:32:59 +0000 (13:32 +0100)]
add code comments
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:25:42 +0000 (13:25 +0100)]
initialise unused PipelineSpec params to None
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:25:15 +0000 (13:25 +0100)]
add identifying name to FPNumBaseRecord
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:25:06 +0000 (13:25 +0100)]
add identifying name to FPNumBaseRecord
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:24:49 +0000 (13:24 +0100)]
add name to FPNumBaseRecord
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:15:34 +0000 (13:15 +0100)]
use opcode rather than magic constants (will need a class, later)
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:14:40 +0000 (13:14 +0100)]
whitespace / autopep8
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:14:19 +0000 (13:14 +0100)]
get fpdiv/fsqrt/frsqrt up and running
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:12:55 +0000 (13:12 +0100)]
whitespace (autopep8)
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:12:35 +0000 (13:12 +0100)]
add identifying name to FPNumBaseRecord
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:12:11 +0000 (13:12 +0100)]
add identifying name to FPNumBaseRecord
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:11:57 +0000 (13:11 +0100)]
whitespace, add identifying name to FPNumBaseRecord
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:11:15 +0000 (13:11 +0100)]
whitespace
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:09:46 +0000 (13:09 +0100)]
add debug prints
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 12:09:24 +0000 (13:09 +0100)]
add .il.* to gitignore
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 11:54:20 +0000 (12:54 +0100)]
split out fclass module to separate file
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 11:45:26 +0000 (12:45 +0100)]
update fclass and FPFormat after review
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 10:21:12 +0000 (11:21 +0100)]
add f32/f64 fclass
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 09:50:26 +0000 (10:50 +0100)]
fclass test
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 08:52:04 +0000 (09:52 +0100)]
add debugging fclass
Luke Kenneth Casson Leighton [Sun, 28 Jul 2019 08:32:54 +0000 (09:32 +0100)]
replace hard-coded "stuff" with FPFormat functions
Luke Kenneth Casson Leighton [Sat, 27 Jul 2019 23:09:01 +0000 (00:09 +0100)]
redo fclss to simpler layout
Luke Kenneth Casson Leighton [Sat, 27 Jul 2019 15:02:50 +0000 (16:02 +0100)]
add testing functions to FPFormat
Luke Kenneth Casson Leighton [Sat, 27 Jul 2019 05:21:39 +0000 (06:21 +0100)]
add fpclass pipeline (1st version)
Luke Kenneth Casson Leighton [Fri, 26 Jul 2019 12:43:53 +0000 (13:43 +0100)]
start to get FP to INT working
Luke Kenneth Casson Leighton [Fri, 26 Jul 2019 10:56:27 +0000 (11:56 +0100)]
add first version test fp to int convert
Luke Kenneth Casson Leighton [Thu, 25 Jul 2019 15:52:14 +0000 (16:52 +0100)]
get test_div64.py back up and running (just... because)
Luke Kenneth Casson Leighton [Thu, 25 Jul 2019 10:57:52 +0000 (11:57 +0100)]
remove near-identical duplicated code, replace with "factory" in FCVT classes
Luke Kenneth Casson Leighton [Thu, 25 Jul 2019 08:57:14 +0000 (09:57 +0100)]
correct FPRSQRT specialcases
Jacob Lifshay [Thu, 25 Jul 2019 07:10:19 +0000 (00:10 -0700)]
switch fpdiv/test/test_fp*.py to use unittest
Jacob Lifshay [Thu, 25 Jul 2019 06:48:23 +0000 (23:48 -0700)]
skip slow tests
Jacob Lifshay [Thu, 25 Jul 2019 06:41:01 +0000 (23:41 -0700)]
Revert "reduce LHS for RSQRT by a factor of fract_width and"
This reverts commit
c6149c74b64a00d0ca8059468e8709ccb200e301.
Luke Kenneth Casson Leighton [Wed, 24 Jul 2019 12:08:18 +0000 (13:08 +0100)]
add new FP32-FRSQRT regression test
Luke Kenneth Casson Leighton [Wed, 24 Jul 2019 10:24:42 +0000 (11:24 +0100)]
fix shifting of rsqrt mantissa input
Luke Kenneth Casson Leighton [Wed, 24 Jul 2019 10:13:19 +0000 (11:13 +0100)]
semi-working after "hack" to reduce LHS of algorithm by fract_width
Luke Kenneth Casson Leighton [Wed, 24 Jul 2019 10:12:40 +0000 (11:12 +0100)]
add rsqrt specialcases
Luke Kenneth Casson Leighton [Wed, 24 Jul 2019 10:11:53 +0000 (11:11 +0100)]
reduce LHS for RSQRT by a factor of fract_width and
"sensible answers" start appearing from the div/sqrt/rsqrt algorithm
Luke Kenneth Casson Leighton [Wed, 24 Jul 2019 08:28:55 +0000 (09:28 +0100)]
add fsqrt test
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 21:44:25 +0000 (22:44 +0100)]
reduce am0/bm0 by 2 bits in DIV
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 21:40:45 +0000 (22:40 +0100)]
hmmm remove extra zeros on DIV mantissas
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 21:33:10 +0000 (22:33 +0100)]
more comments
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 21:26:13 +0000 (22:26 +0100)]
reduce next_bits by 1
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 21:21:53 +0000 (22:21 +0100)]
clean up comments
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 21:15:43 +0000 (22:15 +0100)]
use PriorityEncoder and Array selection
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 20:40:45 +0000 (21:40 +0100)]
store bits in signals, cleans up graphviz
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 16:44:32 +0000 (17:44 +0100)]
specialcases: sqrt of -ve zero is -ve zero
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 16:30:01 +0000 (17:30 +0100)]
remove debug prints
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 16:27:22 +0000 (17:27 +0100)]
hack which happens to get fsqrt preliminarily working
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 16:18:31 +0000 (17:18 +0100)]
add more fpsqrt specialcases
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 15:43:45 +0000 (16:43 +0100)]
add more fpsqrt specialcases
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 15:43:04 +0000 (16:43 +0100)]
add more fpsqrt specialcases
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 15:41:50 +0000 (16:41 +0100)]
add fsqrt test
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 15:41:08 +0000 (16:41 +0100)]
start adding FPSQRT specialcases
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 15:36:11 +0000 (16:36 +0100)]
add fpsqrt experiment
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 14:40:25 +0000 (15:40 +0100)]
tidyup
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 11:45:38 +0000 (12:45 +0100)]
split out div/sqrt/rsqrt trials to separate module
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 10:00:15 +0000 (11:00 +0100)]
tidyup a bit
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 09:29:37 +0000 (10:29 +0100)]
reduce n_comb_stages for fpdiv first setup
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 09:17:08 +0000 (10:17 +0100)]
add magic constants comment
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 09:15:51 +0000 (10:15 +0100)]
add some voodoo magic extra bits on the input numbers in fpdiv
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 09:05:50 +0000 (10:05 +0100)]
reorganise loop
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 07:52:14 +0000 (08:52 +0100)]
update explanatory comments
Luke Kenneth Casson Leighton [Tue, 23 Jul 2019 07:10:55 +0000 (08:10 +0100)]
add fpdiv 16/32 regression/coverage tests
Luke Kenneth Casson Leighton [Mon, 22 Jul 2019 20:24:42 +0000 (21:24 +0100)]
corrections to mantissa length, FP16/32/64 DIV work (preliminary)
Luke Kenneth Casson Leighton [Mon, 22 Jul 2019 19:39:49 +0000 (20:39 +0100)]
FP16 DIV seems to be working
Luke Kenneth Casson Leighton [Mon, 22 Jul 2019 17:49:50 +0000 (18:49 +0100)]
more random experimenting
Luke Kenneth Casson Leighton [Mon, 22 Jul 2019 16:19:37 +0000 (17:19 +0100)]
random modifications
Luke Kenneth Casson Leighton [Mon, 22 Jul 2019 15:55:04 +0000 (16:55 +0100)]
random modifications got semi-correct output
Luke Kenneth Casson Leighton [Mon, 22 Jul 2019 13:28:21 +0000 (14:28 +0100)]
continuing experimentation
Luke Kenneth Casson Leighton [Mon, 22 Jul 2019 12:06:42 +0000 (13:06 +0100)]
add twin MSB alignment / denormalisation (from FPMUL)
Luke Kenneth Casson Leighton [Mon, 22 Jul 2019 11:19:58 +0000 (12:19 +0100)]
experimenting
Luke Kenneth Casson Leighton [Mon, 22 Jul 2019 10:46:40 +0000 (11:46 +0100)]
set fraction width to zero