Eric Engestrom [Tue, 8 Aug 2017 15:17:13 +0000 (16:17 +0100)]
egl: whitespace cleanup in eglapi.c
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Iago Toral Quiroga [Mon, 7 Aug 2017 04:18:24 +0000 (06:18 +0200)]
TextureStorage1D should return INVALID_OPERATION if target is not a 1D texture
Previous behavior was inconsistent with other texture targets so this has been
fixed in OpenGL 4.6.
Fixes:
KHR-GL45.direct_state_access.textures_storage_errors
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Iago Toral Quiroga [Mon, 7 Aug 2017 04:18:23 +0000 (06:18 +0200)]
Update TextureParameter* error for incompatible texture targets
The OpenGL 4.6 specs have been updated so that GetTextureParameter*
with a texture object with an incompatible TEXTURE_TARGET should now
report INVALID_OPERATION instead of INVALID_ENUM.
Fixes:
KHR-GL45.direct_state_access.textures_parameter_errors
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tapani Pälli [Tue, 8 Aug 2017 07:52:26 +0000 (10:52 +0300)]
egl/dri2: refactor dri2_query_surface, swrastGetDrawableInfo
Currently swrastGetDrawableInfo always initializes w and h, patch
refactors function as x11_get_drawable_info that returns success and
sets the values only if no error happened. Add swrastGetDrawableInfo
wrapper function as expected by DRI extension.
v2: init w,y,w,h in swrastGetDrawableInfo (Eric)
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reported-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Kenneth Graunke [Thu, 3 Aug 2017 01:06:05 +0000 (18:06 -0700)]
i965/bufmgr: Set bo->idle after waiting.
After a successful wait, we know the buffer ought to be idle.
Chris points out that: "The only caveat here is that bo is global, and
we have a very unlikely (and probably unnoticeable) race condition with
multiple contexts."
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Kenneth Graunke [Thu, 3 Aug 2017 07:41:37 +0000 (00:41 -0700)]
i965: Don't use ggtt_bo for Gen8+ streamout offset buffer.
RELOC_NEEDS_GGTT is only meaningful on Sandybridge - it's skipped on
other generations - so this has no purpose. Just use rw_bo().
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Kenneth Graunke [Thu, 3 Aug 2017 07:37:29 +0000 (00:37 -0700)]
i965: Simplify *_bo() helpers.
With the reloc domains gone, most of these are basically the same,
and the names don't make much sense anymore. Simplify them to ro_bo(),
rw_bo(), and ggtt_bo().
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Kenneth Graunke [Thu, 3 Aug 2017 07:33:47 +0000 (00:33 -0700)]
i965: Get rid of KSP_ro
The GPU reads the shader kernel from the program cache BO. It never
writes it, so using a read-write BO reference makes no sense.
Just make KSP read-only, and drop KSP_ro.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Connor Abbott [Mon, 7 Aug 2017 22:56:50 +0000 (15:56 -0700)]
ac/nir: fix saturate emission
The .f32 was already getting added by emit_intrin_2f_param(). Noticed
when enabling LLVM module verification.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Jason Ekstrand [Mon, 31 Jul 2017 20:33:45 +0000 (13:33 -0700)]
i965: Only call create_for_planar_image for multiple planes
Before, we ended up always calling miptree_create_for_planar_image in
almost all cases because most images have image->planar_format != NULL.
This commit makes us only take that path if we have a multi-planar
format.
Reviewed-by: Daniel Stone <daniels@collabora.com>
Timothy Arceri [Wed, 26 Jul 2017 01:11:02 +0000 (11:11 +1000)]
mesa: don't error check the default buffer object
An allocation check is already done when the buffer is created at
context creation.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Timothy Arceri [Wed, 26 Jul 2017 01:11:01 +0000 (11:11 +1000)]
mesa: check default buffer object creation was successful
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Timothy Arceri [Wed, 26 Jul 2017 01:11:00 +0000 (11:11 +1000)]
mesa: add NULL checking to free_shared_state()
This will allow us to call this function from
_mesa_alloc_shared_state() in the case that we run out of memory
part way through allocating the state.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Ilia Mirkin [Sun, 6 Aug 2017 14:39:06 +0000 (10:39 -0400)]
glapi: per the extension spec, the EXT-suffixed function should be used
We already expose glMultiDrawElementsBaseVertexEXT as part of the
EXT_draw_elements_base_vertex chunk, so this one can just be removed.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Ilia Mirkin [Sun, 6 Aug 2017 14:33:30 +0000 (10:33 -0400)]
include: update GLES gl2ext header to no longer reference bad function
There was a previous error in the gl.xml and generated files that
referenced glMultiDrawElementsBaseVertexOES. This function should not
exist, only the EXT-suffixed version should.
Leaving the other headers alone to avoid conflicts with GL 4.6 work.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Bas Nieuwenhuizen [Mon, 7 Aug 2017 22:01:47 +0000 (00:01 +0200)]
radv: remove semicolon in if(...);
Trivial.
Fixes: a6a6146aa91 "radv: Don't allow fmask swizzling for shareable images."
Alex Smith [Thu, 3 Aug 2017 14:32:46 +0000 (15:32 +0100)]
radv: Fix decompression on multisampled depth buffers
Need to take the sample count into account in the depth decompress and
resummarize pipelines and render pass.
Fixes: f4e499ec791 ("radv: add initial non-conformant radv vulkan driver")
Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Bas Nieuwenhuizen [Mon, 7 Aug 2017 21:34:00 +0000 (23:34 +0200)]
radv: Don't allow fmask swizzling for shareable images.
Also adds an assert because you never know how the winsys changes, and
multiprocess format differences are annoying.
Fixes: 1e696b962b7 "radv: add separate fmask tile swizzle counter."
Reviewed-by: Dave Airlie <airlied@redhat.com>
Marek Olšák [Mon, 7 Aug 2017 20:51:45 +0000 (22:51 +0200)]
radeonsi: fix a compile failure due to disabled asserts
Marek Olšák [Fri, 4 Aug 2017 15:38:57 +0000 (17:38 +0200)]
radeonsi: use optimal packet order when doing a pipeline sync
Process most new SET packets in parallel with previous draw calls, then
flush caches and wait, start the draw, and do L2 prefetches last.
This decreases the [CP busy / SPI busy] ratio (verified with GRBM perf
counters). In other words, the time window when shaders are idle (between
(the wait and the draw) is much shorter now.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 4 Aug 2017 13:26:55 +0000 (15:26 +0200)]
radeonsi: expose the number of decompress calls to the HUD
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 4 Aug 2017 13:19:24 +0000 (15:19 +0200)]
gallium/radeon: rename GPU-dma-busy -> GPU-cp-dma-busy
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 4 Aug 2017 01:26:38 +0000 (03:26 +0200)]
radeonsi: rename shader_userdata -> shader_pointers where appropriate
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 4 Aug 2017 15:26:58 +0000 (17:26 +0200)]
radeonsi: prefetch VBO descriptors after the first VGT shader
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 4 Aug 2017 15:10:58 +0000 (17:10 +0200)]
radeonsi: add a separate dirty mask for prefetches
so that we don't rely on si_pm4_state_enabled_and_changed, allowing us
to move prefetches after draw calls.
v2: ckear the dirty mask after unbinding shaders
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> (v1)
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
Marek Olšák [Fri, 4 Aug 2017 15:06:24 +0000 (17:06 +0200)]
radeonsi: add and use si_pm4_state_enabled_and_changed
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Sat, 29 Jul 2017 19:07:23 +0000 (21:07 +0200)]
radeonsi: de-atomize L2 prefetch
I'd like to be able to move the prefetch call site around.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Tue, 1 Aug 2017 12:26:21 +0000 (14:26 +0200)]
radeonsi: align all CE dumps to L2 cache line size
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Wed, 2 Aug 2017 22:01:49 +0000 (00:01 +0200)]
radeonsi: remove a tautology sctx->framebuffer.nr_samples >= 1
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Marek Olšák [Fri, 4 Aug 2017 00:08:54 +0000 (02:08 +0200)]
gallium/radeon: print all members of radeon_info with R600_DEBUG=info
also set max_alignment on amdgpu.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Samuel Pitoiset [Wed, 2 Aug 2017 11:52:04 +0000 (13:52 +0200)]
glsl: update the extensions/functions that are enabled for 460
Other ones are either unsupported or don't have any helper
function checks.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Gurchetan Singh [Tue, 1 Aug 2017 21:51:40 +0000 (14:51 -0700)]
egl/dri2: add image extension such it's usable by swrast driver
Otherwise, this extension is not visible to the EGL users who
use the swrast driver.
This will allow the swrast driver to use eglCreateImageKHR,
provided the target is EGL_GL_TEXTURE_2D_KHR or
EGL_GL_RENDERBUFFER_KHR. Note we still have to implement the
create from render buffer path.
v2: add it to optional_core_extensions instead of swrast_core_extensions,
so it's not a requirement (Emil)
v3: Merge egl/dri2 changes together, also add support for
platform_wayland (Emil)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
Gurchetan Singh [Tue, 1 Aug 2017 21:49:33 +0000 (14:49 -0700)]
st/dri: add drisw image extension
Since the revelant functions have been moved to dri_helpers,
drisw.c can make use of the extension. Note we have version 6
of the extension, since we want to support createImageFromTexture.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Gurchetan Singh [Fri, 28 Jul 2017 03:48:22 +0000 (20:48 -0700)]
st/dri: move some image functions to dri_helpers.c
These functions will be used both by drisw.c and
dri2.c. This patch also moves some headers that can
be shared.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Gurchetan Singh [Fri, 28 Jul 2017 03:48:08 +0000 (20:48 -0700)]
st/dri: organize order of includers in dri_helpers
Although it doesn't seem like a strict requirement of the
code base, we do it when possible and it looks nice.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Gurchetan Singh [Fri, 28 Jul 2017 03:47:51 +0000 (20:47 -0700)]
st/dri: change dri_extensions to dri_helpers
These files provide helper structs and functions for dri2.c and drisw.c,
and name change better conveys that.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Jason Ekstrand [Thu, 3 Aug 2017 16:48:55 +0000 (09:48 -0700)]
i965/miptree: Set supports_fast_clear = false in make_shareable
The make_shareable function deletes the aux buffer and then whacks
aux_usage to ISL_AUX_USAGE_NONE but not unsetting supports_fast_clear.
Since we only look at supports_fast_clear to decide whether or not to do
fast clears, this was causing assertion failures.
Reported-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101925
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Jason Ekstrand [Wed, 2 Aug 2017 18:50:12 +0000 (11:50 -0700)]
i965/miptree: Rework create flags
The only one of the three remaining flags that has anything whatsoever
to do with layout is TILING_NONE. This commit renames them to
MIPTREE_CREATE_*, documents the meaning of each flag, and makes the
create functions take an actual enum type so GDB will print them nicely.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jason Ekstrand [Wed, 2 Aug 2017 18:28:02 +0000 (11:28 -0700)]
i965/miptree: Delete MIPTREE_LAYOUT_TILING_(Y|ANY)
The only force tiling flag we really care about is LAYOUT_TILING_NONE.
The others don't actually do anything but add confusion.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jason Ekstrand [Wed, 2 Aug 2017 18:22:34 +0000 (11:22 -0700)]
i965/miptree: Delete an unused function declaration
The implementation of brw_miptree_layout was removed in
bf24c3539e4b69.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jason Ekstrand [Wed, 2 Aug 2017 18:07:36 +0000 (11:07 -0700)]
i965/miptree: Call alloc_aux in create_for_bo
Originally, I had moved it to the caller to make some things easier when
adding the CCS modifier. However, this broke DRI2 because
intel_process_dri2_buffer calls intel_miptree_create_for_bo but never
calls intel_miptree_alloc_aux. Also, in hindsight, it should be pretty
easy to make the CCS modifier stuff work even if create_for_bo allocates
the CCS when DISABLE_AUX is not set.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Wed, 2 Aug 2017 17:54:44 +0000 (10:54 -0700)]
i965/miptree: Delete MIPTREE_LAYOUT_FOR_SCANOUT
The flag hasn't affected actual surface layout for some time. The only
purpose it served was to set bo->cache_coherent = false on the BO used
to create the miptree. This is fairly silly because we can just set
that directly from the caller where it makes much more sense.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jason Ekstrand [Wed, 2 Aug 2017 17:48:58 +0000 (10:48 -0700)]
i965/miptree: Delete some unused layout flags
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jason Ekstrand [Wed, 2 Aug 2017 17:41:18 +0000 (10:41 -0700)]
i965/miptree: Refactor is_mcs_supported
We rename it to intel_miptree_supports_mcs and make the function
signature match intel_miptree_supports_ccs/hiz. We also move the sample
count check into the function so it returns false for single-sampled
surfaces.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jason Ekstrand [Wed, 2 Aug 2017 17:37:36 +0000 (10:37 -0700)]
i965/miptree Remove layout_flags parameter form is_mcs_supported
The one caller of is_mcs_supported passes 0 in as the layout_flags
unconditionally.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Jason Ekstrand [Wed, 2 Aug 2017 19:18:25 +0000 (12:18 -0700)]
intel/isl: Don't align the height of the last array slice
We were calculating the total height of 2D surfaces by multiplying the
row pitch by the number of slices. This means that we actually request
slightly more space than actually needed since the padding on the last
slice is unnecessary. For tiled surfaces this is not likely to make a
difference. For linear surfaces, on the other hand, this means we may
require additional memory. In particular, this makes the i965 driver
reject EGL imports of buffers which do not have this extra padding.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Mon, 31 Jul 2017 15:33:22 +0000 (08:33 -0700)]
intel/isl: Stop padding surfaces
The docs contain a bunch of commentary about the need to pad various
surfaces out to multiples of something or other. However, all of those
requirements are about avoiding GTT errors due to missing pages when the
data port or sampler accesses slightly out-of-bounds. However, because
the kernel already fills all the empty space in our GTT with the scratch
page, we never have to worry about faulting due to OOB reads. There are
two caveats to this:
1) There is some potential for issues with caches here if extra data
ends up in a cache we don't expect due to OOB reads. However,
because we always trash the entire cache whenever we need to move
anything between cache domains, this shouldn't be an issue.
2) There is a potential issue if a surface gets placed at the very top
of the GTT by the kernel. In this case, the hardware could
potentially end up trying to read past the top of the GTT. If it
nicely wraps around at the 48-bit (or 32-bit) boundary, then this
shouldn't be an issue thanks to the scratch page. If it doesn't,
then we need to come up with something to handle it.
Up until some of the GL move to ISL, having the padding code in there
just caused us to harmlessly use a bit more memory in Vulkan. However,
now that we're using ISL sizes to validate external dma-buf images,
these padding requirements are causing us to reject otherwise valid
images due to the size of the BO being too small.
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "17.2" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Fri, 4 Aug 2017 02:58:24 +0000 (19:58 -0700)]
anv/formats: Allow sampling on depth-only formats on gen7
We can't sample from depth-stencil formats but on gen7 but we can sample
from depth-only formats.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102024
Reviewed-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Cc: mesa-stable@lists.freedesktop.org
Emil Velikov [Mon, 7 Aug 2017 12:18:25 +0000 (13:18 +0100)]
docs: drop released RCs from the calendar
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 7 Aug 2017 12:14:38 +0000 (13:14 +0100)]
docs: update calendar, add news item and link release notes for 17.1.5
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 7 Aug 2017 12:09:08 +0000 (13:09 +0100)]
docs: add sha256 checksums for 17.1.6
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
2766ed0d45b2c3397de5cbdfa9cf7e03a0fdfb5d)
Emil Velikov [Mon, 7 Aug 2017 12:02:41 +0000 (13:02 +0100)]
docs: add release notes for 17.1.6
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit
3d48433078cb9501c506d2a15834e8dda1a3caef)
Dave Airlie [Mon, 7 Aug 2017 06:39:41 +0000 (07:39 +0100)]
radv: fix MSAA on SI gpus.
This ports the workaround from radeonsi, that was missing in radv.
This fixes Talos rendering when MSAA is enabled on my Tahiti card.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: f4e499ec7 (radv: add initial non-conformant radv vulkan driver)
Signed-off-by: Dave Airlie <airlied@redhat.com>
Eleni Maria Stea [Fri, 4 Aug 2017 17:20:12 +0000 (20:20 +0300)]
docs: removed the '--with-sha1' requirement from shading.html
The configuration option --with-sha1 is no longer required for the
MESA_SHADER_READ_PATH, MESA_SHADER_DUMP_PATH environment variables
to take effect.
1- removed the "--with-sha1" sentence from docs/shading.html
2- added an extra note: that the corresponding dumped and replacement
shaders must have the same filenames for the feature to take effect.
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Dave Airlie [Fri, 4 Aug 2017 05:54:15 +0000 (06:54 +0100)]
radv: add separate fmask tile swizzle counter.
This mirrors what Marek has done for radeonsi, and uses
a separate counter to handle the fmask surface for MSAA
MRTs.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 3 Aug 2017 23:17:34 +0000 (00:17 +0100)]
radv: fix f16->f32 denorm handling for SI/CIK. (v2)
This just copies the code from the -pro shaders,
and fixes the tests on CIK.
With this CIK passes the same set of conformance
tests as VI.
Fixes: 83e58b03 (radv: flush f32->f16 conversion denormals to zero. (v2))
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Wladimir J. van der Laan [Fri, 28 Jul 2017 14:05:16 +0000 (16:05 +0200)]
etnaviv: Add support for R8_UNORM textures
R8_UNORM textures can be emulated by means of L8 and a swizzle.
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Wladimir J. van der Laan [Mon, 24 Jul 2017 08:28:17 +0000 (10:28 +0200)]
etnaviv: Implement ICACHE
This patch adds support for large shaders on GC3000. For example the "terrain"
glmark benchmark with a large fragment shader will work after this.
If the GPU supports ICACHE, shaders larger than the available state area will
be uploaded to a bo of their own and instructed to be loaded from memory on
demand. Small shaders will be uploaded in the usual way. This mimics the
behavior of the blob.
On GPUs that don't support ICACHE, this patch should make no difference.
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Wladimir J. van der Laan [Mon, 24 Jul 2017 08:28:16 +0000 (10:28 +0200)]
etnaviv: Unified uniforms support
GC3000 has changed from a separate store for VS and PS uniforms
to a single, unified one. There is backwards compatibilty functionalty,
however this does not work correctly together with ICACHE.
This patch adds explicit support, although in the simplest way possible:
the PS/VS uniforms split is still fixed and hardcoded. It should
make no difference on hardware that does not have unified uniform
memory.
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Wladimir J. van der Laan [Mon, 24 Jul 2017 08:28:15 +0000 (10:28 +0200)]
etnaviv: Update headers from rnndb
Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Ilia Mirkin [Sun, 6 Aug 2017 17:00:18 +0000 (13:00 -0400)]
fix GL_ARB_spirv_extensions name
Trivial. There is no _gl_ in there.
Bas Nieuwenhuizen [Sat, 5 Aug 2017 23:58:21 +0000 (01:58 +0200)]
radv: Use the correct channel for alpha in resolve srgb conversion.
The argument here is a bitmask, so the old code selected .xy, which
got silently truncated to .x when constructing the vec4 from components,
instead of using .w.
Fixes: 588185eb6b7 "radv/meta: add srgb conversion to end of resolve shader."
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sat, 5 Aug 2017 23:56:17 +0000 (01:56 +0200)]
radv: Only convert linear->srgb in compute resolves.
It justs works with the fragment shader resolve, so no need to do
a custom conversion. In fact with SRGB dest, it actually gives
wrong results.
Fixes: 69136f4e633 "radv/meta: add resolve pass using fragment/vertex shaders"
Reviewed-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Sat, 5 Aug 2017 23:47:09 +0000 (01:47 +0200)]
radv: Don't use SRGB format for image stores during resolve.
These seem to store very bogus results. Luckily there is some code
that converts srgb->linear already, so just making the descriptor
format UNORM should work.
Fixes: 588185eb6b7 "radv/meta: add srgb conversion to end of resolve shader."
Reviewed-by: Dave Airlie <airlied@redhat.com>
Timothy Arceri [Sun, 6 Aug 2017 02:51:12 +0000 (12:51 +1000)]
docs: add EXT_memory_object and EXT_memory_object_fd to relnotes
Andres Rodriguez [Wed, 12 Jul 2017 22:45:32 +0000 (18:45 -0400)]
radeonsi: enable support for EXT_memory_object
v2: fix an indentation error
v3: don't enable for r600
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:31 +0000 (18:45 -0400)]
radv: generate the same driver UUID as radeonsi
These need to match for interop compatibility queries.
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:30 +0000 (18:45 -0400)]
radv: generate same device UUID as radeonsi
This is required for interop use cases. The same device must report
identical UUIDs through the GL and Vulkan APIs so that users can
identify when it is safe to perform a memory object import.
v2: use ac helpers to calculate the uuid
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:27 +0000 (18:45 -0400)]
mesa: hook up queries for NUM_TILING_TYPES and TILING_TYPES
These are just basic implementations.
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Andres Rodriguez [Thu, 13 Jul 2017 02:04:15 +0000 (22:04 -0400)]
radeonsi: hook up device/driver UUID queries
v2: move from r600_common to radeonsi
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:25 +0000 (18:45 -0400)]
ac/gpu: add driver/device UUID query helpers
We need vulkan and gl to produce the same UUIDs. Therefore we should
keep the mechanism to compute these in a common location to guarantee
they are updated in lockstep.
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:24 +0000 (18:45 -0400)]
mesa: hook up UUID queries for driver and device
v2: respective changes for new gallium interface
v3: fix UUID size asserts
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:23 +0000 (18:45 -0400)]
gallium: introduce device/driver UUID queries
v2: remove unnecessary returns
v3 (Timothy Arceri): updated trace
v4 (Timothy Arceri): actually dump the params in trace
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:22 +0000 (18:45 -0400)]
mesa: implement glGetUnsignedByte{v|i_v}
These are used by EXT_external_objects to present UUIDs for the device
and the driver.
v2 (Timothy Arceri):
- remove extra break
- use _mesa_problem() rather the _mesa_error() for unimplemented
support for value types
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:21 +0000 (18:45 -0400)]
mesa/st: expose EXT_memory_object and EXT_memory_object_fd
v2: use PIPE_CAP_MEMOBJ to guard the extension
v3 (Timothy Arceri):
- expose extensions via the cap_mappings array
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Timothy Arceri [Wed, 26 Jul 2017 06:50:44 +0000 (16:50 +1000)]
mesa: hook up (Named)BufferStorageMem api
Include no_error variants as well.
v2 (Timothy Arceri):
- reduced code churn by squashing some changes into
previous commits
v3 (Timothy Arceri):
- drop unused function declaration
v4 (Timothy Arceri):
- fix Driver function assert()
- add missing GL errors
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:18 +0000 (18:45 -0400)]
mesa/st: implement memory objects as a backend for buffer objects
Use a memory object instead of user memory.
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Dave Airlie [Tue, 18 Jul 2017 03:06:18 +0000 (23:06 -0400)]
radeonsi: add basic memory object support
v2: also consider gfx9 metadata
v3: ref/unref memobj->buf
v4: add refcount comment
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:15 +0000 (18:45 -0400)]
radeonsi: factor out metadata import
Plumbing for importing memobj backed textures.
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Dave Airlie [Wed, 12 Jul 2017 22:45:14 +0000 (18:45 -0400)]
mesa/st: implement memory objects as a backend for texture storage
Instead of allocating memory to back a texture, use the provided memory
object.
v2: split off extension exposure logic
v3: de-duplicate code with st_AllocTextureStorage
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:13 +0000 (18:45 -0400)]
mesa/st: factor out st_AllocTextureStorage into a helper
Plumbing for using memory objects as texture storage.
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:12 +0000 (18:45 -0400)]
mesa: hook up memory object multisamples tex(ture)storage api
V2 (Timothy):
- error check memory == 0 before lookup
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:11 +0000 (18:45 -0400)]
mesa: hook up memoryobject tex(ture)storage api
V2 (Timothy Arceri):
- formating fixes
V3 (Timothy):
- error check memory == 0 before lookup
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Dave Airlie [Wed, 12 Jul 2017 22:45:10 +0000 (18:45 -0400)]
mesa/st: start adding memory object support
v2: pass dedicated flag
v3 (Timothy Arceri):
- remove unrequired _mesa_init_memory_object_functions()
call in the state tracker.
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Dave Airlie [Wed, 12 Jul 2017 22:45:09 +0000 (18:45 -0400)]
gallium: introduce memory object
v2: fix comment regarding fd ownership, define pipe_memory_object
v3: remove stray return
v4 (Timothy Arceri): update trace
v5 (Timothy Arceri): actually dump the params in trace
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v3)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:08 +0000 (18:45 -0400)]
mesa: add support for memory object parameters
V2 (Timothy Arceri):
- fix copy and paste error with error message
V3 (Timothy Arceri):
- drop the Protected field for now as its unused
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:07 +0000 (18:45 -0400)]
mesa: add support for memory object creation/import/delete
Used by EXT_external_objects and EXT_external_objects_fd
V2 (Timothy Arceri):
- Throw GL_OUT_OF_MEMORY error if CreateMemoryObjectsEXT()
fails.
- C99 tidy ups
- remove void cast (Constantine Kharlamov)
V3 (Timothy Arceri):
- rename mo -> memObj
- check that the object is not NULL before initializing
- add missing "EXT" in function error message
V4 (Timothy Arceri):
- remove checks for (memory objecy id == 0) and catch in
_mesa_lookup_memory_object() instead.
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Andres Rodriguez [Wed, 12 Jul 2017 22:45:06 +0000 (18:45 -0400)]
mapi: add EXT_external_objects and EXT_external_objects_fd
Includes implementation stubs.
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Aaron Watry [Sat, 22 Jul 2017 02:17:50 +0000 (21:17 -0500)]
clover/device: Move device_version into core and add device_clc_version
The device version is the maximum CL version that the device supports.
device_version and device_clc_version are not necessarily the same for
devices that support CL 1.0, but have a 1.1 compiler and the necessary
extensions.
Eventually, this will be based on the features/extensions of the actual
device, but for now move it a bit closer to its eventual destination.
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Jan Vesey <jan.vesely@rutgers.edu>
Dave Airlie [Fri, 4 Aug 2017 01:13:55 +0000 (02:13 +0100)]
radv: avoid GPU hangs if someone does a resolve with non-multisample src (v2)
This is a bug in the app, but I'd rather avoid hanging the GPU,
esp if someone is running in validation and it takes out their
development environment.
v2: get it right, reverse the polarity.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Emil Velikov [Tue, 1 Aug 2017 23:59:26 +0000 (00:59 +0100)]
loader: drop the [gs]et_swap_interval callbacks
Having two callbacks to manage a single int seems like an overkill.
Use a cached copy and update that when needed.
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
---
Might want to look if the dimensions dance in .query_surface ...
speaking of which close to nobody implements that ...
Emil Velikov [Thu, 3 Aug 2017 13:34:53 +0000 (14:34 +0100)]
egl/x11: don't leak xfixes_query in the error path
If we get a xfixes v1.x we'll error out, without freeing the
xfixes_query reply.
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Emil Velikov [Fri, 4 Aug 2017 16:49:08 +0000 (17:49 +0100)]
loader: rework xmlconfig dependency
Currently xmlconfig is conditionally used, only when --enable-dri is
available.
As the library has moved to src/util and has wider wisebase, this guard
is no longer correct. Strictly speaking - it wasn't since the
introduction of xmlconfig into st/nine a while ago.
Unconditionally enable xmlconfig and drop the linking. As said before
there's other users of the library, so depending on the configure
options we will get multiple definitions of said symbols.
NOTE: To avoid breaking other combinations, this commit adds the
xmlconfig link to the required places - throughout gallium and the DRI
loaders.
Cc: Aaron Watry <awatry@gmail.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Chris Wilson [Fri, 21 Jul 2017 15:36:52 +0000 (16:36 +0100)]
i965: Reduce passing 2x32b of reloc_domains to 2 bits
The kernel only cares about whether the object is to be written to or
not, only reduces (reloc.read_domains, reloc.write_domain) down to just
!!reloc.write_domain. When we use NO_RELOC, the kernel doesn't even read
those relocs and instead userspace has to pass that information in the
execobject.flags. We can simplify our reloc api by also removing the
unused read/write domains and only pass the resultant flags.
The caveat to the above are when we need to make the kernel aware that
certain objects need to take into account different work arounds.
Previously, this was done using the magic (INSTRUCTION, INSTRUCTION)
reloc domains. NO_RELOC requires this to be passed in the execobject
flags as well, and now we push that up the callstack.
The API is more compact, more expressive of what happens underneath, but
unfortunately requires more knowledge of the system at the point of use.
Conversely it also means that knowledge is specific and not generally
applied and so not overused.
text data bss dec hex filename
8502991 356912 424944
9284847 8dacef lib/i965_dri.so (before)
8500455 356912 424944
9282311 8da307 lib/i965_dri.so (after)
v2: (by Ken) Rebase.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Thu, 3 Aug 2017 07:03:15 +0000 (00:03 -0700)]
i965: Convert reloc.target_handle into an index for I915_EXEC_HANDLE_LUT
Based on a patch by Chris Wilson (who also wrote this commit message).
Passing the index of the target buffer via the reloc.target_handle is
marginally more efficient for the kernel (it can avoid some allocations,
and can use a direct lookup rather than a hash or search). It is also
useful for ourselves as we can use the index into our exec_bos for other
tasks.
v2: Only enable HANDLE_LUT if we can use BATCH_FIRST and thereby avoid
a post-processing loop to fixup the relocations.
v3: Move kernel probing from context creation to screen init.
Use batch->use_exec_lut as it more descriptive of what's going on (Daniel)
v4: Kernel features already exists, use it for BATCH_FIRST
Rename locals to preserve current flavouring
v5: Squash in "always insert batch bo first"
v6: (by Ken) Split out BATCH_FIRST from HANDLE_LUT.
Kenneth Graunke [Thu, 3 Aug 2017 07:01:14 +0000 (00:01 -0700)]
i965: Use a C99 initializer for new validation list entries.
More succinct - we can skip a bunch of = 0 lines.
Extracted from a patch by Chris Wilson.
Kenneth Graunke [Thu, 3 Aug 2017 06:58:07 +0000 (23:58 -0700)]
i965: Simplify some bo != batch->bo special cases.
Extracted from a patch by Chris Wilson.
Now that the batch is always at the front of the validation list,
we don't need to special case it - the usual "go find an existing BO"
code will work just fine.
Kenneth Graunke [Thu, 3 Aug 2017 06:40:50 +0000 (23:40 -0700)]
i965: Use I915_EXEC_BATCH_FIRST when available.
This will make it easier to use I915_EXEC_HANDLE_LUT.
Based on a patch by Chris Wilson.
Chris Wilson [Fri, 21 Jul 2017 15:36:49 +0000 (16:36 +0100)]
i965: Move add_exec_bo()
To avoid a forward declaration in the next patch, move the definition of
add_exec_bo() earlier.
v2: (by Ken) redo move.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Chris Wilson [Fri, 21 Jul 2017 15:36:48 +0000 (16:36 +0100)]
i965: Ignore reloc read/write domains
Since before the kernel supported I915_EXEC_NO_RELOC, long before our
minimum kernel requirement, the kernel unconditionally invalidated all
GPU TLBs before a batch and flushed all GPU caches after a batch. At
that moment, the only use for read/write domain was for activity
tracking, ensuring that future reads waited for the last writer and
future writes waited for all reads. This only requires a single bit in
the execbuf interface which can be supplied via the NO_RELOC interface,
making the use of relocation domains entirely redundant.
Trimming the excess writes into the array allows the compiler to be much
more frugal:
text data bss dec hex filename
8493790 357184 424944
9275918 8d8a0e i965_dri.baseline
8493758 357184 424944
9275886 8d89ee i965_dri.so
(This text improvement really does come from dropping domains, not from
the new use of C99 initializers.)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>