mesa.git
4 years agoradv/gfx10: fix required subgroup size with VK_EXT_subgroup_size_control
Samuel Pitoiset [Mon, 16 Mar 2020 16:29:33 +0000 (17:29 +0100)]
radv/gfx10: fix required subgroup size with VK_EXT_subgroup_size_control

If compute shaders require a specific subgroup size (ie. Wave32),
we have to return the correct one.

Fixes dEQP-VK.subgroups.size_control.compute.required_subgroup_size_*.

Fixes: fb07fd4e6cb ("radv: implement VK_EXT_subgroup_size_control")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4215>

4 years agoradv: only inject implicit subpass dependencies if necessary
Samuel Pitoiset [Tue, 17 Mar 2020 08:45:50 +0000 (09:45 +0100)]
radv: only inject implicit subpass dependencies if necessary

The Vulkan 1.2.134 spec update clarified when implicit subpass
dependencies should be injected by the driver. They only make
sense if automatic layout transitions are performed.

This should fix a performance regression with RPCS3 (although
they added a workaround for RADV since the regression has been found).

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2502
Fixes: e60de085473 ("radv: handle missing implicit subpass dependencies")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4210>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4210>

4 years agogitlab-ci: Enable more Gallium drivers in meson-i386 job
Michel Dänzer [Thu, 12 Mar 2020 11:31:05 +0000 (12:31 +0100)]
gitlab-ci: Enable more Gallium drivers in meson-i386 job

These are the ones which can be enabled with the current x86_build
docker image and which build without warnings.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4166>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4166>

4 years agollvmpipe: Use uintptr_t for pointer values
Michel Dänzer [Thu, 12 Mar 2020 14:03:20 +0000 (15:03 +0100)]
llvmpipe: Use uintptr_t for pointer values

Instead of uint64_t. Fixes potentially writing beyond the end of the
handles pointer array on 32-bit architectures (and copying all 0s
instead of the computed pointer values to the array on big endian
ones).

Corresponding compiler warning:

../src/gallium/drivers/llvmpipe/lp_state_cs.c: In function ‘llvmpipe_set_global_binding’:
../src/gallium/drivers/llvmpipe/lp_state_cs.c:1312:12: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
 1312 |       va = (uint64_t)((char *)lp_res->data + offset);
      |            ^

Fixes: 264663d55d32 "gallivm/llvmpipe: add support for global
                     operations."

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4166>

4 years agogitlab-ci: Move classic driver testing to a new meson-classic job
Michel Dänzer [Thu, 12 Mar 2020 11:29:40 +0000 (12:29 +0100)]
gitlab-ci: Move classic driver testing to a new meson-classic job

The motivation is to allow llvmpipe to be enabled instead in the
meson-i386 job.

v2: (Eric Engestrom)
* Rename meson-main job to meson-gallium
* Remove stale comment above meson-i386 job

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4166>

4 years agogitlab-ci: Fold scons-swr job into scons job
Michel Dänzer [Thu, 12 Mar 2020 11:13:44 +0000 (12:13 +0100)]
gitlab-ci: Fold scons-swr job into scons job

Should be fast enough.

Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4166>

4 years agotu: Fix border color with compute shaders
Connor Abbott [Mon, 16 Mar 2020 14:23:44 +0000 (15:23 +0100)]
tu: Fix border color with compute shaders

I wasn't able to find any CTS tests that used compute shaders with
samplers and set a border color, so I hacked one of the tests included
with amber:

https://gist.github.com/cwabbott0/e72f0ed8259b84ed6bf3920c68fefee6

The register was found via looking at dumps of the Vulkan blob, and
setting it fixes this test.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4204>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4204>

4 years agogitlab-ci: Don't use buster-backports packages by default for x86_build
Michel Dänzer [Tue, 17 Mar 2020 08:34:51 +0000 (09:34 +0100)]
gitlab-ci: Don't use buster-backports packages by default for x86_build

The backports repository can be temporarily inconsistent between
architectures, which can break the docker image build.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4209>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4209>

4 years agoci: Drop the git dependency in tracie
Rohan Garg [Fri, 28 Feb 2020 12:48:53 +0000 (13:48 +0100)]
ci: Drop the git dependency in tracie

Instead of using git, use python and the Gitlab API
to fetch traces. This helps us slim down our ramdisks
in preparation for integrating trace replay on LAVA
devices.

Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4000>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4000>

4 years agogitlab-ci: Use surfaceless platform also for apitrace
Tomeu Vizoso [Fri, 6 Mar 2020 09:09:58 +0000 (10:09 +0100)]
gitlab-ci: Use surfaceless platform also for apitrace

In preparation for using apitrace to replay traces in LAVA jobs, build a
newer waffle so apitrace can use the surfaceless EGL platform.

As things were before this commit, Xvfb would have been needed in the
LAVA images.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4000>

4 years agogitlab-ci: Update renderdoc
Tomeu Vizoso [Wed, 11 Mar 2020 07:54:22 +0000 (08:54 +0100)]
gitlab-ci: Update renderdoc

Get closer to upstream to avoid accumulating changes.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4000>

4 years agolima/gpir: fix crash in schedule_insert_ready_list()
Vasily Khoruzhick [Tue, 10 Mar 2020 08:53:57 +0000 (01:53 -0700)]
lima/gpir: fix crash in schedule_insert_ready_list()

Fix crash if node is already at position we want. Otherwise we remove
it from list (and list->prev becomes NULL) and then we dereference list->prev
in list_addtail()

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4126>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4126>

4 years agolima/gpir: add better lowering for ftrunc
Vasily Khoruzhick [Tue, 10 Mar 2020 08:30:14 +0000 (01:30 -0700)]
lima/gpir: add better lowering for ftrunc

GP doesn't support ftrunc natively and unfortunately one in generic
opt_algebraic is not GP-friendly either. Introduce our own lowering
that utilizes fsign() that GP supports:
ftrunc(a) = fmul(fsign(a), ffloor(fmax(a, -a)))

Tested-by: Andreas Baierl <ichgeh@imkreisrum.de>
Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4126>

4 years agolima/gpir: kill dead writes to regs in DCE
Vasily Khoruzhick [Tue, 10 Mar 2020 02:34:43 +0000 (19:34 -0700)]
lima/gpir: kill dead writes to regs in DCE

Writes to regs that are never read will confuse regalloc since they
are never live and don't conflict with any regs. Kill them to prevent
overwriting another live reg.

Reviewed-by: Andreas Baierl <ichgeh@imkreisrum.de>
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4125>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4125>

4 years agolima/gpir: Optimize nots created from branch lowering
Connor Abbott [Fri, 4 Oct 2019 14:16:52 +0000 (10:16 -0400)]
lima/gpir: Optimize nots created from branch lowering

We also add a DCE pass to cleanup the result of this pass, which turns
out to also be necessary to cleanup the result of nir->gpir in some
cases that we didn't hit until the next commit.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4125>

4 years agolima/gpir: Optimize conditional break/continue
Connor Abbott [Thu, 3 Oct 2019 19:24:02 +0000 (15:24 -0400)]
lima/gpir: Optimize conditional break/continue

Optimize the result of a conditional break/continue. In NIR something
like:

loop {
   ...
   if (cond)
      continue;

would get lowered to:

block_0:
...
block_1:
branch_cond !cond block_3
block_2:
branch_uncond block_0
block_3:
...

We recognize the conditional branch skipping over the unconditional
branch, and turn it into:

block_0:
...
block_1:
branch_cond cond block_0
block_2:
block_3:

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4125>

4 years agolima/gpir: Make lima_gpir_node_insert_child() useful
Connor Abbott [Thu, 3 Oct 2019 19:19:40 +0000 (15:19 -0400)]
lima/gpir: Make lima_gpir_node_insert_child() useful

We weren't using this function before. The name is confusing, but it
changes the child while also fixing up the dependence link, if you don't
have access to it already. Or at least, I think that's what the
intention is, and what we'll need to change the branch condition in the
next commit. Adding a dependency between the new and old source doesn't
make any sense for this, and we also need to change the actual source.

Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4125>

4 years agopanfrost: Fix gnu-empty-initializer error.
Vinson Lee [Sun, 15 Mar 2020 01:57:05 +0000 (18:57 -0700)]
panfrost: Fix gnu-empty-initializer error.

../src/gallium/drivers/panfrost/pan_cmdstream.c:1553:54: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
        union mali_attr varyings[PIPE_MAX_ATTRIBS] = { };
                                                     ^

Fixes: 836686daf36c ("panfrost: Move panfrost_emit_varying_descriptor() to pan_cmdstream.c")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4198>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4198>

4 years agoaco: fix operand order for LS VGPR init bug workaround
Rhys Perry [Mon, 16 Mar 2020 17:11:16 +0000 (17:11 +0000)]
aco: fix operand order for LS VGPR init bug workaround

Fixes: a952bf3946 ('aco: Fix LS VGPR init bug on affected hardware.')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4201>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4201>

4 years agoaco: fix instruction encoding for LS VGPR init bug workaround
Rhys Perry [Mon, 16 Mar 2020 13:47:55 +0000 (13:47 +0000)]
aco: fix instruction encoding for LS VGPR init bug workaround

Fixes: a952bf3946 ('aco: Fix LS VGPR init bug on affected hardware.')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-By: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4201>

4 years agoaco: set late kill for v_interp_p1_f32 for some APUs
Rhys Perry [Fri, 21 Feb 2020 18:53:19 +0000 (18:53 +0000)]
aco: set late kill for v_interp_p1_f32 for some APUs

Apparently needed for Stoney Ridge, Kabini and Mullins APUs.

gfx702 also has 16-bank LDS and https://llvm.org/docs/AMDGPUUsage.html
lists some dGPUs under there. Those GPUs seem to be Hawaii actually
(gfx701) and we don't seem to have gotten any interpolation related bugs
reported with them so far.

The late kill flag was tested by running pipeline-db with
ACO_DEBUG=validatera while setting late kill for SMEM buffer loads,
emit_vop2_instruction() and texture instructions. I also tested with
just setting the flag for v_interp_p1_f32.

As far as I know, the only other thing we have to consider for 16-bank LDS
is something to do with 16-bit interpolation. We don't do that yet.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3914>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3914>

4 years agoaco: add a late kill flag
Rhys Perry [Fri, 21 Feb 2020 15:46:39 +0000 (15:46 +0000)]
aco: add a late kill flag

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3914>

4 years agoaco: move some register demand helpers into aco_live_var_analysis.cpp
Rhys Perry [Fri, 21 Feb 2020 20:14:03 +0000 (20:14 +0000)]
aco: move some register demand helpers into aco_live_var_analysis.cpp

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3914>

4 years agoradv/sqtt: handle thread trace capture in sqtt_QueuePresentKHR()
Samuel Pitoiset [Fri, 13 Mar 2020 09:39:41 +0000 (10:39 +0100)]
radv/sqtt: handle thread trace capture in sqtt_QueuePresentKHR()

To avoid wasting CPU cycles when thread trace is not enabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4180>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4180>

4 years agoanv: Push UBO ranges relative to the start of the binding
Jason Ekstrand [Fri, 13 Mar 2020 20:30:41 +0000 (15:30 -0500)]
anv: Push UBO ranges relative to the start of the binding

There was a disconnect between anv_nir_compute_push_layout and the code
which sets up the push_ubo_sizes array.  The NIR code we emit checks
relative to the start of the bound UBO range so that, if we end up with
a vector which straddles the start of the push range, we can perform the
bounds check without risking overflow issues.  The code which sets up
the push_ubo_sizes, on the other hand, assumed it was relative to the
start of the push range.  Somehow, this didn't get get caught by any of
the available tests.

Fixes: e03f9652801 "anv: Bounds-check pushed UBOs when ..."
Closes: #2623
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4195>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4195>

4 years agoanv: Fix the comparison in an assert
Jason Ekstrand [Fri, 13 Mar 2020 17:05:25 +0000 (12:05 -0500)]
anv: Fix the comparison in an assert

Fixes: e03f9652801 "anv: Bounds-check pushed UBOs when ..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4195>

4 years agogitlab-ci: bump Vulkan CTS to 1.2.1.0
Samuel Pitoiset [Thu, 5 Mar 2020 17:10:14 +0000 (18:10 +0100)]
gitlab-ci: bump Vulkan CTS to 1.2.1.0

Vulkan CTS 1.1.6.0 is quite old.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4179>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4179>

4 years agogitlab-ci: do not set the number of deqp-parallel jobs for RADV CTS
Samuel Pitoiset [Thu, 5 Mar 2020 14:09:38 +0000 (15:09 +0100)]
gitlab-ci: do not set the number of deqp-parallel jobs for RADV CTS

Let's the runner uses the maximum number of jobs to speedup CTS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4179>

4 years agogitlab-ci: allow deqp-runner to use the maximum number of jobs
Samuel Pitoiset [Thu, 5 Mar 2020 14:20:34 +0000 (15:20 +0100)]
gitlab-ci: allow deqp-runner to use the maximum number of jobs

if $DEQP_PARALLEL is not set, it will use the maximum number of
jobs instead of 1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4179>

4 years agogitlab-ci: remove useless 'patch' package in the VK test image
Samuel Pitoiset [Thu, 5 Mar 2020 12:45:56 +0000 (13:45 +0100)]
gitlab-ci: remove useless 'patch' package in the VK test image

It was copied from the GL test image but it's actually unused.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4179>

4 years agotu: Rewrite border color handling
Connor Abbott [Thu, 12 Mar 2020 11:39:16 +0000 (12:39 +0100)]
tu: Rewrite border color handling

Emit a single table of all possible Vulkan border colors up front, and
then index into it using the Vulkan enum directly. In fact this seems to
be the entire point of separating out border colors in the first place.

In addition to being simpler and having less CPU overhead, and fixing
cases where more than one sampler uses border color, this paves the way
for bindless samplers because the existing approach isn't great for
bindless.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4200>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4200>

4 years agomeson: Avoid duplicate symbols.
Jose Fonseca [Tue, 10 Mar 2020 17:26:35 +0000 (17:26 +0000)]
meson: Avoid duplicate symbols.

All the stubs in src/compiler/glsl/glcpp/pp_standalone_scaffolding.c
are duplicate symbols.  They should only be used as replacement for
Mesa functions when building glcpp and glsl standalone compilers, but
in fact they are getting linked with Mesa.

This change fixes this by moving the standalone stubs to a
libglcpp_standalone target, that's only linked with the glcpp/glsl
tools.

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4186>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4186>

4 years agoRevert "ci: Remove T820 from CI temporarily"
Neil Armstrong [Wed, 4 Mar 2020 13:39:20 +0000 (14:39 +0100)]
Revert "ci: Remove T820 from CI temporarily"

This reverts commit 089c8f0b8da86a05bde8359c84085e0b795abf17.

Our office changes are finished and power is now stable in our lab
for T820 CI to run again.

Cc: Daniel Stone <daniels@collabora.com>
Cc: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4057>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4057>

4 years agogitlab-ci/lava: fix handling of lava tags
Neil Armstrong [Thu, 5 Mar 2020 14:19:15 +0000 (15:19 +0100)]
gitlab-ci/lava:  fix handling of lava tags

The lava tags was a python array not it's a gitlab CI string,
slit the string with periods in the jinja2 template to avoid having
the following tags :

tags:
 - p
 - a
 - n
 - f
 - r
 - o
 - s
 - t

instead of :
tags:
 - panfrost

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4057>

4 years agoiris: allow compression conditionally for images on gen12
Tapani Pälli [Thu, 12 Mar 2020 06:24:09 +0000 (08:24 +0200)]
iris: allow compression conditionally for images on gen12

With this change, amount of resolves happening with deqp-gles31
(--deqp-case=*load_store*) drops ~50%.

v2: use iris_image_view_get_format to get the format,
    get devinfo from context instead of passing it (Nanley)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>

4 years agoisl: allow compression for storage images on gen12+
Tapani Pälli [Fri, 6 Mar 2020 07:27:13 +0000 (09:27 +0200)]
isl: allow compression for storage images on gen12+

This is done to be able to use ISL_AUX_USAGE_CCS_E with images.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>

4 years agoiris: determine aux usage during predraw and state setup
Tapani Pälli [Thu, 12 Mar 2020 11:43:14 +0000 (13:43 +0200)]
iris: determine aux usage during predraw and state setup

Patch changes surface state setup to alloc/fill states for all possible
usages for image resource on gen12. Also predraw and binding table
population is changed to determine correct aux usage with the new
iris_image_view_aux_usage.

v2: alloc always all states independent on current image
    aux state on gen >= 12 , code cleanups (Nanley)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>

4 years agoiris: move existing image format fallback as a helper function
Tapani Pälli [Thu, 12 Mar 2020 06:16:28 +0000 (08:16 +0200)]
iris: move existing image format fallback as a helper function

Patch adds a helper function for determining image format and changes
iris_set_shader_images to use it.

v2: pass iris_context instead of pipe one, rename function,
    code cleanup (Nanley)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>

4 years agoiris: provide dummy iris_image_view_aux_usage
Tapani Pälli [Fri, 6 Mar 2020 07:17:35 +0000 (09:17 +0200)]
iris: provide dummy iris_image_view_aux_usage

Similar to iris_resource_texture_aux_usage this function will
determine proper aux_usage for image, now it will default to
ISL_AUX_USAGE_NONE.

v2: drop gen_device_info parameter, rename function (Nanley)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>

4 years agointel/compiler: detect if atomic load store operations are used
Tapani Pälli [Fri, 6 Mar 2020 06:59:16 +0000 (08:59 +0200)]
intel/compiler: detect if atomic load store operations are used

Patch adds a new arg and modifies existing calls from i965, anv
pass NULL but iris stores this information for later use.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>

4 years agoiris: use the images_used mask in resolve pass
Tapani Pälli [Wed, 19 Feb 2020 06:34:51 +0000 (08:34 +0200)]
iris: use the images_used mask in resolve pass

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>

4 years agonir/glsl: gather bitmask of images used by program
Tapani Pälli [Wed, 19 Feb 2020 06:33:04 +0000 (08:33 +0200)]
nir/glsl: gather bitmask of images used by program

In a similar fashion as commit f5c7df4dc95 does for textures.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4080>

4 years agost/mesa: Fix signed integer overflow when using util_throttle_memory_usage
Danylo Piliaiev [Fri, 13 Mar 2020 15:10:08 +0000 (17:10 +0200)]
st/mesa: Fix signed integer overflow when using util_throttle_memory_usage

../src/mesa/state_tracker/st_cb_texture.c:1719:57: runtime error: signed integer overflow: 203489280 * 16 cannot be represented in type 'int'

Fixes: 21ca322e637291b89a445159fc45b8dbf638e6c9
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4185>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4185>

4 years agoisl: Avoid EXPECT_DEATH in unit tests
Matt Turner [Thu, 12 Mar 2020 21:44:46 +0000 (14:44 -0700)]
isl: Avoid EXPECT_DEATH in unit tests

EXPECT_DEATH works by forking the process and letting the forked process
fail with an assertion. This process is evidently incredibly expensive,
taking ~30 seconds to run the whole isl_aux_info_test on a 2.8GHz
Skylake. Annoyingly all of the (expected) assertion failures also leaves
lots of messages in dmesg and potentially generates lots of coredumps.

Instead, avoid the expense of fork/exec by redefining assert() and
unreachable() in the code we're testing to return a unit-test-only
value. With this patch, the test takes ~1ms.

Also, while modifying the EXPECT_EQ() calls, reverse the arguments so
that the expected value comes first, as is intended. Otherwise gtest
failure messages don't make much sense.

Fixes: https://gitlab.freedesktop.org/mesa/mesa/issues/2567
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4174>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4174>

4 years agogallium/swr: use ElementCount type arguments for getSplat()
Jan Zielinski [Fri, 13 Mar 2020 19:00:39 +0000 (20:00 +0100)]
gallium/swr: use ElementCount type arguments for getSplat()

Reviewed-by: Alok Hota <alok.hota@intel.com>
In LLVM11, ConstantVector::getSplat() function definition
has changed and the first function argument has now ElementCount type.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4188>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4188>

4 years agoetnaviv: enable shareable shaders
Christian Gmeiner [Fri, 6 Mar 2020 21:44:42 +0000 (22:44 +0100)]
etnaviv: enable shareable shaders

We are not using any pctx reference in the shader so it seems fine
to enable this cap.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4095>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4095>

4 years agoetnaviv: get rid of etna_spec in etna_context
Christian Gmeiner [Fri, 6 Mar 2020 22:23:47 +0000 (23:23 +0100)]
etnaviv: get rid of etna_spec in etna_context

There is no need to have a complete copy of etna_spec - just
reference the one and only from etna_screen.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4095>

4 years agoanv: Dump push ranges via VK_KHR_pipeline_executable_properties
Jason Ekstrand [Thu, 12 Mar 2020 23:05:31 +0000 (18:05 -0500)]
anv: Dump push ranges via VK_KHR_pipeline_executable_properties

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4173>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4173>

4 years agoaco: don't stop scheduling at exports
Rhys Perry [Tue, 11 Feb 2020 16:55:39 +0000 (16:55 +0000)]
aco: don't stop scheduling at exports

This allows us to move v_cvt_pkrtz_f16_f32 instructions upwards, improving
schedules and (somewhat unintentionally) moving the exports slightly
closer together.

Totals from affected shaders:
SGPRS: 1030224 -> 1030248 (0.00 %)
VGPRS: 794080 -> 794392 (0.04 %)
Spilled SGPRs: 127117 -> 127117 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 89028152 -> 89032312 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 65252 -> 65219 (-0.05 %)
SMEM score: 843808.00 -> 843918.00 (0.01 %)
VMEM score: 5331687.00 -> 5397802.00 (1.24 %)
SMEM clauses: 567659 -> 567655 (-0.00 %)
VMEM clauses: 290715 -> 290716 (0.00 %)
Instructions: 17143219 -> 17144259 (0.01 %)
Cycles: 1098442808 -> 1098446968 (0.00 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3776>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3776>

4 years agoaco: allow barriers to be skipped during scheduling
Rhys Perry [Tue, 11 Feb 2020 14:15:32 +0000 (14:15 +0000)]
aco: allow barriers to be skipped during scheduling

Much better scheduling apparently in 160 shaders

Totals from affected shaders:
SGPRS: 6272 -> 6344 (1.15 %)
VGPRS: 4832 -> 4844 (0.25 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 467192 -> 467428 (0.05 %) bytes
LDS: 459 -> 459 (0.00 %) blocks
Max Waves: 1407 -> 1409 (0.14 %)
SMEM score: 9309.00 -> 11216.00 (20.49 %)
VMEM score: 26679.00 -> 33652.00 (26.14 %)
SMEM clauses: 1817 -> 1776 (-2.26 %)
VMEM clauses: 2286 -> 2288 (0.09 %)
Instructions: 86537 -> 86596 (0.07 %)
Cycles: 676260 -> 676568 (0.05 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3776>

4 years agoaco: add helpers for ensuring correct ordering while scheduling
Rhys Perry [Thu, 7 Nov 2019 14:48:51 +0000 (14:48 +0000)]
aco: add helpers for ensuring correct ordering while scheduling

Pipeline-db changes in 721 shaders.

Totals from affected shaders:
SGPRS: 42336 -> 42656 (0.76 %)
VGPRS: 38368 -> 38636 (0.70 %)
Spilled SGPRs: 11967 -> 11967 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 5268088 -> 5269840 (0.03 %) bytes
LDS: 1069 -> 1069 (0.00 %) blocks
Max Waves: 4473 -> 4447 (-0.58 %)
SMEM score: 41155.00 -> 41826.00 (1.63 %)
VMEM score: 146339.00 -> 147471.00 (0.77 %)
SMEM clauses: 24434 -> 24535 (0.41 %)
VMEM clauses: 16637 -> 16592 (-0.27 %)
Instructions: 996037 -> 996388 (0.04 %)
Cycles: 76476112 -> 75281416 (-1.56 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3776>

4 years agoaco: add helpers for moving instructions for scheduling
Rhys Perry [Wed, 6 Nov 2019 16:38:57 +0000 (16:38 +0000)]
aco: add helpers for moving instructions for scheduling

No pipeline-db changes

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3776>

4 years agoradv: add llvm_compiler_shader() helper
Samuel Pitoiset [Thu, 12 Mar 2020 13:49:55 +0000 (14:49 +0100)]
radv: add llvm_compiler_shader() helper

To match aco_compile_shader().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4163>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4163>

4 years agoradv: remove unnecessary LLVM includes
Samuel Pitoiset [Thu, 12 Mar 2020 13:29:54 +0000 (14:29 +0100)]
radv: remove unnecessary LLVM includes

They are already included from src/amd/llvm.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4163>

4 years agoradv: remove radv_shader_variant::aco_used
Samuel Pitoiset [Thu, 12 Mar 2020 13:24:49 +0000 (14:24 +0100)]
radv: remove radv_shader_variant::aco_used

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4163>

4 years agoradv: cleanup occurences of use_aco everywhere
Samuel Pitoiset [Thu, 12 Mar 2020 13:20:05 +0000 (14:20 +0100)]
radv: cleanup occurences of use_aco everywhere

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4163>

4 years agoglsl: do not crash if string literal is used outside of #include/#line
Danylo Piliaiev [Wed, 11 Mar 2020 13:29:12 +0000 (15:29 +0200)]
glsl: do not crash if string literal is used outside of #include/#line

Fixes: 67b32190f3c953c5b7091d76ddeff95c0cbfb439
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2619
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4146>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4146>

4 years agoanv: Remove duplicate code in anv_cmd_buffer_bind_descriptor_set
Caio Marcelo de Oliveira Filho [Thu, 5 Mar 2020 20:33:05 +0000 (12:33 -0800)]
anv: Remove duplicate code in anv_cmd_buffer_bind_descriptor_set

Also use a single condition statement instead of two.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>

4 years agoanv: Reduce compute pipeline batch_data size
Caio Marcelo de Oliveira Filho [Tue, 3 Mar 2020 23:42:33 +0000 (15:42 -0800)]
anv: Reduce compute pipeline batch_data size

The batch associated with the compute pipeline only needs room for a
MEDIA_VFE_STATE. So this patch moves the batch_data to each pipeline
struct and cap the one in compute pipeline.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>

4 years agoanv: Split graphics and compute bits from anv_pipeline
Caio Marcelo de Oliveira Filho [Tue, 3 Mar 2020 23:31:50 +0000 (15:31 -0800)]
anv: Split graphics and compute bits from anv_pipeline

Add two new structs that use the anv_pipeline as base.  Changed all
functions that work on a specific pipeline to use the corresponding
struct.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>

4 years agoanv: Use a separate field in the pipeline for compute shader
Caio Marcelo de Oliveira Filho [Tue, 3 Mar 2020 21:43:39 +0000 (13:43 -0800)]
anv: Use a separate field in the pipeline for compute shader

This is a preparation for splitting the compute and graphics pipelines
into separate structs.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>

4 years agoanv: Decouple flush_descriptor_sets() from pipeline struct
Caio Marcelo de Oliveira Filho [Tue, 3 Mar 2020 21:21:45 +0000 (13:21 -0800)]
anv: Decouple flush_descriptor_sets() from pipeline struct

Explicitly pass the active stages and the array (and size) of shaders
to be processed.  This will make easy to store only the shaders needed
for each pipeline.

The active stages can be identified by a non-NULL shader in the
shaders array, so stop using it and keep track of the flushed stages
as iteration happens.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>

4 years agoanv: Decouple flush_descriptor_sets() helpers from pipeline struct
Caio Marcelo de Oliveira Filho [Tue, 3 Mar 2020 20:51:53 +0000 (12:51 -0800)]
anv: Decouple flush_descriptor_sets() helpers from pipeline struct

Pass the `anv_shader_bin *` instead of expecting the helpers to peek
into the pipeline struct.  Also reach for the device from the
cmd_buffer instead of the pipeline.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>

4 years agoanv: Remove redundant check in flush_descriptor_sets() helpers
Caio Marcelo de Oliveira Filho [Tue, 3 Mar 2020 20:40:37 +0000 (12:40 -0800)]
anv: Remove redundant check in flush_descriptor_sets() helpers

These helpers are only called for stages that are active, so the code
for a non-active stage is never executed.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>

4 years agoanv: Pass the right pipe_state to flush_descriptor_sets()
Caio Marcelo de Oliveira Filho [Tue, 3 Mar 2020 20:23:31 +0000 (12:23 -0800)]
anv: Pass the right pipe_state to flush_descriptor_sets()

The caller has this information, so pass directly instead of making
each helper function call figure that one out.  Also, since we can
reach the pipeline from pipe_state, drop that parameter from the
function.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>

4 years agoanv: Keep the shader stage in anv_shader_bin
Caio Marcelo de Oliveira Filho [Tue, 3 Mar 2020 20:10:00 +0000 (12:10 -0800)]
anv: Keep the shader stage in anv_shader_bin

This will be used to decouple the logic flush_descriptor_sets() from
the position in the shader array, allowing us to store just the
shaders needed for each pipeline.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>

4 years agoanv: Use a dynamic array for storing executables in pipeline
Caio Marcelo de Oliveira Filho [Tue, 3 Mar 2020 18:19:15 +0000 (10:19 -0800)]
anv: Use a dynamic array for storing executables in pipeline

Avoids waste for pipelines that don't use all the shaders, and is
flexible enough to cover cases where there are multiple variants per
shader (e.g. SIMD8/16/32 for fragment shader).

Even though we could pre-calculate the exact size of the array, this
is not a critical path so it is worth preventing the bug that will
likely happen when new variants are added but not accounted for.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>

4 years agoanv: Use pipeline type to decide whether or not lower multiview
Caio Marcelo de Oliveira Filho [Tue, 3 Mar 2020 18:10:05 +0000 (10:10 -0800)]
anv: Use pipeline type to decide whether or not lower multiview

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>

4 years agoanv: Add a new enum to identify the pipeline type
Caio Marcelo de Oliveira Filho [Tue, 3 Mar 2020 18:09:29 +0000 (10:09 -0800)]
anv: Add a new enum to identify the pipeline type

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4040>

4 years agoglsl/tests: Fix waiting for disk_cache_put() to finish.
Eric Anholt [Tue, 10 Mar 2020 21:52:42 +0000 (14:52 -0700)]
glsl/tests: Fix waiting for disk_cache_put() to finish.

We were wasting 4s on waiting for expected-not-to-appear files to show
up on every test.  Using timeouts in test code is error-prone anyway,
as our shared runners may be busy on other jobs.

Fixes: 50989f87e62e ("util/disk_cache: use a thread queue to write to shader cache")
Link: https://gitlab.freedesktop.org/mesa/mesa/issues/2505
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4140>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4140>

4 years agoglsl/tests: Catch mkdir errors to help explain when they happen.
Eric Anholt [Tue, 10 Mar 2020 20:36:51 +0000 (13:36 -0700)]
glsl/tests: Catch mkdir errors to help explain when they happen.

A recent pipeline
(https://gitlab.freedesktop.org/Venemo/mesa/-/jobs/1893357) failed
with what looks like an intermittent error related to making files for
the cache test inside of the core of the cache.  Given some of the
errors, it looks like maybe a mkdir failed, so log those errors
earlier so we can debug what's going on next time.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4140>

4 years agointel/fs: Combine adjacent memory barriers
Caio Marcelo de Oliveira Filho [Fri, 21 Feb 2020 18:58:48 +0000 (10:58 -0800)]
intel/fs: Combine adjacent memory barriers

This will avoid generating multiple identical fences in a row.

For Gen11+ we have multiple types of fences (affecting different
variable modes), but is still better to combine them in a single
scoped barrier so that the translation to backend IR have the option
of dispatching both fences in parallel.

This will clean up redundant barriers from various
dEQP-VK.memory_model.* tests.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3224>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3224>

4 years agonir: Add pass to combine adjacent scoped memory barriers
Caio Marcelo de Oliveira Filho [Fri, 21 Feb 2020 18:53:05 +0000 (10:53 -0800)]
nir: Add pass to combine adjacent scoped memory barriers

SPIR-V generates very granular barriers, however HW and backends might
not necessarily take advantage of those.  This pass provides a general
mechanism to combine such barriers.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3224>

4 years agonir: Reorder nir_scopes so wider scope has larger numeric value
Caio Marcelo de Oliveira Filho [Fri, 21 Feb 2020 18:46:29 +0000 (10:46 -0800)]
nir: Reorder nir_scopes so wider scope has larger numeric value

Makes code comparing and combining scopes slightly more readable.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3224>

4 years agonir: Don't skip a bit in nir_memory_semantics
Caio Marcelo de Oliveira Filho [Thu, 20 Feb 2020 17:47:06 +0000 (09:47 -0800)]
nir: Don't skip a bit in nir_memory_semantics

There was another enum entry in the draft versions of
nir_memory_semantics, but when it got dropped the entries were not
updated.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3224>

4 years agoradv: use ac_gpu_info::use_late_alloc
Samuel Pitoiset [Wed, 11 Mar 2020 08:25:21 +0000 (09:25 +0100)]
radv: use ac_gpu_info::use_late_alloc

Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>

4 years agoradv: rewrite late alloc computation
Samuel Pitoiset [Wed, 11 Mar 2020 08:20:17 +0000 (09:20 +0100)]
radv: rewrite late alloc computation

Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>

4 years agoradv: tune primitive binning for small chips
Samuel Pitoiset [Wed, 11 Mar 2020 07:57:37 +0000 (08:57 +0100)]
radv: tune primitive binning for small chips

Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>

4 years agoradv: use better tessellation tunables on GFX9+
Samuel Pitoiset [Wed, 11 Mar 2020 07:51:08 +0000 (08:51 +0100)]
radv: use better tessellation tunables on GFX9+

Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>

4 years agoradv/gfx10: cache metadata in L2 on small chips
Samuel Pitoiset [Wed, 11 Mar 2020 08:31:26 +0000 (09:31 +0100)]
radv/gfx10: cache metadata in L2 on small chips

Based on PAL and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4144>

4 years agointel/isl: Set DepthStencilResource based on aux usage
Jason Ekstrand [Thu, 5 Mar 2020 20:50:59 +0000 (14:50 -0600)]
intel/isl: Set DepthStencilResource based on aux usage

In ISL, usage flags only carry intent and not semantic meaning.  We
don't have a bulletproof way in ISL to specify that an image is of
depth/stencil type.  The usage flags are great but blorp, for instance,
loves to disrespect them.  One proposed solution to this problem is to
add explicit depth/stencil formats which are distinct from the
corresponding color formats.

Fortunately, however, empirical evidence suggests that this bit only
affects the sampler's interpretation of the CCS data.  Therefore, we can
set the bit based off of the aux_usage which is now very specific and
does carry semantic meaning.  In particular, aux_usage now makes a
distinction between color CCS and depth/stencil CCS which appears to be
exactly what the DepthStencilResource bit is for.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>

4 years agointel: Require ISL_AUX_USAGE_STC_CCS for stencil CCS
Jason Ekstrand [Tue, 10 Mar 2020 17:11:43 +0000 (12:11 -0500)]
intel: Require ISL_AUX_USAGE_STC_CCS for stencil CCS

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>

4 years agoiris: Use ISL_AUX_USAGE_STC_CCS for stencil CCS
Jason Ekstrand [Thu, 5 Mar 2020 17:46:51 +0000 (11:46 -0600)]
iris: Use ISL_AUX_USAGE_STC_CCS for stencil CCS

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>

4 years agointel/blorp: Allow STC_CCS in blit sources
Jason Ekstrand [Thu, 5 Mar 2020 17:47:27 +0000 (11:47 -0600)]
intel/blorp: Allow STC_CCS in blit sources

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>

4 years agointel/isl: Add a separate ISL_AUX_USAGE_STC_CCS
Jason Ekstrand [Thu, 5 Mar 2020 17:17:28 +0000 (11:17 -0600)]
intel/isl: Add a separate ISL_AUX_USAGE_STC_CCS

Stencil CCS is slightly different from color CCS.  Using a color CCS
resolve with stencil CCS doesn't do the right thing and you can't sample
from a stencil CCS image without the DepthStencilResource bit set or you
will get the wrong data.  Stencil CCS also has it's own rules such as it
doesn't support fast-clear and has no partial resolve.  This seems to
indicate that it should probably be its own isl_aux_usage.  Now that
adding new isl_aux_usage values is pretty cheap, let's split stencil CCS
out on its own.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>

4 years agointel/isl: Require ISL_AUX_USAGE_HIZ_CCS_WT for HZ+CCS WT mode
Jason Ekstrand [Wed, 4 Mar 2020 19:56:30 +0000 (13:56 -0600)]
intel/isl: Require ISL_AUX_USAGE_HIZ_CCS_WT for HZ+CCS WT mode

We also delete the badly named isl_surf_supports_hiz_ccs_wt.  The name
is misleading because it doesn't return whether or not the surface
supports HiZ+CCS in write-through mode (any single-sampled HiZ+CCS
capable surface does) but rather a heuristic decision about whether or
not we want to enable write-through mode based on the usage flags in the
isl_surf.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>

4 years agoiris: Use ISL_AUX_USAGE_HIZ_CCS_WT to indicate write-through HiZ
Jason Ekstrand [Wed, 4 Mar 2020 04:20:26 +0000 (22:20 -0600)]
iris: Use ISL_AUX_USAGE_HIZ_CCS_WT to indicate write-through HiZ

Previously, we always set the aux_usage to ISL_AUX_USAGE_HIZ_CCS and let
ISL choose write-through based on isl_surf_supports_hiz_ccs_wt.  This
commit makes us choose explicitly at surface creation time whether to
use HIZ_CCS or HIZ_CCS_WT based on the same set of conditions.  This is
more explicit and should be more robust as it lets us choose WT mode in
one place rather than trusting isl_surf_supports_hiz_ccs_wt to return
the same thing every time.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>

4 years agointel/blorp: Allow HIZ_CCS_WT in copy sources
Jason Ekstrand [Wed, 4 Mar 2020 20:26:43 +0000 (14:26 -0600)]
intel/blorp: Allow HIZ_CCS_WT in copy sources

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>

4 years agointel/isl: Add a separate ISL_AUX_USAGE_HIZ_CCS_WT
Jason Ekstrand [Tue, 3 Mar 2020 23:03:41 +0000 (17:03 -0600)]
intel/isl: Add a separate ISL_AUX_USAGE_HIZ_CCS_WT

This is distinct from ISL_AUX_USAGE_HIZ_CCS in that the HiZ surface
operates in write-through mode which means that the HiZ surface is only
used for depth-testing acceleration and the CCS-compressed main surface
is always valid so we can texture from it.

Separating full HiZ from write-through mode at the isl_aux_usage level
has a couple of advantages:

 1. It's more explicit.  Instead of write-through mode depending on the
    heuristic decision in isl_surf_supports_hiz_ccs_wt, it's now
    something that's explicitly requested by the driver.  This should be
    more robust than hoping isl_surf_supports_hiz_ccs_wt always returns
    the same thing every time.  If someone (say BLORP) ever drops a
    usage flag on the isl_surf, there's a chance it could return a
    different value without us noticing leading to corruptions.

 2. Because ISL_AUX_USAGE_HIZ_CCS_WT is it's own isl_aux_usage flag, we
    can say inside the driver that HIZ_CCS does not support sampling but
    HIZ_CCS_WT does.  We can also pass HIZ_CCS_WT to isl_surf_fill_state
    and it can do some validation for us beyond what we would be able to
    do if we conflate HIZ_CCS_WT and CCS_E.

 3. In the future, we can add new heuristics to the driver which do
    things such as start all depth surfaces (regardless of usage flags)
    off in HIZ_CCS and then do a full resolve and drop to HIZ_CCS_WT the
    first time it gets used by the sampler.  This would potentially let
    us enable the faster HIZ_CCS mode even in cases where it technically
    comes in through the API as a texture.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>

4 years agointel/isl: Clean up some aux surface logic
Jason Ekstrand [Thu, 5 Mar 2020 17:30:59 +0000 (11:30 -0600)]
intel/isl: Clean up some aux surface logic

The first check is redundant because the first thing we do in the "emit
the aux surface" section is assert that we actually have an aux_surf.
The second check involves an exclusion list of things which don't have
aux surfaces on Gen12 but an inclusion list is much simpler because it's
just "does it have MCS?".

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4056>

4 years agoac: disable late alloc on small gfx10 chips
Marek Olšák [Wed, 11 Mar 2020 01:52:42 +0000 (21:52 -0400)]
ac: disable late alloc on small gfx10 chips

same as PAL.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>

4 years agoac: add radeon_info::use_late_alloc to control LATE_ALLOC globally
Marek Olšák [Wed, 11 Mar 2020 01:51:01 +0000 (21:51 -0400)]
ac: add radeon_info::use_late_alloc to control LATE_ALLOC globally

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>

4 years agoradeonsi: tune primitive binning for small chips
Marek Olšák [Wed, 11 Mar 2020 00:46:16 +0000 (20:46 -0400)]
radeonsi: tune primitive binning for small chips

same as PAL

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>

4 years agoradeonsi: set better tessellation tunables on gfx9 and gfx10
Marek Olšák [Wed, 11 Mar 2020 00:45:08 +0000 (20:45 -0400)]
radeonsi: set better tessellation tunables on gfx9 and gfx10

same as PAL

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>

4 years agoradeonsi/gfx10: cache metadata in L2 on small chips
Marek Olšák [Wed, 11 Mar 2020 00:44:03 +0000 (20:44 -0400)]
radeonsi/gfx10: cache metadata in L2 on small chips

same as PAL.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>

4 years agoradv/sqtt: describe layout transitions with user markers
Samuel Pitoiset [Tue, 3 Mar 2020 14:53:20 +0000 (15:53 +0100)]
radv/sqtt: describe layout transitions with user markers

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4138>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4138>

4 years agoradv/sqtt: describe begin/end subpass barriers with user markers
Samuel Pitoiset [Tue, 3 Mar 2020 14:03:25 +0000 (15:03 +0100)]
radv/sqtt: describe begin/end subpass barriers with user markers

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4138>

4 years agonir/algebraic: coalesce fmod lowering
Juan A. Suarez Romero [Tue, 10 Mar 2020 10:50:30 +0000 (10:50 +0000)]
nir/algebraic: coalesce fmod lowering

As fmod for 16/32/64 bits lowering does the same, let's merge all of
them in a single case.

Fixes dEQP-VK.glsl.builtin.precision_double.mod.compute.* on ACO.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4118>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4118>

4 years agonir/lower_double_ops: relax lower mod()
Juan A. Suarez Romero [Tue, 10 Mar 2020 10:49:42 +0000 (10:49 +0000)]
nir/lower_double_ops: relax lower mod()

Currently when lowering mod() we add an extra instruction so if
mod(a,b) == b then 0 is returned instead of b, as mathematically
mod(a,b) is in the interval [0, b).

But Vulkan spec has relaxed this restriction, and allows the result to
be in the interval [0, b].

For the OpenGL case, while the spec does not allow this behaviour, due
the allowed precision errors we can end up having the same result, so
from a practical point of view, this behaviour is allowed (see
https://github.com/KhronosGroup/VK-GL-CTS/issues/51).

This commit takes this in account to remove the extra instruction
required to return 0 instead.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4118>

4 years agoamd/llvm: Fix divergent descriptor indexing. (v3)
Bas Nieuwenhuizen [Mon, 2 Dec 2019 08:53:37 +0000 (09:53 +0100)]
amd/llvm: Fix divergent descriptor indexing. (v3)

There are multiple LLVM passes that very much move the
intrinsic using the descriptor outside of the loop, defeating
the entire point of creating the loop.

Defeat the optimizer by  splitting the break into a separate
if-statement and putting an optimization barrier on the bool
in between.

v2: Move from a callback based system to begin/end loop.
    This does not make it significantly less intrusive but
    is a bit nicer with all the extra struct and callback
    stubs.
v3: Deal with non-divergent values in divergent path.

Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2160
Fixes: 028ce527395 "radv: Add non-uniform indexing lowering."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4109>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4109>