radv/gfx10: update DB_DFSM_CONTROL register

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: update DB_Z_INFO register

GFX10 uses the same register as GFX8.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: implement radv_emit_global_shader_pointers()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: implement radv_emit_tess_factor_ring()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: implement radv_emit_fb_ds_state()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: implement radv_initialise_ds_surface()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: implement radv_emit_fb_color_state()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: implement radv_initialise_color_surface()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: implement radv_init_dcc_control_reg()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: implement radv_make_buffer_descriptor()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: implement si_set_mutable_tex_desc_fields()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: add gfx10_make_texture_descriptor

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: generate gfx10_format_table.h

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: increase maximum number of layers to 8192

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: increase maximum number of levels to 14

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv/gfx10: set MAX_ALLOC_COUNT

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

ac/nir: unpacked GS invocation ID on GFX10+

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

ac: add missing formats to ac_get_tbuffer_format() for GFX10

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

vulkan/overlay: fix command buffer stats

Begin/Reset of command buffer both reset the content of the command
buffer. Don't forget to wipe them on Begin.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4438188f492e1f ("vulkan/overlay: record stats in command buffers and accumulate on exec/submit")
Acked-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

anv: manually add KHR_display to the list of platforms

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 38305e6c94ea31 ("anv: replace hard-coded platform list with vk.xml parse")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111078
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>

docs/features: add shader buffer and atomic support for llvmpipe

llvmpipe: enable ARB_shader_storage_buffer_object

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

llvmpipe: add support for shader buffer binding.

This add support for setting shader buffers and passing them
to draw or binding them to the fragment shader jit.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

draw: add shader buffer interfaces.

This adds the interface to add mapped shader buffers,
and sets up the jit linkage for them.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallivm: add buffer operations to the tgsi->llvm conversion.

This adds load, store and atomic operations. These operations
have to respect the exec_mask, and can't operate in lanes where
the execute is off. This is needed to avoid side effects seen
outside the shaders.

There is also bounds checking on the ssbo accesses vs the size
ptr.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallivm: move mask_vec function up higher so it can be reused.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

tgsi: denote which load/store/atomic channels are unsigned

llvmpipe will need this info.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

llvmpipe: add support for ssbo to the fragment shader jit.

This just adds the ssbo ptrs to the jit fragment shader api.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

draw: add support for ssbo ptrs to jit tables.

This adds ssbo/num_ssbo ptrs to the vs/gs jit tables.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallivm: add some basic SSBO limits. (v2)

v2: update ssbo size

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

util: add util_copy_shader_buffer.

This just adds an inline to copy a pipe_shader_buffer.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallivm: add ssbo pointers to the soa build api.

Need to pass ssbo + ssbo size pointers just like constants.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

gallivm: add compare exchange wrapper

This just pulls the wrapper from LLVM for older versions

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

vertex shader: add exec masking (v2)

As suggested by Roland this is just a compare of fetch_max
vs the counter, much simpler than my original spaghetti code.

We require the vertex shader to have an exec mask to get proper
ssbo/image load/atore/atomics semantics

Reviewed-by: Roland Scheidegger <sroland@vmware.com>

virgl: Hide internal virgl_resource functions

Since the transition to virgl_resource_transfer_map(), several
previously public virgl_resource functions are not required to be public
anymore.

We also move the functions earlier in the file so they can be used
without functions declarations.

Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>

virgl: Use virgl_resource_transfer_map for textures

Replace custom texture map code (for maps which don't require resolve)
with virgl_resource_transfer_map.

Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>

virgl: Use virgl_resource_transfer_map for buffers

Replace custom buffer map code with virgl_resource_transfer_map.

Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>

virgl: Introduce virgl_resource_transfer_map

Normal mapping of buffers and textures uses almost identical logic.
This commit extracts the this logic in the form of the
virgl_resource_transfer_map() helper function.

Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>

iris: Use a uint16_t for key sizes

sizeof(struct brw_vs_prog_key) == 324.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

ac: destroy passes in ac_destroy_llvm_compiler

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

ac: use an LLVM fence instead of s.waitcnt when possible

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

ac: remove unused AC_WAIT_EXP

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

ac: only set ac_dlc in ac_llvm_build.c

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

ac: replace glc,slc with cache_policy for loads

cosmetic change

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

ac: replace glc,slc with cache_policy for stores

cosmetic change

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

etnaviv: implement buffer compression

Vivante GPUs have lossless buffer compression using the tile-status bits,
which can reduce memory access and thus improve performance.

This patch only enables compression for "V4" compression GPUs, but the
implementation is tested on GC2000(V1) and GC3000(V2). V1/V2 compresssion
looks absolutely useless, so it is not enabled.

I couldn't test if this patch breaks MSAA, because it looks like MSAA is
already broken.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: detect v4 compression

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: rs: don't use etna_compatible_rs_format when possible

This mirrors the change in blt. RS cares about this for msaa/compression.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: combine translate_ts_sampler_format/translate_msaa_format

Both translate the same thing, so just add the missing cases into one.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: fix compression format not set correctly in TS_MEM_CONFIG

VIVS_TS_MEM_CONFIG_COLOR_COMPRESSION_FORMAT() needs to be used.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: set correct ts_clear_value for BLT engine

BLT engine uses all ones to clear TS, set ts_clear_value to match that.
Note: ts_clear_value is never used with BLT engine.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: remove initial CPU ts clear

Since we have "ts_valid" to avoid using uncleared ts, this memset serves
no purpose. Also it is broken because it doesn't use cpu_prep/cpu_fini.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: implement TS_MODE for GC7000L

GC7000L has a TS mode with larger tiles, which improves performance.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: fix ts size calculation

The size of the TS is screen->specs.bits_per_tile bits per tile, with each
tile being 64 bytes of the resource.

This gives the same result for 32bpp formats, but reduces the size of TS
for 16bpp formats by 2.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

etnaviv: update headers from rnndb

Update to etna_viv commit 8a8b13a and use new names in the code.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>

scons: s/HAVE_NO_AUTOCONF/HAVE_SCONS/

Back when autotools and scons were the two build systems, it kinda made
sense to call scons "not autoconf", but autoconf's been gone for a while
now and other build systems have been added (android.mk and meson), so
the name really doesn't make any sense anymore.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>

radeonsi: Fix some warnings.

../mesa/src/gallium/drivers/radeonsi/si_compute_blit.c: In function ‘si_clear_buffer’:
../mesa/src/gallium/drivers/radeonsi/si_compute_blit.c:195:11: warning: unused variable ‘clear_alignment’ [-Wunused-variable]
  unsigned clear_alignment = MIN2(clear_value_size, 4);
           ^~~~~~~~~~~~~~~
[23/60] Compiling C object 'src/gallium/drivers/radeonsi/3cdc30e@@radeonsi@sta/si_compute_prim_discard.c.o'.
../mesa/src/gallium/drivers/radeonsi/si_compute_prim_discard.c: In function ‘si_prepare_prim_discard_or_split_draw’:
../mesa/src/gallium/drivers/radeonsi/si_compute_prim_discard.c:1106:7: warning: unused variable ‘compute_has_space’ [-Wunused-variable]
  bool compute_has_space = sctx->ws->cs_check_space(cs, need_compute_dw, false);

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

amd/common: move ac_shader_{binary,reloc} into r600 and rename

They are no longer used by radeonsi or radv.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

amd/common: removed unused ac_shader_binary functions

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

amd/common: remove unused ac_compile_module_to_binary

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

radv: Switch to using rtld.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: Move more stuff to variant create time.

Due to them depending on the linker result.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: Add the concept of radv shader binaries.

This simplifies a bunch of stuff by
(1) Keeping all the things in a single allocation, making things easier
 for the cache.
(2) creating a shader_variant creation helper.

This is immediately put to use by creating rtld shader binaries. This
is the main reason for the binaries, as we need to do the linking at
upload time, i.e. post caching. We do not enable rtld yet.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: Add export_prim_id to the shader variant info.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: use last nir shader to determine stage in postprocessing

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

radv: Merge rsrc1/rsrc2 fields with the config fields.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

vulkan: Update headers to 1.1.113

Some headers were not dragged in the last update(s).

Fixes: 465ec0b145c ("vulkan: Update the XML and headers to 1.1.113")
Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>

radv: do not crash when generating binning state for unknown chips

These values are only useful if binning is disabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radv: fix potential crash in the compute resolve path

If the destination attachment is UNUSED.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

panfrost: Take into account off-screen FBOs

In that case, ctx->pipe_framebuffer.cbufs[0] can be NULL.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Boris Brezillon <boris.brezillon@collabora.com>
Fixes: 5375d009be18 ("panfrost: Pass referenced BOs to the SUBMIT ioctls")

util/macros: rework DIV_ROUND_UP macro

Simplify used math.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>

gitlab-ci: bump required libdrm version

Fixes following build problem:
 Message: libdrm 2.4.99 needed because amdgpu has the highest requirement
 Dependency libdrm_intel found: NO found '2.4.97' but need: '>=2.4.99'
 Dependency libdrm_intel found: NO

 meson.build:1178:4: ERROR:  Invalid version of dependency, need 'libdrm_intel' ['>=2.4.99'] found '2.4.97'.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>

iris: Fix MOCS for grid surface

Hardcoding 4 is bad; we have a function for this now.

iris: Minor tidying

Revert "mesa/st: Passthrough scissor when clearing by quad"

This reverts commit 0a88aa3025db0cc5a68222c7939d7da4d218f1be.

It breaks a lot of piglit tests.

gallium/u_blitter: add return to fix the build

mesa/st: Passthrough scissor when clearing by quad

The scissor state -is- setup, but the scissor test is not enabled. This
can prevent certain optimizations from occurring on tilers where
unaffected tiles are thrown out entirely.

v2: Only enable scissor test if the scissor test is actually set by the
app, to avoid regressing quad-based clears used for other reasons (like
a color mask).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

amd: add NAVI10 PCI IDs

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: fix legacy GS

LLVM doesn't insert s_waitcnt_vscnt before GS_DONE.

There was also the crash in legacy GS copy shader.

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: disable clear state

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: disable DPBB

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: disable SDMA

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi: determine the rasterization primitive type accurately (v2)

v2: reworked version to fix bugs and make it more efficient

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: consolidate & improve input_prim determination for NGG

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

ac: rework ac_build_waitcnt for gfx10

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: implement si_shader_vs

Only used with tessellation + GS instancing.

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: unpack GS invocation ID

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: jump over the shader query atomic if the queries are disabled

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: cosmetic changes

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: set cache control registers

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: export correct PrimitiveID from NGG vertex shaders

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: set PA_SC_TILE_STEERING_OVERRIDE

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: add a workaround for stencil HTILE with mipmapping

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: disable DCC with MSAA

It was only enabled for 2x MSAA anyway.

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: fix GL_LINE polygon mode for decomposed primitives

We need to tell PA to accept edge flags generated by the input assembler,
because decomposed primitives shouldn't draw inner edges.

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: fix NGG GS color clamping

Just need to pass the input from ES to GS. Everything else is done.

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: fix vertex color clamping for TES

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: unbind NGG shaders when destroyed

This fixes glsl-max-varyings, which creates shaders, draws, and then
destroys them.

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: don't use the GS workaround for triangle strips w/ adjancency

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

radeonsi/gfx10: don't do the query buffer atomic for blit shaders

Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>