Alyssa Rosenzweig [Fri, 13 Dec 2019 15:07:44 +0000 (10:07 -0500)]
panfrost: Handle minor cppcheck issues
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 9 Dec 2019 16:00:42 +0000 (11:00 -0500)]
panfrost: Emit SFBD/MFBD after a batch, instead of before
The size of the scratchpad (as well as some tiler details) depend on the
contents of the batch, so we need to wait to defer filling out the FBD
until after all draws are queued.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 9 Dec 2019 16:18:21 +0000 (11:18 -0500)]
panfrost: Route stack_size from compiler
We'll need it in pan_context.c
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Jonathan Marek [Sun, 8 Dec 2019 23:16:34 +0000 (18:16 -0500)]
etnaviv: add missing vs_needs_z_div handling to NIR backend
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Jonathan Marek [Sun, 8 Dec 2019 16:52:32 +0000 (11:52 -0500)]
etnaviv: add missing formats
Add missing texture/render formats supported by hardware.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Jonathan Marek [Sun, 8 Dec 2019 16:20:46 +0000 (11:20 -0500)]
etnaviv: remove swizzle from format table
The only format that needs swizzle is R8 emulated with L8, so we can get
rid of the SWIZ(X, Y, Z, W) everywhere.
Note: R8G8 also had a swizzle, but it wasn't necessary.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Jonathan Marek [Sun, 8 Dec 2019 16:54:31 +0000 (11:54 -0500)]
etnaviv: disable integer vertex formats on pre-HALTI2 hardware
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Jonathan Marek [Sun, 20 Oct 2019 06:10:43 +0000 (02:10 -0400)]
etnaviv: update INT_FILTER choice for GLES3 formats
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Jonathan Marek [Mon, 12 Aug 2019 18:19:59 +0000 (14:19 -0400)]
etnaviv: set output mode and saturate bits
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Jonathan Marek [Sun, 20 Oct 2019 06:21:43 +0000 (02:21 -0400)]
etnaviv: sRGB render target support
Note: no srgb render target support before HALTI3
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Jonathan Marek [Sat, 10 Aug 2019 18:38:32 +0000 (14:38 -0400)]
etnaviv: remove sRGB formats from format table
This supports all sRGB formats, without having them in the format table.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tomasz Pyra [Thu, 12 Dec 2019 14:38:43 +0000 (15:38 +0100)]
gallium/swr: Fix arb_transform_feedback2
Added support for pause/resume transform feedback.
Fixed DrawTransformFeedback.
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Samuel Pitoiset [Fri, 29 Nov 2019 14:12:30 +0000 (15:12 +0100)]
radv: handle unaligned vertex fetches on GFX6/GFX10
The Vulkan spec doesn't have any words for vertex attributes alignment.
Fixes a test failure on GFX6 and a GPU hang on GFX10 with:
dEQP-VK.spirv_assembly.instruction.spirv1p4.entrypoint.tess_con_pc_entry_point
vkpipeline-db results on GFX10:
Totals from affected shaders:
SGPRS: 463772 -> 472972 (1.98 %)
VGPRS: 343208 -> 343752 (0.16 %)
Spilled SGPRs: 323 -> 336 (4.02 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size:
13806200 ->
14164472 (2.60 %) bytes
Max Waves: 84021 -> 83755 (-0.32 %)
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2161
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Lionel Landwerlin [Mon, 20 May 2019 06:56:18 +0000 (07:56 +0100)]
i965/iris: perf-queries: don't invalidate/flush 3d pipeline
Our current implementation of performance queries is fairly harsh
because it completely flushes and invalidates the 3d pipeline caches
at the beginning and end of each query. An argument can be made that
this is how performance should be measured but it probably doesn't
reflect what the application is actually doing and the actual cost of
draw calls.
A more appropriate approach is to just stall the pipeline at
scoreboard, so that we measure the effect of a draw call without
having the pipeline in a completely pristine state for every draw
call.
v2: Use end of pipe PIPE_CONTROL instruction for Iris (Ken)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Lionel Landwerlin [Thu, 12 Dec 2019 10:14:09 +0000 (12:14 +0200)]
intel/perf: drop batchbuffer flushing at query begin
This was initially intended to fix issues with the query timings going
occassionally high.
It turns out there was a bug in the attribution of OA reports to our
context when parsing the OA data. This led to reports flagged with
other context IDs to be included in our queries results.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Iago Toral Quiroga [Thu, 12 Dec 2019 10:19:23 +0000 (11:19 +0100)]
v3d: actually root the first BO in a command list in the job
We were passing cl->bo, which is NULL, so v3d_job_add_bo was a no-op.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Christian Gmeiner [Tue, 10 Dec 2019 16:15:35 +0000 (17:15 +0100)]
etnaviv: drop compiled_rs_state forward declaration
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Christian Gmeiner [Tue, 10 Dec 2019 08:54:18 +0000 (09:54 +0100)]
etnaviv: remove not used etna_bits_ones(..)
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Vinson Lee [Thu, 12 Dec 2019 01:34:30 +0000 (17:34 -0800)]
swr: Fix build with llvm-10.0.
Fix build error after llvm-10.0 commit ("
1b2842bf902a [Alignment][NFC]
CreateMemSet use MaybeAlign").
../src/gallium/drivers/swr/swr_shader.cpp: In member function ‘void (* BuilderSWR::CompileGS(swr_context*, swr_jit_gs_key&))(HANDLE, HANDLE, SWR_GS_CONTEXT*)’:
../src/gallium/drivers/swr/swr_shader.cpp:738:65: error: no matching function for call to ‘BuilderSWR::MEMSET(llvm::Value*&, llvm::Constant*, int, long unsigned int)’
MEMSET(pStream, C((char)0), VERTEX_COUNT_SIZE + CONTROL_HEADER_SIZE, sizeof(float) * KNOB_SIMD_WIDTH);
^
In file included from ../src/gallium/drivers/swr/rasterizer/jitter/builder.h:163:0,
from ../src/gallium/drivers/swr/swr_shader.cpp:43:
src/gallium/drivers/swr/rasterizer/jitter/gen_builder.hpp:51:11: note: candidate: llvm::CallInst* SwrJit::Builder::MEMSET(llvm::Value*, llvm::Value*, uint64_t, llvm::MaybeAlign, bool, llvm::MDNode*, llvm::MDNode*, llvm::MDNode*)
CallInst* MEMSET(Value *Ptr, Value *Val, uint64_t Size, MaybeAlign Align, bool isVolatile = false, MDNode *TBAATag = nullptr, MDNode *ScopeTag = nullptr, MDNode *NoAliasTag = nullptr)
^
src/gallium/drivers/swr/rasterizer/jitter/gen_builder.hpp:51:11: note: no known conversion for argument 4 from ‘long unsigned int’ to ‘llvm::MaybeAlign’
In file included from ../src/gallium/drivers/swr/rasterizer/jitter/builder.h:163:0,
from ../src/gallium/drivers/swr/swr_shader.cpp:43:
src/gallium/drivers/swr/rasterizer/jitter/gen_builder.hpp:56:11: note: candidate: llvm::CallInst* SwrJit::Builder::MEMSET(llvm::Value*, llvm::Value*, llvm::Value*, llvm::MaybeAlign, bool, llvm::MDNode*, llvm::MDNode*, llvm::MDNode*)
CallInst* MEMSET(Value *Ptr, Value *Val, Value *Size, MaybeAlign Align, bool isVolatile = false, MDNode *TBAATag = nullptr, MDNode *ScopeTag = nullptr, MDNode *NoAliasTag = nullptr)
^
src/gallium/drivers/swr/rasterizer/jitter/gen_builder.hpp:56:11: note: no known conversion for argument 4 from ‘long unsigned int’ to ‘llvm::MaybeAlign’
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jan Zielinski <jan.zielinski@intel.com>
Jonathan Marek [Thu, 12 Dec 2019 22:05:22 +0000 (17:05 -0500)]
turnip: implement subpass input attachments
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jonathan Marek [Thu, 12 Dec 2019 19:02:49 +0000 (14:02 -0500)]
turnip: CmdClearAttachments fixes
Partial depth/stencil clear and skipping unused attachments.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jonathan Marek [Fri, 6 Dec 2019 01:53:34 +0000 (20:53 -0500)]
turnip: subpass rework
A renderpass is a tile load/store cycle.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jonathan Marek [Thu, 12 Dec 2019 22:13:55 +0000 (17:13 -0500)]
turnip: add dirty bit for push constants
Fixes push constants not updating in some cases.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jonathan Marek [Thu, 12 Dec 2019 22:03:26 +0000 (17:03 -0500)]
turnip: no 8x msaa on 128bpp formats
We don't have an entry for cpp 128 in the tile_alignment table, but I don't
think the HW supports this at all (blob driver just doesn't have 8x msaa).
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jonathan Marek [Thu, 12 Dec 2019 22:01:52 +0000 (17:01 -0500)]
turnip: fix VK_IMAGE_ASPECT_STENCIL_BIT image view
Use a special format which allows sampling the stencil and set the correct
swizzle.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jonathan Marek [Thu, 12 Dec 2019 22:00:13 +0000 (17:00 -0500)]
turnip: set FRAG_WRITES_SAMPMASK bit
GPU hangs if SAMPMASK_REGID is used without this bit.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jonathan Marek [Thu, 12 Dec 2019 21:58:56 +0000 (16:58 -0500)]
turnip: set load_layer_id to zero
We don't have layered rendering and ir3 doesn't support this intrinsic, so
just set it to zero for now.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jonathan Marek [Thu, 12 Dec 2019 21:58:03 +0000 (16:58 -0500)]
turnip: update tile_align_w/tile_align_h
It looks like the actual tile alignment requirement is less than 32x32, but
in some cases input attachment texture needs 64 alignment.
Reduced the h alignment to 16 to compensate and it seems to work fine.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jonathan Marek [Thu, 12 Dec 2019 21:55:15 +0000 (16:55 -0500)]
turnip: fix tile layout logic
Use DIV_ROUND_UP and stop trying to increase the tile_count width/height
once tile_align_w/tile_align_h are reached.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jonathan Marek [Thu, 12 Dec 2019 21:51:39 +0000 (16:51 -0500)]
turnip: fix hw binning render area
Fix a mistake in the y2 coordinate.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jonathan Marek [Thu, 12 Dec 2019 18:59:45 +0000 (13:59 -0500)]
freedreno/registers: add a6xx texture format for stencil sampler
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jonathan Marek [Thu, 12 Dec 2019 18:58:28 +0000 (13:58 -0500)]
freedreno/ir3: add GLSL_SAMPLER_DIM_SUBPASS to tex_info
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jonathan Marek [Fri, 6 Dec 2019 01:58:58 +0000 (20:58 -0500)]
turnip: fix incorrectly failing assert
pColorBlendState is allowed to be NULL if subpass has >0 color attachments
but they are all unused.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Alyssa Rosenzweig [Mon, 9 Dec 2019 14:06:51 +0000 (09:06 -0500)]
panfrost: Query core count and thread tls alloc
This is supported only on newer kernels.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 9 Dec 2019 14:00:49 +0000 (09:00 -0500)]
panfrost: Factor out panfrost_query_raw
We would like to query properties other than product ID.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Timothy Arceri [Fri, 6 Dec 2019 10:57:16 +0000 (21:57 +1100)]
st/glsl_to_nir: use nir based program resource list builder
Here we use the NIR based builder to add everything to the resource
list execpt for SSO packed varyings. Since the details of those
varyings get lost during packing we leave the special handing to
the GLSL IR pass for now. In order to do this we add some bools
to the build resource list functions.
Using the NIR based resource list builder gets us a step closer to
using a native NIR based linker. It should also be faster than the
GLSL IR builder, one because the NIR optimisations should mean we
add less entries due to better optimisations, and two because nir
gives us better lists to work with and we don't need to walk the
entire IR to find the resources.
Ack-by: Alejandro Piñeiro <apinheiro@igalia.com>
Timothy Arceri [Fri, 6 Dec 2019 10:53:17 +0000 (21:53 +1100)]
st/glsl_to_nir: call gl_nir_lower_buffers() a little later
In a following commit we will use a NIR based builder to build the
OpenGL resource list, so we want to delay this call a little.
Ack-by: Alejandro Piñeiro <apinheiro@igalia.com>
Timothy Arceri [Wed, 23 Oct 2019 02:43:34 +0000 (13:43 +1100)]
glsl: add subroutine support to nir_build_program_resource_list()
This is required so we can use the NIR linker to link GLSL in
addition to spirv.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Timothy Arceri [Tue, 22 Oct 2019 03:59:27 +0000 (14:59 +1100)]
glsl: add support for named varyings in nir_build_program_resource_list()
This adds support for adding names of varying to the resource list
which is required for us to use this function with the glsl linker.
Support for names is optional for spirv which is why it had not been
added yet.
This is mostly a copy of the GLSL IR code adapted to nir.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Timothy Arceri [Tue, 22 Oct 2019 03:54:34 +0000 (14:54 +1100)]
glsl: copy the new data fields when converting to nir
These fields added in the previous commit will be used to make use
of a NIR based GLSL linker.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Timothy Arceri [Wed, 23 Oct 2019 01:05:10 +0000 (12:05 +1100)]
nir: add some fields to nir_variable_data
These will be used to provide NIR linking functionality to GLSL.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Timothy Arceri [Tue, 22 Oct 2019 00:29:47 +0000 (11:29 +1100)]
glsl: copy the how_declared field when converting to nir
This is needed to make use of nir_build_program_resource_list().
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Timothy Arceri [Fri, 6 Dec 2019 02:53:24 +0000 (13:53 +1100)]
glsl: move nir_remap_dual_slot_attributes() call out of glsl_to_nir()
In order to be able to implement a NIR based glsl linker we need to
build the program resource list with NIR. This change delays the
remaping so that a later commit can call the NIR based resource
list builder.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Dylan Baker [Thu, 12 Dec 2019 20:05:00 +0000 (12:05 -0800)]
docs: Update release notes, index, and calendar for 19.3.0
Dylan Baker [Thu, 12 Dec 2019 19:55:00 +0000 (11:55 -0800)]
docs/19.3.0: Add SHA256 sums
Dylan Baker [Thu, 12 Dec 2019 19:21:43 +0000 (11:21 -0800)]
docs: add release notes for 19.3.0
Jason Ekstrand [Wed, 4 Dec 2019 14:55:50 +0000 (08:55 -0600)]
i965: Enable GL_EXT_gpu_shader4 on Gen6+
It's already enabled for all gallium drivers that support GLSL 1.40 or
above and we already support everything in our compiler on SNB+
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Samuel Pitoiset [Thu, 12 Dec 2019 17:22:34 +0000 (18:22 +0100)]
radv: enable SpvCapabilityImageMSArray
The Vulkan spec says that StorageImageMultisample and ImageMSArray
SPIRV-V capabilities must be enabled if the
shaderStorageImageMultisample feature is supported.
This fixes a warning with RenderDoc.
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2212
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Alyssa Rosenzweig [Mon, 9 Dec 2019 14:00:24 +0000 (09:00 -0500)]
panfrost: Add routines to calculate stack size/shift
These implement the aforementioned formulas.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 9 Dec 2019 13:41:33 +0000 (08:41 -0500)]
panfrost: Split stack_shift nibble from unk0
It's conceptually independent from the upper part (which is not yet
understood, but for spilling generally remains equal to 0x1e).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 9 Dec 2019 13:41:07 +0000 (08:41 -0500)]
panfrost: Rename unknown_address_0 -> scratchpad
It's the analogue pointer in SFBD.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Sat, 7 Dec 2019 21:42:01 +0000 (16:42 -0500)]
panfrost: Describe thread local storage sizing rules
Deeply nested powers-of-two, basically :-)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Sat, 7 Dec 2019 20:54:36 +0000 (15:54 -0500)]
pan/midgard: Fix shift for TLS access
Due to this issue we were using 4x the memory we should have for TLS,
which was messing up the size calculations. Oops!
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 6 Dec 2019 22:11:44 +0000 (17:11 -0500)]
pan/midgard: Simplify and fix vector copyprop
Fixes a regression in QuakeSpasm. See
https://gitlab.freedesktop.org/mesa/mesa/issues/2169 for apitrace.
Closes #2169
Fixes: f72873e6aa0 ("pan/midgard: Copypropagate vector creation")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reported-by: Icecream95
Alyssa Rosenzweig [Fri, 6 Dec 2019 21:49:26 +0000 (16:49 -0500)]
pan/midgard: Don't try to free NULL in LCRA
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: 12e393bacf0 ("panfrost: add lcra_free() to free lcra state")
Alyssa Rosenzweig [Fri, 6 Dec 2019 21:22:06 +0000 (16:22 -0500)]
pan/midgard: Force alignment for csel_v
The swizzle on the conditional gets lost.
Fixes "horizontal mirroring" in godot. See
https://gitlab.freedesktop.org/mesa/mesa/issues/2108 which has attached
apitrace.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes: d3b3daa9d3f ("pan/midgard: Use new scheduler")
Reported-by: Icecream95
Alyssa Rosenzweig [Fri, 6 Dec 2019 20:28:08 +0000 (15:28 -0500)]
pan/midgard: Don't use no_spill for memory spill src
I'm not totally sure why this would *break* things, but it's certainly
not necessary and it does break things. Somehow this gives the RA more
freedom, fixing some spill issues.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 6 Dec 2019 20:17:44 +0000 (15:17 -0500)]
pan/midgard: Use no_spill bitmask
We would like no_spill decisions to be class-specific -- spilling from
special register to a work register doesn't preclude also spilling that
work register to stack.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 6 Dec 2019 17:20:31 +0000 (12:20 -0500)]
pan/midgard: Dynamically allocate r26/27 for spills
This allows us to spill two 128-bit values in the same bundle, since we
have two registers we can spill with. This improves the
register allocation flexibility in programs with heavy spilling, though
unfortunately it isn't sufficient (theoretically, 3.5 128-bit values can
be spilled from 3 vector units and 2 scalar units).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 6 Dec 2019 16:50:47 +0000 (11:50 -0500)]
pan/midgard: Remove code marked "TODO: remove me"
It's a fossil, how cute :-)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 6 Dec 2019 16:49:43 +0000 (11:49 -0500)]
pan/midgard: Remove consecutive_skip code
This has been unused since the beginning since it's broken. Let's toss
it so it doesn't get in the way of further fixes. Bigger to fish to fry.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 6 Dec 2019 16:38:10 +0000 (11:38 -0500)]
pan/midgard: Move bounds checking into LCRA
This simplifies the cost calculation code a bit.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 6 Dec 2019 16:36:46 +0000 (11:36 -0500)]
pan/midgard: Remove spill cost heuristic
We do need some sort of a cost heuristic, but this one is just causing
spilling to behave worse on shaders I'm looking at, and I don't need
more noise in the spill implementation right now.
Get it working first. We can optimize this later.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 6 Dec 2019 16:19:05 +0000 (11:19 -0500)]
pan/midgard: Simplify spillability test
Let's not worry about spilling twice in a bundle; that's too
restrictive. We'll need to change the schedule itself -- unfortunately,
this can have second-order effects due to pipeline registers.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 6 Dec 2019 15:44:21 +0000 (10:44 -0500)]
pan/midgard: Split spill node selection/spilling
Instead of having a giant function for both, split into the two
subtasks so we can handle errors better.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 6 Dec 2019 14:32:38 +0000 (09:32 -0500)]
pan/midgard: Move spilling code out of scheduler
We move it to the register allocator itself. It doesn't belong in
midgard_schedule.c!
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tomeu Vizoso [Thu, 12 Dec 2019 13:52:47 +0000 (14:52 +0100)]
st/mesa: Don't access members of NULL pointers
Should be harmless, but UBSAN complains about it and fills the logs with
noise.
../src/mesa/state_tracker/st_manager.c:523:27: runtime error: member access within null pointer of type 'struct st_framebuffer'"}
#0 0xaad4e89c in st_framebuffer_reference ../src/mesa/state_tracker/st_manager.c:523"}
#1 0xaad4e89c in st_api_make_current ../src/mesa/state_tracker/st_manager.c:1091"}
#2 0xaab69e0e in dri_make_current ../src/gallium/state_trackers/dri/dri_context.c:301"}
#3 0xaab48fd2 in driBindContext ../src/mesa/drivers/dri/common/dri_util.c:581"}
#4 0xb682a122 in dri2_make_current ../src/egl/drivers/dri2/egl_dri2.c:1625"}
#5 0xb67f95a4 in eglMakeCurrent ../src/egl/main/eglapi.c:884"}
#6 0x4c2b0e in tcu::surfaceless::EglRenderContext::EglRenderContext(glu::RenderConfig const&, tcu::CommandLine const&) (/deqp/modules/gles2/deqp-gles2+0x29b0e)"}
#7 0x4c3302 in tcu::surfaceless::ContextFactory::createContext(glu::RenderConfig const&, tcu::CommandLine const&, glu::RenderContext const*) const (/deqp/modules/gles2/deqp-gles2+0x2a302)"}
#8 0x73a9b0 in glu::createRenderContext(tcu::Platform&, tcu::CommandLine const&, glu::RenderConfig const&, glu::RenderContext const*) (/deqp/modules/gles2/deqp-gles2+0x2a19b0)"}
#9 0x73ad86 in glu::createDefaultRenderContext(tcu::Platform&, tcu::CommandLine const&, glu::ApiType) (/deqp/modules/gles2/deqp-gles2+0x2a1d86)"}
#10 0x4c6a78 in deqp::gles2::Context::Context(tcu::TestContext&) (/deqp/modules/gles2/deqp-gles2+0x2da78)"}
#11 0x4c3ba0 in deqp::gles2::TestPackage::init() (/deqp/modules/gles2/deqp-gles2+0x2aba0)"}
#12 0x852fd8 in tcu::TestHierarchyIterator::next() (/deqp/modules/gles2/deqp-gles2+0x3b9fd8)"}
#13 0x829660 in tcu::TestSessionExecutor::iterate() (/deqp/modules/gles2/deqp-gles2+0x390660)"}
#14 0x810aac in tcu::App::iterate() (/deqp/modules/gles2/deqp-gles2+0x377aac)"}
#15 0x4c1d4c in main (/deqp/modules/gles2/deqp-gles2+0x28d4c)"}
#16 0xb64b6aa8 in __libc_start_main (/lib/arm-linux-gnueabihf/libc.so.6+0x1aaa8)"}
../src/mesa/state_tracker/st_atom.c:115:8: runtime error: member access within null pointer of type 'struct st_program'"}
#0 0xaae11a58 in check_program_state ../src/mesa/state_tracker/st_atom.c:115"}
#1 0xaae128f6 in st_validate_state ../src/mesa/state_tracker/st_atom.c:192"}
#2 0xaadc58c2 in prepare_draw ../src/mesa/state_tracker/st_draw.c:132"}
#3 0xaadc58c2 in st_draw_vbo ../src/mesa/state_tracker/st_draw.c:184"}
#4 0xabc4f924 in _mesa_validated_drawrangeelements ../src/mesa/main/draw.c:816"}
#5 0xabc50240 in _mesa_DrawElements ../src/mesa/main/draw.c:970"}
#6 0x73ebd2 in glu::CallLogWrapper::glDrawElements(unsigned int, int, unsigned int, void const*) (/deqp/modules/gles2/deqp-gles2+0x2d4bd2)"}
#7 0x6d86b2 in deqp::gls::FragOpInteractionCase::iterate() (/deqp/modules/gles2/deqp-gles2+0x26e6b2)"}
#8 0x494d16 in deqp::gles2::TestCaseWrapper::iterate(tcu::TestCase*) (/deqp/modules/gles2/deqp-gles2+0x2ad16)"}
#9 0x7f9cf2 in tcu::TestSessionExecutor::iterateTestCase(tcu::TestCase*) (/deqp/modules/gles2/deqp-gles2+0x38fcf2)"}
#10 0x7fa5f0 in tcu::TestSessionExecutor::iterate() (/deqp/modules/gles2/deqp-gles2+0x3905f0)"}
#11 0x7e1aac in tcu::App::iterate() (/deqp/modules/gles2/deqp-gles2+0x377aac)"}
#12 0x492d4c in main (/deqp/modules/gles2/deqp-gles2+0x28d4c)"}
#13 0xb64b9aa8 in __libc_start_main (/lib/arm-linux-gnueabihf/libc.so.6+0x1aaa8)"}
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tomeu Vizoso [Thu, 12 Dec 2019 13:49:57 +0000 (14:49 +0100)]
panfrost: Don't lose bits!
UBSAN complained that when alpha was 255 and we shifted it 24 positions
to the left, it didn't fit in a signed int. That's because bitwise
operations automatically promote to signed int.
../src/gallium/drivers/panfrost/pan_job.c:1130:64: runtime error: left shift of 255 by 24 places cannot be represented in type 'int'"}
#0 0xacf953d6 in pan_pack_color ../src/gallium/drivers/panfrost/pan_job.c:1130"}
#1 0xacf953d6 in panfrost_batch_clear ../src/gallium/drivers/panfrost/pan_job.c:1204"}
#2 0xaae3226a in st_Clear ../src/mesa/state_tracker/st_cb_clear.c:513"}
#3 0x4c3d0e in deqp::gles2::TestCaseWrapper::iterate(tcu::TestCase*) (/deqp/modules/gles2/deqp-gles2+0x2ad0e)"}
#4 0x828cf2 in tcu::TestSessionExecutor::iterateTestCase(tcu::TestCase*) (/deqp/modules/gles2/deqp-gles2+0x38fcf2)"}
#5 0x8295f0 in tcu::TestSessionExecutor::iterate() (/deqp/modules/gles2/deqp-gles2+0x3905f0)"}
#6 0x810aac in tcu::App::iterate() (/deqp/modules/gles2/deqp-gles2+0x377aac)"}
#7 0x4c1d4c in main (/deqp/modules/gles2/deqp-gles2+0x28d4c)"}
#8 0xb64b6aa8 in __libc_start_main (/lib/arm-linux-gnueabihf/libc.so.6+0x1aaa8)"}
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tomeu Vizoso [Thu, 12 Dec 2019 14:00:40 +0000 (15:00 +0100)]
util: Don't access members of NULL pointers
Should be harmless, but UBSAN complains about it and fills the logs with
noise.
../src/gallium/auxiliary/util/u_inlines.h:110:8: runtime error: member access within null pointer of type 'struct pipe_surface'"}
#0 0xaaccf186 in pipe_surface_reference ../src/gallium/auxiliary/util/u_inlines.h:110"}
#1 0xaaccf186 in util_copy_framebuffer_state ../src/gallium/auxiliary/util/u_framebuffer.c:105"}
#2 0xaabfb60e in cso_set_framebuffer ../src/gallium/auxiliary/cso_cache/cso_context.c:723"}
#3 0xaae195ce in st_update_framebuffer_state ../src/mesa/state_tracker/st_atom_framebuffer.c:207"}
#4 0xaae12316 in st_validate_state ../src/mesa/state_tracker/st_atom.c:261"}
#5 0xaae31302 in st_Clear ../src/mesa/state_tracker/st_cb_clear.c:438"}
#6 0x4c3d0e in deqp::gles2::TestCaseWrapper::iterate(tcu::TestCase*) (/deqp/modules/gles2/deqp-gles2+0x2ad0e)"}
#7 0x828cf2 in tcu::TestSessionExecutor::iterateTestCase(tcu::TestCase*) (/deqp/modules/gles2/deqp-gles2+0x38fcf2)"}
#8 0x8295f0 in tcu::TestSessionExecutor::iterate() (/deqp/modules/gles2/deqp-gles2+0x3905f0)"}
#9 0x810aac in tcu::App::iterate() (/deqp/modules/gles2/deqp-gles2+0x377aac)"}
#10 0x4c1d4c in main (/deqp/modules/gles2/deqp-gles2+0x28d4c)"}
#11 0xb64b6aa8 in __libc_start_main (/lib/arm-linux-gnueabihf/libc.so.6+0x1aaa8)"}
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tomeu Vizoso [Thu, 12 Dec 2019 13:40:07 +0000 (14:40 +0100)]
nir: Don't copy empty array
It's undefined behavior UBSAN complains about, so fixing this will
reduce the noise a bit.
../src/compiler/nir/nir_clone.c:710:4: runtime error: null pointer passed as argument 2, which is declared to never be null"}
#0 0xac781be4 in clone_function ../src/compiler/nir/nir_clone.c:710"}
#1 0xac781be4 in nir_shader_clone ../src/compiler/nir/nir_clone.c:740"}
#2 0xacf99442 in panfrost_shader_compile ../src/gallium/drivers/panfrost/pan_assemble.c:54"}
#3 0xacf6b268 in panfrost_bind_shader_state ../src/gallium/drivers/panfrost/pan_context.c:1960"}
#4 0xaae326bc in set_fragment_shader ../src/mesa/state_tracker/st_cb_clear.c:135"}
#5 0xaae326bc in clear_with_quad ../src/mesa/state_tracker/st_cb_clear.c:335"}
#6 0xaae326bc in st_Clear ../src/mesa/state_tracker/st_cb_clear.c:518"}
#7 0x494d0e in deqp::gles2::TestCaseWrapper::iterate(tcu::TestCase*) (/deqp/modules/gles2/deqp-gles2+0x2ad0e)"}
#8 0x7f9cf2 in tcu::TestSessionExecutor::iterateTestCase(tcu::TestCase*) (/deqp/modules/gles2/deqp-gles2+0x38fcf2)"}
#9 0x7fa5f0 in tcu::TestSessionExecutor::iterate() (/deqp/modules/gles2/deqp-gles2+0x3905f0)"}
#10 0x7e1aac in tcu::App::iterate() (/deqp/modules/gles2/deqp-gles2+0x377aac)"}
#11 0x492d4c in main (/deqp/modules/gles2/deqp-gles2+0x28d4c)"}
#12 0xb64b9aa8 in __libc_start_main (/lib/arm-linux-gnueabihf/libc.so.6+0x1aaa8)"}
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tomeu Vizoso [Thu, 12 Dec 2019 13:37:46 +0000 (14:37 +0100)]
pan/midgard: Remove undefined behavior
As found by UBSAN, it should be harmless but it's good to remove any UB
so the tool's output is useful.
../src/panfrost/midgard/midgard_schedule.c:1094:9: runtime error: index -1 out of bounds for type 'midgard_instruction *[6]'"}
#0 0xad047872 in schedule_block ../src/panfrost/midgard/midgard_schedule.c:1094"}
#1 0xad04d41a in schedule_program ../src/panfrost/midgard/midgard_schedule.c:1116"}
#2 0xad031f98 in midgard_compile_shader_nir ../src/panfrost/midgard/midgard_compile.c:2588"}
#3 0xacf9874e in panfrost_shader_compile ../src/gallium/drivers/panfrost/pan_assemble.c:68"}
#4 0xacf6b268 in panfrost_bind_shader_state ../src/gallium/drivers/panfrost/pan_context.c:1960"}
#5 0xaae2596e in st_update_fp ../src/mesa/state_tracker/st_atom_shader.c:168"}
#6 0xaae12316 in st_validate_state ../src/mesa/state_tracker/st_atom.c:261"}
#7 0xaadc58c2 in prepare_draw ../src/mesa/state_tracker/st_draw.c:132"}
#8 0xaadc58c2 in st_draw_vbo ../src/mesa/state_tracker/st_draw.c:184"}
#9 0xabc4f924 in _mesa_validated_drawrangeelements ../src/mesa/main/draw.c:816"}
#10 0xabc50240 in _mesa_DrawElements ../src/mesa/main/draw.c:970"}
#11 0x73ebd2 in glu::CallLogWrapper::glDrawElements(unsigned int, int, unsigned int, void const*) (/deqp/modules/gles2/deqp-gles2+0x2d4bd2)"}
#12 0x6d86b2 in deqp::gls::FragOpInteractionCase::iterate() (/deqp/modules/gles2/deqp-gles2+0x26e6b2)"}
#13 0x494d16 in deqp::gles2::TestCaseWrapper::iterate(tcu::TestCase*) (/deqp/modules/gles2/deqp-gles2+0x2ad16)"}
#14 0x7f9cf2 in tcu::TestSessionExecutor::iterateTestCase(tcu::TestCase*) (/deqp/modules/gles2/deqp-gles2+0x38fcf2)"}
#15 0x7fa5f0 in tcu::TestSessionExecutor::iterate() (/deqp/modules/gles2/deqp-gles2+0x3905f0)"}
#16 0x7e1aac in tcu::App::iterate() (/deqp/modules/gles2/deqp-gles2+0x377aac)"}
#17 0x492d4c in main (/deqp/modules/gles2/deqp-gles2+0x28d4c)"}
#18 0xb64b9aa8 in __libc_start_main (/lib/arm-linux-gnueabihf/libc.so.6+0x1aaa8)"}
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tomeu Vizoso [Thu, 12 Dec 2019 07:43:12 +0000 (08:43 +0100)]
panfrost: Hold a reference to sampler views
Before we were just copying, but we need to hold a reference as well.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Jan Zielinski [Thu, 12 Dec 2019 13:07:20 +0000 (14:07 +0100)]
gallium/swr: Fix Windows build
Tessellator defines own fmin/fmax functions that conflict
with those defined in cmath header. Need to use legacy math.h
which was originally used in MS code.
Reviewed-by: Krzysztof Raszkowski <krzysztof.raszkowski@intel.com>
Samuel Pitoiset [Tue, 10 Dec 2019 16:46:26 +0000 (17:46 +0100)]
ac/nir: fix out-of-bound access when loading constants from global
Global load/store instructions can't know if the offset is
out-of-bound because they don't use descriptors (no range).
Fix this by clamping the offset for arrays that are indexed
with a non-constant offset that's greater or equal to the array
size.
This fixes VM faults and GPU hangs with Dead Rising 4.
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2148
Fixes: 71a67942003 ("ac/nir: Enable nir_opt_large_constants")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Lionel Landwerlin [Wed, 11 Dec 2019 23:51:37 +0000 (01:51 +0200)]
anv: fix assumptions about temporary fence payload
Since
f9a3d9738b12 temporary BO_WSI are definitely a thing so we have
an assert wrong.
Take that opportunity to expand a bit on an existing comment.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: f9a3d9738b12 ("anv: Use BO fences/semaphores for AcquireNextImage")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Lionel Landwerlin [Wed, 11 Dec 2019 23:58:01 +0000 (01:58 +0200)]
anv: fix fence underlying primitive checks
We appear to have got lucky that the only type of temporary fence
payload we could have was a syncobj and that would only happen when
the type of the permanent payload was also a syncobj.
This code was broken if that assumption changed and it did in commit
f9a3d9738b12.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Dave Airlie [Mon, 27 May 2019 01:03:24 +0000 (11:03 +1000)]
vtn/opencl: add shuffle/shuffle support
This adds nir encoding for these, generating them from libclc
was very expensive, and this is a lot simpler.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Dave Airlie [Wed, 22 May 2019 01:58:40 +0000 (11:58 +1000)]
vtn: convert vload/store to single value loops
There is an alignment issue doing this the other way, the
spec clearly says vload/store don't require alignment.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Kenneth Graunke [Wed, 11 Dec 2019 17:49:38 +0000 (09:49 -0800)]
iris: Default to X-tiling for scanout buffers without modifiers
Neither Mutter nor KWin's wayland compositors appear to use modifiers.
In the non-modifier case, iris was still trying to use Y-tiling for
scan-out surfaces, leading to this error:
(gnome-shell:7247): mutter-WARNING **: 09:23:47.787: meta_drm_buffer_gbm_new failed: drmModeAddFB failed: Invalid argument
We now fall back to the historical X-tiling for scanout buffers, which
ought to work everyone, at lower performance. To regain that, we need
to ensure modifiers are actually supported in environments people use.
Fixes: fbf31247710 ("iris: Rework tiling/modifiers handling")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Dave Airlie [Wed, 11 Dec 2019 03:30:35 +0000 (13:30 +1000)]
llvmpipe: enable ARB_shader_draw_parameters.
All the bits should be in place for this now.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Dave Airlie [Wed, 11 Dec 2019 03:29:45 +0000 (13:29 +1000)]
gallivm: fixup base_vertex support
base vertex should be 0 for non-indexed draws according to the
piglit tests.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Dave Airlie [Wed, 11 Dec 2019 03:02:34 +0000 (13:02 +1000)]
gallivm/draw: add support for draw_id system value.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Dave Airlie [Tue, 3 Dec 2019 05:54:21 +0000 (15:54 +1000)]
gallivm: add base instance sysval support
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Karol Herbst [Thu, 24 Oct 2019 00:50:51 +0000 (02:50 +0200)]
nv50/ir: implement global atomics and handle it for nir
TGSI doesn't have any concept of global memory right now.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Karol Herbst [Sat, 9 Nov 2019 01:13:25 +0000 (02:13 +0100)]
nir: handle nir_deref_type_ptr_as_array in rematerialize_deref_in_block
I forgot why that was required, but it still is the correct thing to do.
Hit it at some point when working on implementing more CL features.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Rob Clark [Fri, 23 Feb 2018 20:54:24 +0000 (15:54 -0500)]
spirv: add OpLifetime*
These are just hints so we can ignore them.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Karol Herbst [Mon, 2 Dec 2019 16:03:36 +0000 (17:03 +0100)]
clover/spirv: allow Int64 Atomics for supported devices
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Karol Herbst [Thu, 5 Dec 2019 10:30:11 +0000 (11:30 +0100)]
clover/nir: set spirv environment to OpenCL
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Karol Herbst [Thu, 5 Dec 2019 10:42:14 +0000 (11:42 +0100)]
clover/nir: treat UniformConstant as global memory
Just like we already do in the llvm backend. The current constant buffer code
seems fundamentally flawed and right now we are thinking on how we want to
reimplement all of that.
But until that happens, just treat is as global memory and go on.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Karol Herbst [Thu, 5 Dec 2019 10:37:34 +0000 (11:37 +0100)]
spirv: handle UniformConstant for OpenCL kernels
The caller is responsible for setting up the ubo_addr_format value as
contrary to shared and global, it's not controlled by the spirv.
Right now clovers implementation of CL constant memory uses a 24/8 bit format
to encode the buffer index and offset, but that code is dead as all backends
treat constants as global memory to workaround annoying issues within OpenCL.
Maybe that will change, maybe not. But just in case somebody wants to look at
it, add a toggle for this inside vtn.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 3 Dec 2019 04:48:03 +0000 (14:48 +1000)]
gallivm/nir: copy compare ordering code from tgsi
This fixes some isinf/isnan tests copying what the tgsi code
paths do for float compares
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Dave Airlie [Tue, 3 Dec 2019 04:45:32 +0000 (14:45 +1000)]
gallivm/nir: cleanup code and call cmp wrapper
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Dave Airlie [Tue, 3 Dec 2019 03:42:03 +0000 (13:42 +1000)]
gallivm: fix perspective enable if usage_mask doesn't have 0 bit set
The current code looks like a typo, and fails if the usage_mask
is for a y/z enabled input.
Fixes piglit ext_transform_feedback-immediate-reuse-index-buffer
with llvmpipe/nir
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Dave Airlie [Tue, 3 Dec 2019 03:41:56 +0000 (13:41 +1000)]
gallivm: fix transpose for when first channel isn't created
The previous fix worked when the second channel wasn't exposed, but
a couple of piglit tests have inputs with just the y/z chans, no x/w.
Partly Fixes piglit ext_transform_feedback-immediate-reuse-index-buffer
with llvmpipe/nir
Fixes: 5363cda52b84 ("gallivm: add swizzle support where one channel isn't defined.")
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Dave Airlie [Fri, 6 Dec 2019 04:16:52 +0000 (14:16 +1000)]
llvmpipe/nir: handle texcoord requirements
Switch to using texcoord intrinsic support.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Kristian H. Kristensen [Wed, 11 Dec 2019 17:33:56 +0000 (09:33 -0800)]
freedreno/a6xx: Silence warning for unused perf counters
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Kristian H. Kristensen [Tue, 10 Dec 2019 03:45:31 +0000 (19:45 -0800)]
freedreno/a6xx: Convert some tile setup to OUT_REG()
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Kristian H. Kristensen [Tue, 10 Dec 2019 03:31:26 +0000 (19:31 -0800)]
freedreno/a6xx: Convert gmem blits to OUT_REG()
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Kristian H. Kristensen [Tue, 10 Dec 2019 03:27:38 +0000 (19:27 -0800)]
freedreno/a6xx: Convert VSC pipe setup to OUT_REG()
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>
Kristian H. Kristensen [Tue, 10 Dec 2019 03:25:14 +0000 (19:25 -0800)]
freedreno/a6xx: Convert emit_zs() to OUT_REG()
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Kristian H. Kristensen <hoegsberg@google.com>