Dave Airlie [Tue, 16 Jul 2019 05:21:56 +0000 (15:21 +1000)]
radv/gfx10: set the pgm rsrc3/4 regs using index sh reg set
This is ported from AMDVLK, it's probably not requires unless
we want to use "real time queues", but it might be nice to just have
in place.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Dave Airlie [Wed, 17 Jul 2019 04:55:52 +0000 (14:55 +1000)]
radv: use correct register setter for ngg hw addr
this shouldn't matter, but it's good to be correct.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Eric Anholt [Wed, 17 Jul 2019 19:56:12 +0000 (12:56 -0700)]
freedreno/a6xx: Drop the WFI in the program update stateobj.
Rob Clark thinks this was likely a workaround for our const buffer
update bugs, and now that it's passing tests, we should be able to
drop it.
renderdoc-traces results:
traces/android/clashofclans.rdc: +6.1% +/- 1.1%
traces/android/candycrush.rdc: +5.2% +/- 1.6%
Reviewed-by: Rob Clark <robdclark@gmail.com>
Eric Anholt [Wed, 19 Jun 2019 18:36:29 +0000 (11:36 -0700)]
freedreno/a6xx: Drop the WFI in constant uploads.
Now that the bin vs render constlen is fixed, we can skip these waits.
Improves webgl aquarium performance at 10k fish from 27fps to 33.
Some highlights from renderdoc-traces:
traces/android/minecraft.rdc: +17.1% +/- 3.4%
traces/glmark2/ideas-speed=duration.rdc: +11.6% +/- 2.4%
traces/android/candycrush.rdc: +5.4% +/- 1.1%
traces/android/clashofclans.rdc: +4.4% +/- 1.3%
Reviewed-by: Rob Clark <robdclark@gmail.com>
Eric Anholt [Wed, 26 Jun 2019 22:35:44 +0000 (15:35 -0700)]
freedreno: Assert that we don't exceed constlen.
We actually could go up to vs->constlen in the binning shader on a6xx,
but for sanity let's make sure that we're always under constlen. This
would have caught the bug fixed in
572c76fd8826 ("freedreno: Clamp UBO
uploads to the constlen decided by the shader.")
Reviewed-by: Rob Clark <robdclark@gmail.com>
Eric Anholt [Wed, 26 Jun 2019 23:47:10 +0000 (16:47 -0700)]
freedreno: Fix more constlen overflows.
Fixes constlen overflow in
dEQP-GLES31.functional.shaders.builtin_var.compute.num_work_groups and
dEQP-GLES31.functional.image_load_store.buffer.image_size.readonly_32
and probably others.
Reviewed-by: Rob Clark <robdclark@gmail.com>
Eric Anholt [Wed, 19 Jun 2019 19:00:57 +0000 (12:00 -0700)]
freedreno: Drop stale comment about skipping uploads.
We already skip the upload if it's unused, due to the constlen >
offset check.
Reviewed-by: Rob Clark <robdclark@gmail.com>
Lepton Wu [Wed, 17 Jul 2019 17:02:20 +0000 (10:02 -0700)]
virgl: Set meta data for textures from handle.
The set of meta data was removed by commit
8083464. It broke lots of
dEQP tests when running with pbuffer surface type.
Fixes: 80834640137 ("virgl: remove dead code")
Signed-off-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Bas Nieuwenhuizen [Wed, 17 Jul 2019 00:58:59 +0000 (02:58 +0200)]
radv: Only save the descriptor set if we have one.
After reset, if valid does not contain the relevant bit the descriptor
can be != NULL but still not be valid.
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Lionel Landwerlin [Wed, 17 Jul 2019 05:46:53 +0000 (08:46 +0300)]
anv: report timestampComputeAndGraphics true
Spec says :
"timestampComputeAndGraphics specifies support for timestamps on all
graphics and compute queues. If this limit is set to VK_TRUE, all
queues that advertise the VK_QUEUE_GRAPHICS_BIT or
VK_QUEUE_COMPUTE_BIT in the VkQueueFamilyProperties::queueFlags
support VkQueueFamilyProperties::timestampValidBits of at least 36."
On gen7+ this should be true (we only have 32bits of timestamp on
gen6 and below).
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 802f00219addb3 ("anv/device: Update features and limits")
Reported-by: Timothy Strelchun <timothy.strelchun@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Rafael Antognolli [Tue, 25 Jun 2019 21:14:22 +0000 (14:14 -0700)]
iris: Enable fast clears on other miplevels and layers than 0.
Until now we only supported fast clear colors on the first miplevel and
layer. The main reason for it is that we can't have different fast clear
values at different levels/layers, since the surface state only supports
one clear value.
We can, however, enable it if we make sure we only use the same value
for all levels/layers, and if one of them changes, we resolve all the
others. We already do that for depth fast clears so hopefully it will be
fine for color fast clears too.
v2: Add check for partial clear too (Ken).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Rafael Antognolli [Wed, 3 Jul 2019 16:37:47 +0000 (09:37 -0700)]
iris: Allow resolving clear color of CCS_D surfaces.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Wed, 17 Jul 2019 20:43:04 +0000 (13:43 -0700)]
iris: Make iris_has_color_unresolved non-static
We want to use this in the transfer code and possibly for fast clears.
Andreas Bergmeier [Sun, 14 Jul 2019 20:23:15 +0000 (22:23 +0200)]
broadcom: Move v3d_get_device_info to common
In common we can use implementation for Vulkan.
Caio Marcelo de Oliveira Filho [Wed, 5 Jun 2019 20:08:56 +0000 (13:08 -0700)]
nir/large_constants: Use dominance information to find more constants
Relax the restriction that all the writes need to be in the first
block: now accept variables that have all the writes in the same
block, and all the reads are dominated by that block.
This let the pass identify large constants that are local to a helper
function. The writes will be at the place that the function is
inlined, possibly not in the first block (but still all in the same
block).
Results for vkpipeline-db in SKL:
total instructions in shared programs:
3624891 ->
3623145 (-0.05%)
instructions in affected programs: 79416 -> 77670 (-2.20%)
helped: 16
HURT: 0
total cycles in shared programs:
1458149667 ->
1458147273 (<.01%)
cycles in affected programs:
30154164 ->
30151770 (<.01%)
helped: 14
HURT: 2
total loops in shared programs: 2437 -> 2437 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0
total spills in shared programs: 8813 -> 8745 (-0.77%)
spills in affected programs: 2894 -> 2826 (-2.35%)
helped: 8
HURT: 0
total fills in shared programs: 23470 -> 23392 (-0.33%)
fills in affected programs: 12248 -> 12170 (-0.64%)
helped: 6
HURT: 2
LOST: 0
GAINED: 0
Results for shader-db in SKL with Iris:
total instructions in shared programs:
15379442 ->
15379392 (<.01%)
instructions in affected programs: 837 -> 787 (-5.97%)
helped: 2
HURT: 2
helped stats (abs) min: 27 max: 27 x̄: 27.00 x̃: 27
helped stats (rel) min: 10.47% max: 10.67% x̄: 10.57% x̃: 10.57%
HURT stats (abs) min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel) min: 1.23% max: 1.23% x̄: 1.23% x̃: 1.23%
95% mean confidence interval for instructions value: -39.14 14.14
95% mean confidence interval for instructions %-change: -15.51% 6.17%
Inconclusive result (value mean confidence interval includes 0).
total loops in shared programs: 4880 -> 4880 (0.00%)
loops in affected programs: 0 -> 0
helped: 0
HURT: 0
total cycles in shared programs:
370677237 ->
370676567 (<.01%)
cycles in affected programs: 17852 -> 17182 (-3.75%)
helped: 2
HURT: 1
helped stats (abs) min: 338 max: 356 x̄: 347.00 x̃: 347
helped stats (rel) min: 13.98% max: 14.64% x̄: 14.31% x̃: 14.31%
HURT stats (abs) min: 24 max: 24 x̄: 24.00 x̃: 24
HURT stats (rel) min: 0.18% max: 0.18% x̄: 0.18% x̃: 0.18%
total spills in shared programs: 11772 -> 11772 (0.00%)
spills in affected programs: 0 -> 0
helped: 0
HURT: 0
total fills in shared programs: 24948 -> 24948 (0.00%)
fills in affected programs: 0 -> 0
helped: 0
HURT: 0
LOST: 0
GAINED: 0
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Jason Ekstrand [Sat, 13 Jul 2019 23:35:20 +0000 (18:35 -0500)]
intel/fs: Use a strided MOV instead of a conversion for load_* destinations
In many cases, the compiler can just copy-prop the strided MOV whereas
the conversion is a bit trickier. This cuts 5% of the instructions off
of one particular Vulkan CTS test which does lots of load_ssbo.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Sat, 13 Jul 2019 04:26:59 +0000 (23:26 -0500)]
nir/algebraic: Optimize comparisons and up-casts
These seem like obvious enough optimizations in the world of multiple
integer bit sizes. The only known thing which hits these at the moment
is some Vulkan CTS tests for 16-bit SSBO values which like to up-cast
and check for equality. However, it's something that's bound to come up
as we start seeing more integers in shaders.
The optimizations of comparisons of casted values with constants are
something which we would ideally do with range analysis. However,
lacking that, we can do it in opt_algebraic as long as one side is a
constant.
In dEQP-VK.ssbo.phys.layout.random.16bit.scalar.13, this commit, along
with the previous commit, reduce the number of instructions emitted on
Skylake from 55328 to 44546, a reduction of 20%.
Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Jason Ekstrand [Sat, 13 Jul 2019 04:26:48 +0000 (23:26 -0500)]
nir/algebraic: Optimize comparing unpacked values
We could, in theory, add the same optimization for 64-bit unpack
operations but that's likely to fight with 64-bit integer lowering on
platforms which require it so it will require more infrastructure before
that will be a good idea.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Sat, 13 Jul 2019 15:57:24 +0000 (10:57 -0500)]
nir/algebraic: Print out the list of transforms in the C file
This helps greatly when debugging algebraic transform generators because
you can now actually see the output and verify that your transforms are
getting generated.
Acked-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Sat, 13 Jul 2019 17:06:00 +0000 (12:06 -0500)]
intel/fs: Properly stride NULL replacement regs in DCE
This fixes some validation errors generated by certain D->W conversions
but is likely not a full solution. Calculating an actual register
stride is a far more complex problem in general and should probably be
handled by the brw_fs_generator.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Eric Anholt [Tue, 16 Jul 2019 19:38:10 +0000 (12:38 -0700)]
nir: Fix nir_lower_alu_to_scalar's instr filtering.
It was checking if the dest or src[0] SSA values were vectors, rather than
whether the ALU op was using the source as a vector resulting in a
nir_fdot4 making it through to vc4 and v3d:
vec1 32 ssa_6 = fdot4 ssa_4.xxxx, ssa_5
Fixes: c1cffa4249ca ("nir/alu_to_scalar: Use the new NIR lowering framework")
v2: Use Jason's recommendation to look at input_sizes.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Alyssa Rosenzweig [Tue, 16 Jul 2019 18:36:11 +0000 (11:36 -0700)]
panfrost: Merge varyings_mem into transient buffers
Theoretically we would like these split since varyings can have
specially optimized flags (no map, coherent local). For now, since
neither of these flags is particularly meaningful right now, merge them
together instead of special casing varyings_mem.
Saves upwards of 64MB of RAM per context.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Lionel Landwerlin [Mon, 15 Jul 2019 06:01:20 +0000 (09:01 +0300)]
vulkan/wsi: update swapchain status on vkQueuePresent
With the following chain of events :
vkQueuePresent()
<- Surface resize
vkQueuePresent()
We should be able to report SUBOPTIMAL or OUT_OF_DATE on the second
vkQueuePresent() call. Currently we only look at X11 events in the
vkAcquireNextImage() path so we're not able to report this.
This change checks the queue of events and process any available ones
to update the swapchain status.
v2: Be consistent about reporting the current error state of the
swapchain (Jason)
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111097
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Samuel Pitoiset [Wed, 17 Jul 2019 12:19:10 +0000 (14:19 +0200)]
radv: add an option for disabling NGG on GFX10
Will be useful for testing the legacy path.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Erik Faye-Lund [Tue, 7 May 2019 10:13:43 +0000 (12:13 +0200)]
softpipe: pass stream-out targets to draw-module early
This is essensially a port of
ed53e61bec9 from LLVMpipe to softpipe,
as it makes things a bit simpler and more performant.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-By: Gert Wollny <gert.wollny@collabora.com>
Alejandro Piñeiro [Sat, 14 Oct 2017 08:52:51 +0000 (10:52 +0200)]
spirv_extensions: i965: initialize SPIR-V extensions
v2: Rebase update after changes on previous patches.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Alejandro Piñeiro [Fri, 13 Oct 2017 18:43:01 +0000 (20:43 +0200)]
spirv_extensions: add spirv_supported_extensions on gl_constants
We can use it to get real values for ARB_spirv_extensions methods.
Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Arcady Goldmints-Orlov <agoldmints@igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Alejandro Piñeiro [Wed, 19 Jun 2019 18:58:30 +0000 (13:58 -0500)]
spirv_extensions: define spirv_extensions_supported
Add a struct to maintain which SPIR-V extensions are supported, and an
utility method to initialize it based on
nir_spirv_supported_capabilities.
v2:
* Fixing code style (Ian Romanick)
* Adding a prefix (spirv) to fill_supported_spirv_extensions (Ian Romanick)
v3: rebase update (nir_spirv_supported_extensions renamed)
v4: include AMD_gcn_shader support
v5: move spirv_fill_supported_spirv_extensions to
src/mesa/main/spirv_extensions.c
Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Arcady Goldmints-Orlov <agoldmints@igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Alejandro Piñeiro [Fri, 13 Oct 2017 14:17:51 +0000 (16:17 +0200)]
spirv_extensions: add list of extensions and to_string method
Ideally this should be generated somehow. One option would be gather
all the extension dependencies listed on the core grammar, but there
would be the possibility of not including some of the extensions.
Note that spirv-tools is doing it just slightly better, as it has a
hardcoded list of extensions manually took from the registry, that
they parse to get the enum and the to_string method (see
generate_grammar_tables.py).
v2:
* Use a macro to improve readability. (Tapani Pälli)
* Add unreachable on the switch, no default (Eric Engestrom)
* No typedef enum (Ian Romanick)
* Sort extensions names (Ian Romanick)
* Don't add extensions unlikely to be supported by Mesa at any point
(Ian Romanick)
v3: rebase update
v4: Include AMD_gcn_shader
v5: move spirv_extensions_to_string to src/mesa/main/spirv_extensions.c
Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Arcady Goldmints-Orlov <agoldmints@igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Alejandro Piñeiro [Tue, 10 Oct 2017 14:09:25 +0000 (16:09 +0200)]
spirv_extensions: add GL_ARB_spirv_extensions boilerplate
v2:
* Mention extension gap at gl_API.xml (Emil Velikov)
* Bail with INVALID_ENUM if extension not available on getStringi (Emil Velikov)
* Use EXTRA_EXT macro when defining the extension at
get.c/get_hash_params.py (Emil Velikov)
* Rename source files (spirvextensions.[ch] -> spirv_extensions.[ch]) (Ian)
v3:
* Fix GL_PROGRAM_BINARY_FORMATS glGet query, broken by error on a
previous rebase
v4:
* Fix rebase conflicts on getstring.c after
GL_SHADING_LANGUAGE_VERSION query was added
v5:
* Remove src/mapi/glapi/gen/Makefile.am as it no longer exists in
master
Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Arcady Goldmints-Orlov <agoldmints@igalia.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Samuel Pitoiset [Tue, 16 Jul 2019 15:11:50 +0000 (17:11 +0200)]
radv/gfx10: implement VK_EXT_post_depth_coverage
I did implement this extension a while ago but it didn't work
on pre GFX10 for some reasons. Now all CTS pass.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 16 Jul 2019 15:35:00 +0000 (17:35 +0200)]
radv/gfx10: disable the TC compat zrange workaround
Unnecessary.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 16 Jul 2019 14:39:16 +0000 (16:39 +0200)]
radv/gfx10: fallback to the legacy path if tess and extreme geometry
This is unsupported and hangs.
This fixes GPU hangs with
dEQP-VK.tessellation.geometry_interaction.limits.output_required_*.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Tue, 16 Jul 2019 14:39:15 +0000 (16:39 +0200)]
radv/gfx10: always build the GS copy shader but uses it on-demand
It should be possible to build it on-demand too but it requires
more work. On GFX10, the GS copy shader is required when tess
is enabled with extreme geometry.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Gert Wollny [Thu, 2 May 2019 13:54:55 +0000 (15:54 +0200)]
softpipe: Remove unused static function
Thanks to Eric Engestrom for pointing out that there was something wrong
with that function.
Fixes: 724a73509e1bc1ce3abf9500e457bb2911b642db
softpipe: Prepare handling explicit gradients
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Caio Marcelo de Oliveira Filho [Wed, 10 Jul 2019 16:00:47 +0000 (09:00 -0700)]
spirv: Bail when we see CounterBuffer decoration
This decoration can be ignored, so we can just skip the next steps.
Otherwise we'd have to also handle it in apply_var_decoration.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 15 Jul 2019 18:51:14 +0000 (11:51 -0700)]
iris: Drop copy and pasted iris_timebase_scale
Lionel moved brw_timebase_scale to gen_device_info_timebase_scale a few
months ago, so we should just use that, and not our own copy in iris.
Jason Ekstrand [Fri, 12 Jul 2019 16:01:40 +0000 (11:01 -0500)]
nir/regs_to_ssa: Handle regs in phi sources properly
Sources of phi instructions act as if they occur at the very end of the
predecessor block not the block in which the phi lives. In order to
handle them correctly, we have to skip phi sources on the normal
instruction walk and handle them as a separate walk over the successor
phis. While registers in phi instructions is a bit of an oddity it can
happen when we temporarily go out-of-SSA for control-flow manipulations.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111075
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Jason Ekstrand [Wed, 10 Jul 2019 22:55:44 +0000 (17:55 -0500)]
spirv: Add a warning for ArrayStride on arrays of blocks
It's disallowed according to the SPIR-V spec or at least I think that's
what the spec says. It's in a section explicitly about explicit layout
of things in the StorageBuffer, Uniform, and PushConstant storage
classes so it's not 100% clear that it applies with other storage
classes. However, it seems like it should apply in general and
violating it can trigger (fairly harmless) asserts in NIR.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Caio Marcelo de Oliveira Filho [Fri, 12 Jul 2019 18:33:38 +0000 (11:33 -0700)]
anv: Increase state allocation size limit to 2MB
When running on ICL the
dEQP-VK.ssbo.phys.layout.random.16bit.scalar.13 needs more than 1M for
the shader, so bump it.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Yevhenii Kolesnikov [Tue, 9 Jul 2019 12:11:15 +0000 (15:11 +0300)]
meta: leaking of BO with DrawPixels
ctx->Unpack.BufferObj wasn't unreferenced.
Fixes: d492e7b0171 (meta: Fix invalid PBO access from DrawPixels when
trying to just alloc.)
CC: Eric Anholt <eric@anholt.net>
Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Eric Anholt [Tue, 2 Jul 2019 00:20:55 +0000 (17:20 -0700)]
swrast: Move _mesa_format_pack_colormask() to the only caller.
This avoids needing format_pack to have access to the GLenum return
functions for mesa_format. It seems like an odd function and unlikely
to be reused.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Mon, 1 Jul 2019 22:43:19 +0000 (15:43 -0700)]
mesa: Give _mesa_format_get_color_encoding a clearer name.
It only returned one of two values.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Mon, 1 Jul 2019 22:38:56 +0000 (15:38 -0700)]
mesa: Drop redundant checks for sRGB before sRGB to linear conversion.
_mesa_get_srgb_format_linear() just returns the original format if it
wasn't sRGB.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Mon, 1 Jul 2019 23:45:32 +0000 (16:45 -0700)]
mesa: Fold _mesa_unpack_depth_stencil_row() into its only caller.
This was the last bit of gl.h usage in format packing.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Mon, 1 Jul 2019 23:27:24 +0000 (16:27 -0700)]
mesa: Convert format_pack/unpack off of GL types.
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Mon, 1 Jul 2019 23:34:23 +0000 (16:34 -0700)]
mesa: Port format_pack/unpack off of _mesa_problem().
unreachable() should be plenty of debug for these.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Mon, 1 Jul 2019 22:23:19 +0000 (15:23 -0700)]
mesa: Mostly switch Mesa format info off of GL types other than GLenum.
I'm considering moving most of this code to src/util/, and I want that
code to not expose GL types in its interfaces.
Reviewed-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Mon, 1 Jul 2019 21:29:45 +0000 (14:29 -0700)]
mesa: Rename gl_pack typedefs to mesa_pack.
These are packing mesa formats, not a GL format/type.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Mon, 1 Jul 2019 21:07:30 +0000 (14:07 -0700)]
mesa: Rename gl_format_info to mesa_format_info.
It's about MESA_FORMATs, after all.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Mon, 1 Jul 2019 20:06:09 +0000 (13:06 -0700)]
state_tracker: Move the format test out to be an actual unit test.
We want errors in the table to show up as unit test failures in MRs.
Also keeps unit test code out of the built drivers.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Mon, 1 Jul 2019 19:38:41 +0000 (12:38 -0700)]
u_format: Remove pointless comments.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Thu, 27 Jun 2019 22:53:53 +0000 (15:53 -0700)]
src/util: Switch _mesa_half_to_float() to u_half.h's version.
The two implementations differ across the entire input range only in
that u_half.h preserves mantissa bits for NaNs. The u_half.h version
shaves 15% off of the text size of half_float.o.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Eric Anholt [Thu, 27 Jun 2019 22:46:28 +0000 (15:46 -0700)]
u_half_test: Turn it into an actual unit test.
You could break the test and meson test wouldn't complain, since we
returned success either way.
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Mauro Rossi [Sun, 7 Jul 2019 23:17:22 +0000 (01:17 +0200)]
android: radv/gfx10: generate gfx10_format_table.h
This patch adds the missing building rules for Android,
to avoid following building errors:
In file included from external/mesa/src/amd/vulkan/radv_debug.c:35:
In file included from external/mesa/src/amd/vulkan/radv_debug.h:27:
external/mesa/src/amd/vulkan/radv_private.h:95:10:
fatal error: 'gfx10_format_table.h' file not found
^~~~~~~~~~~~~~~~~~~~~~
1 error generated.
In file included from external/mesa/src/amd/vulkan/radv_android.c:31:
external/mesa/src/amd/vulkan/radv_private.h:95:10:
fatal error: 'gfx10_format_table.h' file not found
^~~~~~~~~~~~~~~~~~~~~~
1 error generated.
Fixes: 3dc5ec5d16 ("radv/gfx10: generate gfx10_format_table.h")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Rob Clark [Mon, 15 Jul 2019 16:05:55 +0000 (09:05 -0700)]
mesa/st: add sampler uniforms
Add sampler uniforms for the UV plane(s), so driver can count the
uniforms and get the correct sampler count.
Fixes lowered YUV on a6xx which actually wants to know # of samplers.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Rob Clark [Fri, 12 Jul 2019 16:17:30 +0000 (09:17 -0700)]
egl/android: handle multi-fd native windows
We can hit multi-fd EGL_NATIVE_BUFFER_ANDROID case when the native
android buffer is YUV. So we need to handle that.
Currently this went unnoticed because, even though we have two or
three fd's for YUV native android buffers, they all reference the
same backing buffer. But we really shouldn't rely on that.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jason Ekstrand [Thu, 11 Jul 2019 21:59:31 +0000 (16:59 -0500)]
st,i965: Stop looping on 64-bit lowering
Now that the 64-bit lowering passes do a complete lowering in one go, we
don't need to loop anymore. We do, however, have to ensure that int64
lowering happens after double lowering because double lowering can
produce int64 ops.
Reviewed-by: Eric Anholt <eric@anholt.net>
Jason Ekstrand [Thu, 11 Jul 2019 22:06:31 +0000 (17:06 -0500)]
nir/lower_doubles: Handle fdiv and fsub directly
Reviewed-by: Eric Anholt <eric@anholt.net>
Jason Ekstrand [Thu, 11 Jul 2019 21:54:01 +0000 (16:54 -0500)]
nir/lower_doubles: Use the new NIR lowering framework
One advantage of this is that we no longer need to run in a loop because
the new framework handles lowering instructions added by lowering.
Reviewed-by: Eric Anholt <eric@anholt.net>
Jason Ekstrand [Thu, 11 Jul 2019 21:46:19 +0000 (16:46 -0500)]
nir/lower_doubles: Use "alu" for the nir_alu_instr
Reviewed-by: Eric Anholt <eric@anholt.net>
Jason Ekstrand [Thu, 11 Jul 2019 21:31:49 +0000 (16:31 -0500)]
nir/lower_int64: Use the core NIR lowering framework
One advantage of this is that we no longer need to run in a loop because
the new framework handles lowering instructions added by lowering.
Reviewed-by: Eric Anholt <eric@anholt.net>
Jason Ekstrand [Thu, 11 Jul 2019 20:20:39 +0000 (15:20 -0500)]
nir/alu_to_scalar: Use the new NIR lowering framework
Reviewed-by: Eric Anholt <eric@anholt.net>
Jason Ekstrand [Thu, 11 Jul 2019 20:19:17 +0000 (15:19 -0500)]
nir/alu_to_scalar: Use "alu" as the name for the nir_alu_instr
Reviewed-by: Eric Anholt <eric@anholt.net>
Jason Ekstrand [Fri, 12 Jul 2019 20:26:03 +0000 (15:26 -0500)]
nir/lower_system_values: Support lowering more intrinsics
Instead of only lowering system from variables, lower most to intrinsics
and let the lowering framework immediately lower the intrinsic. This
will result in a bit more instruction churn but it means that NIR code
builders can just use intrinsics instead of everything having to go
through variables.
Reviewed-by: Eric Anholt <eric@anholt.net>
Jason Ekstrand [Thu, 11 Jul 2019 19:01:20 +0000 (14:01 -0500)]
nir/lower_system_values: Drop the context-aware builder functions
Instead of having context-aware builder functions, just provide lowering
for the system value intrinsics and let nir_shader_lower_instructions
handle the recursion for us. This makes everything a bit simpler and
means that the lowering can also be used if something comes in as a
system value intrinsic rather than a load_deref.
Reviewed-by: Eric Anholt <eric@anholt.net>
Jason Ekstrand [Thu, 11 Jul 2019 18:30:03 +0000 (13:30 -0500)]
nir/lower_system_values: Use the new generic NIR lowering helpers
Reviewed-by: Eric Anholt <eric@anholt.net>
Jason Ekstrand [Thu, 11 Jul 2019 18:04:05 +0000 (13:04 -0500)]
nir/lower_subgroups: Use the new generic NIR lowering helpers
Reviewed-by: Eric Anholt <eric@anholt.net>
Jason Ekstrand [Thu, 11 Jul 2019 18:00:42 +0000 (13:00 -0500)]
nir: Add some generic helpers for writing lowering passes
Reviewed-by: Eric Anholt <eric@anholt.net>
Jason Ekstrand [Thu, 11 Jul 2019 20:05:27 +0000 (15:05 -0500)]
nir: Add a helper for fetching the SSA def from an instruction
Reviewed-by: Eric Anholt <eric@anholt.net>
Tomeu Vizoso [Fri, 12 Jul 2019 14:42:52 +0000 (16:42 +0200)]
pandecode: Add more addresses to trace
When debugging, we're given the fault_pointer unresolved, so it is
helpful to have more context in the decode.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tomeu Vizoso [Thu, 11 Jul 2019 06:06:41 +0000 (08:06 +0200)]
panfrost: Use 64-bit descriptors globally
Midgard supports two modes of operation, 32-bit mode and 64-bit mode.
The GPU is natively 64-bit, but job descriptors can be submitted in
32-bit mode. Among other changes, 32-bit mode shortens pointer sizes to
use 32-bit pointers rather than the full 64-bit range.
The blob decides which mode to use based on the CPU bitness, so an armhf
system uses 32-bit descriptors and an aarch64 system uses 64-bit
descriptors. For a while, we mimicked this, bu inevitably this caused
the 32-bit support to lag behind as our reference platform is 64-bit.
To combat the code staleness, we traced an older GPU paired with a 64-bit
CPU (the Midgard T720 on-board the sunxi H64). From there, we could tell
which fields were really about hardware and which fields were simply
reflections of the descriptor bitness.
From there, we decided to remove support for 32-bit descriptors
entirely, using 64-bit descriptors unconditionally. There is minimal
performance penalty for this in practice, and it allows us to unify
these disparate code paths. This fixes:
- T860 + armhf
- T820 + armhf
- T760 + aarch64
And will help bringup of 1st/2nd generation Midgard regardless of CPU.
[Work done by Tomeu. Commit message written by Alyssa.]
v2: Add comments preserving information about the old behaviour for
future reference. Fix a compiler warning. (Alyssa)
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Jason Ekstrand [Mon, 15 Jul 2019 22:14:26 +0000 (17:14 -0500)]
anv: Account for dynamic stencil write disables in the PMA fix
In
6ce8592836b8 we started looking at the dynamic stencil state and
disabling stencil writes when the stencil mask is zero. Unfortunately,
we never updated the PMA fix code accordingly so 3DSTATE_WM_DEPTH_STENCIL
and the PMA fix were getting out-of-sync causing hangs.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109203
Fixes: 6ce8592836 "anv: Disable stencil writes when both write..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Alyssa Rosenzweig [Mon, 15 Jul 2019 21:15:24 +0000 (14:15 -0700)]
panfrost: Implement opportunistic AFBC
Rather than hardcoding a BO layout at creation-time, we implement the
ability to hint layouts at various points in a BO's lifetime,
potentially reallocating and switching layouts if it's heuristically
deemed useful to do so.
In this patch, we add a simple hinting implementation, opportunistically
compressing FBOs.
Support is hidden behind PAN_MESA_DEBUG=afbc as the implementation is
incomplete (software access to AFBC is unimplemented at the moment) and
therefore would regress significantly.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 15 Jul 2019 22:35:30 +0000 (15:35 -0700)]
panfrost/mfbd: Zero out framebuffer_stride
We don't know what this is, so let's not pretend we do.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 15 Jul 2019 22:34:50 +0000 (15:34 -0700)]
panfrost: AFBC buffers must be cache-line aligned
Fixes a DATA_INVALID_FAULT when AFBC is paried with mipmapping.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 15 Jul 2019 22:16:08 +0000 (15:16 -0700)]
panfrost: Add Z/S and MRT BOs to the job
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 15 Jul 2019 21:59:03 +0000 (14:59 -0700)]
panfrost: Set usage2 during draw, not CSO
It can change from a layout switch.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Sergii Romantsov [Mon, 27 May 2019 13:45:35 +0000 (16:45 +0300)]
meta: memory leak of CopyPixels usage
Meta of CopyPixel generates a buffer object
but does not free it on cleanup.
Fixes: 37d11b13ce1d (meta: Don't pollute the buffer object namespace in _mesa_meta_setup_vertex_objects)
Signed-off-by: Sergii Romantsov <sergii.romantsov@globallogic.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Samuel Pitoiset [Fri, 12 Jul 2019 16:12:36 +0000 (18:12 +0200)]
radv: add radv_emit_streamout_{begin,end} helpers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Fri, 12 Jul 2019 16:12:35 +0000 (18:12 +0200)]
radv: pass output values to radv_emit_stream_output()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Fri, 12 Jul 2019 16:12:34 +0000 (18:12 +0200)]
radv: allow to select DST_SEL with RELEASE_MEM
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Fri, 12 Jul 2019 16:12:33 +0000 (18:12 +0200)]
radv: allow to emit PS_DONE/CS_DONE with RELEASE_MEM
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Fri, 12 Jul 2019 16:12:32 +0000 (18:12 +0200)]
radv: restore an assertion in handle_vs_outputs()
The NGG GS epilogue no longers call that function so the assertion
is just useless now.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Fri, 12 Jul 2019 16:12:31 +0000 (18:12 +0200)]
radv/gfx10: emit ES outputs of TES when it's not NGG
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Tue, 16 Jul 2019 07:34:40 +0000 (09:34 +0200)]
radv: update LATE_ALLOC_VS.LIMIT
Mirror RadeonSI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Tue, 16 Jul 2019 07:34:39 +0000 (09:34 +0200)]
radv/gfx10: support pixel shaders without exports
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Tue, 16 Jul 2019 06:37:32 +0000 (08:37 +0200)]
radv: fix gathering clip/cull distance masks for GS
For NGG, the driver relies on the VS outinfo struct.
This fixes
dEQP-VK.clipping.user_defined.clip_*_vert_tess_geom_*
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Samuel Pitoiset [Tue, 16 Jul 2019 07:37:56 +0000 (09:37 +0200)]
Revert "radv/gfx10: don't set array pitch field on images"
It introduces too many regressions.
This reverts commit
6d50dcd80fc120fdabcd57ef576f3e45ea2724e4.
Iago Toral Quiroga [Fri, 12 Jul 2019 09:06:22 +0000 (11:06 +0200)]
v3d: flag dirty state when binding new sampler states
We emit code to saturate texture coordinates when using clamp wrapping
mode so if we don't flag the dirty state here we don't get to recompile
the shaders when the wrapping mode changes.
v2:
- Do the same when setting sampler views (Eric)
- Use a switch statement instead of an if ladder.
- Swap the shader stage assertion with an unreachable.
Fixes:
spec/!opengl 1.1/texwrap 1d bordercolor/gl_rgba8, border color only
spec/!opengl 1.1/texwrap 1d proj bordercolor/gl_rgba8, projected, border color only
spec/!opengl 1.1/texwrap 2d bordercolor/gl_rgba8, border color only
spec/!opengl 1.1/texwrap 2d proj bordercolor/gl_rgba8, projected, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_alpha12, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_alpha16, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_alpha4, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_alpha8, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_intensity8, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_luminance4_alpha4, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_luminance6_alpha2, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_luminance8, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_luminance8_alpha8, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_r3_g3_b2, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_rgb10, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_rgb10_a2, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_rgb4, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_rgb5, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_rgb5_a1, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_rgb8, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_rgba4, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor-swizzled/gl_rgba8, swizzled, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_alpha12, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_alpha16, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_alpha4, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_alpha8, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_intensity8, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_luminance4_alpha4, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_luminance6_alpha2, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_luminance8, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_luminance8_alpha8, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_r3_g3_b2, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_rgb10, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_rgb10_a2, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_rgb4, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_rgb5, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_rgb5_a1, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_rgb8, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_rgba4, border color only
spec/!opengl 1.1/texwrap formats bordercolor/gl_rgba8, border color only
spec/!opengl 1.2/texwrap 3d bordercolor/gl_rgba8, border color only
spec/!opengl 1.2/texwrap 3d proj bordercolor/gl_rgba8, projected, border color only
spec/arb_es2_compatibility/texwrap formats bordercolor-swizzled/gl_rgb565, swizzled, border color only
spec/arb_es2_compatibility/texwrap formats bordercolor/gl_rgb565, border color only
spec/arb_texture_compression/texwrap formats bordercolor-swizzled/gl_compressed_alpha, swizzled, border color only
spec/arb_texture_compression/texwrap formats bordercolor-swizzled/gl_compressed_luminance_alpha, swizzled, border color only
spec/arb_texture_compression/texwrap formats bordercolor-swizzled/gl_compressed_rgb, swizzled, border color only
spec/arb_texture_compression/texwrap formats bordercolor/gl_compressed_alpha, border color only
spec/arb_texture_compression/texwrap formats bordercolor/gl_compressed_luminance_alpha, border color only
spec/arb_texture_compression/texwrap formats bordercolor/gl_compressed_rgb, border color only
spec/arb_texture_float/texwrap formats bordercolor-swizzled/gl_alpha16f_arb, swizzled, border color only
spec/arb_texture_float/texwrap formats bordercolor-swizzled/gl_intensity16f_arb, swizzled, border color only
spec/arb_texture_float/texwrap formats bordercolor-swizzled/gl_luminance16f_arb, swizzled, border color only
spec/arb_texture_float/texwrap formats bordercolor-swizzled/gl_luminance_alpha16f_arb, swizzled, border color only
spec/arb_texture_float/texwrap formats bordercolor-swizzled/gl_rgb16f, swizzled, border color only
spec/arb_texture_float/texwrap formats bordercolor-swizzled/gl_rgba16f, swizzled, border color only
spec/arb_texture_float/texwrap formats bordercolor/gl_alpha16f_arb, border color only
spec/arb_texture_float/texwrap formats bordercolor/gl_intensity16f_arb, border color only
spec/arb_texture_float/texwrap formats bordercolor/gl_luminance16f_arb, border color only
spec/arb_texture_float/texwrap formats bordercolor/gl_luminance_alpha16f_arb, border color only
spec/arb_texture_float/texwrap formats bordercolor/gl_rgb16f, border color only
spec/arb_texture_float/texwrap formats bordercolor/gl_rgba16f, border color only
spec/arb_texture_rectangle/texwrap rect bordercolor/gl_rgba8, border color only
spec/arb_texture_rectangle/texwrap rect proj bordercolor/gl_rgba8, projected, border color only
spec/arb_texture_rg/texwrap formats bordercolor-swizzled/gl_r8, swizzled, border color only
spec/arb_texture_rg/texwrap formats bordercolor-swizzled/gl_rg8, swizzled, border color only
spec/arb_texture_rg/texwrap formats bordercolor/gl_r8, border color only
spec/arb_texture_rg/texwrap formats bordercolor/gl_rg8, border color only
spec/arb_texture_rg/texwrap formats-float bordercolor-swizzled/gl_r16f, swizzled, border color only
spec/arb_texture_rg/texwrap formats-float bordercolor-swizzled/gl_rg16f, swizzled, border color only
spec/arb_texture_rg/texwrap formats-float bordercolor/gl_r16f, border color only
spec/arb_texture_rg/texwrap formats-float bordercolor/gl_rg16f, border color only
spec/ext_packed_float/texwrap formats bordercolor-swizzled/gl_r11f_g11f_b10f, swizzled, border color only
spec/ext_packed_float/texwrap formats bordercolor/gl_r11f_g11f_b10f, border color only
spec/ext_texture_shared_exponent/texwrap formats bordercolor-swizzled/gl_rgb9_e5, swizzled, border color only
spec/ext_texture_shared_exponent/texwrap formats bordercolor/gl_rgb9_e5, border color only
spec/ext_texture_snorm/texwrap formats bordercolor-swizzled/gl_alpha8_snorm, swizzled, border color only
spec/ext_texture_snorm/texwrap formats bordercolor-swizzled/gl_intensity8_snorm, swizzled, border color only
spec/ext_texture_snorm/texwrap formats bordercolor-swizzled/gl_luminance8_alpha8_snorm, swizzled, border color only
spec/ext_texture_snorm/texwrap formats bordercolor-swizzled/gl_luminance8_snorm, swizzled, border color only
spec/ext_texture_snorm/texwrap formats bordercolor-swizzled/gl_r8_snorm, swizzled, border color only
spec/ext_texture_snorm/texwrap formats bordercolor-swizzled/gl_rg8_snorm, swizzled, border color only
spec/ext_texture_snorm/texwrap formats bordercolor-swizzled/gl_rgb8_snorm, swizzled, border color only
spec/ext_texture_snorm/texwrap formats bordercolor-swizzled/gl_rgba8_snorm, swizzled, border color only
spec/ext_texture_snorm/texwrap formats bordercolor/gl_alpha8_snorm, border color only
spec/ext_texture_snorm/texwrap formats bordercolor/gl_intensity8_snorm, border color only
spec/ext_texture_snorm/texwrap formats bordercolor/gl_luminance8_alpha8_snorm, border color only
spec/ext_texture_snorm/texwrap formats bordercolor/gl_luminance8_snorm, border color only
spec/ext_texture_snorm/texwrap formats bordercolor/gl_r8_snorm, border color only
spec/ext_texture_snorm/texwrap formats bordercolor/gl_rg8_snorm, border color only
spec/ext_texture_snorm/texwrap formats bordercolor/gl_rgb8_snorm, border color only
spec/ext_texture_snorm/texwrap formats bordercolor/gl_rgba8_snorm, border color only
spec/ext_texture_srgb/texwrap formats bordercolor-swizzled/gl_sluminance8, swizzled, border color only
spec/ext_texture_srgb/texwrap formats bordercolor-swizzled/gl_sluminance8_alpha8, swizzled, border color only
spec/ext_texture_srgb/texwrap formats bordercolor-swizzled/gl_srgb8, swizzled, border color only
spec/ext_texture_srgb/texwrap formats bordercolor-swizzled/gl_srgb8_alpha8, swizzled, border color only
spec/ext_texture_srgb/texwrap formats bordercolor/gl_sluminance8, border color only
spec/ext_texture_srgb/texwrap formats bordercolor/gl_sluminance8_alpha8, border color only
spec/ext_texture_srgb/texwrap formats bordercolor/gl_srgb8, border color only
spec/ext_texture_srgb/texwrap formats bordercolor/gl_srgb8_alpha8, border color only
Reviewed-by: Eric Anholt <eric@anholt.net>
Samuel Pitoiset [Mon, 15 Jul 2019 08:44:53 +0000 (10:44 +0200)]
radv/gfx10: add missing conversions for 16-bit exports
This fixes
dEQP-VK.spirv_assembly.instruction.graphics.16bit_storage.input_output_*
Found with RADV_DEBUG=checkir
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Mon, 15 Jul 2019 06:53:11 +0000 (08:53 +0200)]
radv: remove unused code in radv_export_param()
It was hack for geometry shaders.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Dave Airlie [Mon, 15 Jul 2019 23:23:15 +0000 (16:23 -0700)]
radv/gfx10: don't set array pitch field on images
Setting this seems to be broken, amdvlk only sets it for quilted
textures which I'm not sure what those are.
Fixes dEQP-VK.glsl.texture_functions.query.texturesize*3d*
Fixes: bf11f1c3a47 ("radv/gfx10: add gfx10_make_texture_descriptor")
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Vinson Lee [Mon, 15 Jul 2019 05:58:33 +0000 (22:58 -0700)]
lima/ppir: Fix assert condition in ppir_codegen_encode_branch.
Fixes: af0de6b91c0b ("lima/ppir: implement discard and discard_if")
Reported-by: Coverity Scan
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Eric Anholt [Fri, 12 Jul 2019 20:36:51 +0000 (13:36 -0700)]
docs: Tell people how to easily generate the Fixes lines.
v2: Include '-s' to suppress the diff.
v3: use the git config command (Ken), use < (Eric)
Reviewed-by: Matt Turner <mattst88@gmail.com> (v1)
Acked-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Caio Marcelo de Oliveira Filho [Wed, 3 Jul 2019 20:14:33 +0000 (13:14 -0700)]
spirv: Ignore ArrayStride for storage classes that should not use it
The stride was already overriden when using
lower_workgroup_access_to_offsets, so elaborate a bit the commentary
there.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Caio Marcelo de Oliveira Filho [Wed, 3 Jul 2019 19:47:53 +0000 (12:47 -0700)]
spirv: Fix stride calculation when lowering Workgroup to offsets
Use alignment to calculate the stride associated with the pointer
types. That stride is used when the pointers are casted to arrays.
Note that size alone is not sufficient, e.g. struct { vec2 a; vec1 b;
} will have element an element size of 12 bytes, but the stride needs
to be 16 bytes to respect the 8 byte alignment.
Fixes: 050eb6389a8 "spirv: Ignore ArrayStride in OpPtrAccessChain for Workgroup"
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Alyssa Rosenzweig [Mon, 15 Jul 2019 18:05:04 +0000 (11:05 -0700)]
panfrost/ci: Blacklist flush finish tests
We don't implement batch splitting quite yet which is necessary for the
ludicrous number of draw calls these tests invoke. Blacklist them for
now.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 15 Jul 2019 19:05:48 +0000 (12:05 -0700)]
panfrost: Don't leak oversized transient allocations
When we allocate them, we allocate with two references accidentally,
causing them to leak uncontrollably.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 15 Jul 2019 16:17:12 +0000 (09:17 -0700)]
panfrost: Implement panfrost_bo_cache_evict_all
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>