mesa: rename gl_client_array -> gl_vertex_array

The term "client array" is a legacy thing dating back to the pre-VBO
era when _all_ vertex arrays lived in client memory.

Nowadays, it only contains vertex array state which is derived from
gl_array_attributes and gl_vertex_buffer_binding.  It's used by the
VBO module and some drivers.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

mesa: code clean-up in _mesa_update_vao_client_arrays()

Init vars where declared, use const qualifiers.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

mesa: update comment on vertex_attrib_binding()

Was missed in an earlier renaming patch.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

mesa: rename gl_vertex_array_object::VertexBinding to BufferBinding

To be a little more understandable.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

vulkan/wsi/x11: Smplify implementation of vkGetPhysicalDeviceSurfaceFormatsKHR

This patch simplifies x11_surface_get_formats(). It is actually just a
readability improvement over the patch I provided earlier this week
(750d8cad72).

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

vulkan/wsi/x11: Fix behavior of vkGetPhysicalDeviceSurfacePresentModesKHR

x11_surface_get_present_modes() is currently asserting that the number of
elements in pPresentModeCount must be greater than or equal to the number
of present modes available. This is buggy because pPresentModeCount
elements are later copied from the internal modes' array, so if
pPresentModeCount is greater, it will overflow it.

On top of that, this assertion violates the spec. From the Vulkan 1.0
(revision 32, with KHR extensions), page 581 of the PDF:

    "If the value of pPresentModeCount is less than the number of
     presentation modes supported, at most pPresentModeCount values will be
     written. If pPresentModeCount is smaller than the number of
     presentation modes supported for the given surface, VK_INCOMPLETE
     will be returned instead of VK_SUCCESS to indicate that not all the
     available values were returned."

So, the correct behavior is: if pPresentModeCount is greater than the
internal number of formats, it is clamped to that many present modes. But
if it is lesser than that, then pPresentModeCount elements are copied,
and the call returns VK_INCOMPLETE.

This fix is similar (but simpler and more readable) than the one I provided
in 750d8cad72a for vkGetPhysicalDeviceSurfaceFormatsKHR, which was suffering
from the same problem.

Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

i965: use memory context when creating passthrough tcs

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

intel/blorp: remove stale comment

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

drivers/meta: Accept GL_TEXTURE_3D as target for tex image decompression

An assert is currently raised, preventing decompression of a texture image into
a GL_TEXTURE_3D target. I have not found any spec wording that would explain
this, or implementation detail that would prevent it. And in any case, the
driver should not cause a crash upon user input arguments.

Fixes most failing subcases in CTS tests:
* GL44-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels_pixelstore
* GL45-CTS.gtf32.GL3Tests.packed_pixels.packed_pixels_pixelstore

These tests were crashing the driver before. Now they just fail, but due
to an unrelated issue affecting 2 out of the 45 test subcases.

No regressions observed against piglit or CTS-GL.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

intel/blorp: Rework our usage of ralloc when compiling shaders

Previously, we were creating the shader with a NULL ralloc context and then
trusting in blorp_compile_fs to clean it up.  The only problem was that
blorp_compile_fs didn't clean up its context properly so we were leaking.
When I went to fix that, I realized that it couldn't because it has to
return the shader binary which is allocated off of that context and used by
the caller.  The solution is to make blorp_compile_fs take a ralloc
context, allocate the nir_shaders directly off that context, and clean it
all up in whatever function creates the shader and calls blorp_compile_fs.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Cc: "12.0, 13.0" <mesa-stable@lists.freedesktop.org>

intel/blorp: Rename compile_nir_shader to compile_fs

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

radv: split the device local memory heap into two

Advertise two device local memory heaps; one that is host visible
and one that is not.

This makes it possible for clients to tell how much host visible
vs. non-host visible memory is available.

Signed-off-by: Dave Airlie <airlied@redhat.com>

radv: add a write-combining host-local memory type

Add the new memory type between the two device-local types. This makes
the list of supported memory types look like this:

1) DEVICE_LOCAL |              |               |
2)              | HOST_VISIBLE | HOST_COHERENT |
3) DEVICE_LOCAL | HOST_VISIBLE | HOST_COHERENT |
4)              | HOST_VISIBLE | HOST_COHERENT | HOST_CACHED

With this order a client that searches for a HOST_VISIBLE and
HOST_COHERENT memory type using the algorithm described in section
10.2 of the Vulkan specification (revision 32) will find the host-
local memory type first.

A client that requires the memory type to be HOST_VISIBLE and
HOST_COHERENT, but not DEVICE_LOCAL is most likely searching for
a memory type suitable for staging buffers / images.
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

i965/miptree: Remove the width/height < 32768 restrictions

These restrictions existed because intel_miptree_blit couldn't handle
surfaces bigger than 32k.  How that we're chopping blits up into chunks, it
can handle any size we throw at it so we can get rid of this restriction.
This improves the terrain tests in synmark by 25-30% on my Sky Lake gt3.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reported-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965/blit: Break blits into chunks in intel_miptree_blit

This allows us to blit much larger images than if we use the blitter
directly.  In particular, it gives us an almost infinite image height
compared to the fairly limiting 32k.  We do, however, still have a
restriction on stride of the image because handling larger strides, while
possible, is fairly difficult.

v2: Properly handle linear blit alignment restrictions

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965/blit: Break blits into chunks in set_alpha_to_one

v2: Properly handle linear blit alignment restrictions

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965/blit: Remove a bogus assertion

This assertion, while valid for linear buffers, doesn't work properly for
tiled memory.  It used to work most of the time because the offset provided
was always to the left-hand edge of the image.  However, if you use a byte
offset to get to the inside of the image, the height * stride calculation
may actually end up being too large.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965/miptree: Break miptree -> ISL tiling conversion into a helper

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

i965/miptree: Remove the stencil_as_y_tiled parameter from get_aligned_offset

The only actual user of this parameter was blorp and, since the conversion
to ISL, it no longer uses this function.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>

intel/blorp: Fix a couple asserts around image copy rectangles

With dealing with rectangles in compressed images, you can have a width or
height that isn't a multiple of the corresponding compression block
dimension but only if that edge of your rectangle is on the edge of the
image.  When we call convert_to_single_slice, it creates an 2-D image and a
set of tile offsets into that image.  When detecting the right-edge and
bottom-edge cases, we weren't including the tile offsets so the assert
would misfire.  This caused crashes in a few UE4 demos

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reported-by: "Eero Tamminen" <eero.t.tamminen@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98431
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Tested-by: "Eero Tamminen" <eero.t.tamminen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>

anv/allocator: Assert that we have a valid gem handle in bo_pool_alloc

nvc0/ir: fix emission of IMAD with NEG modifiers

The emitter tried to emit sub instead of subr when src0 has
actually a NEG modifier.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.0 12.0 13.0" <mesa-stable@lists.freedesktop.org>

glsl: inspect interfaces in contains_foo()

When checking if a type contains doubles, integers, samples, etc. we
check if the current type is a record or array, but not if it is an
interface.

This commit also inspects if the type is an interface.

It fixes spec/arb_enhanced_layouts/compiler/transform-feedback-layout-qualifiers/xfb_offset/invalid-block-with-double.vert
piglit test.

Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>

i965/vec4: make offset() work in terms of a simd width and scalar components

So that it has the same semantics as the scalar backend implementation. The
helper will now take a simd width (which is always 8 in vec4 mode) and step
as many scalar components as specified by that width, respecting the size of
the scalar channels.

v2 (Curro):
  - Remove the assertion in offset(), byte_offset() has the same checks.
  - Use byte_offset() directly instead of add_byte_offset().
  - Make things more clear by explicitly including the vertical stride
    in the byte offset expression.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>

i965/vec4: use byte_offset() instead of offset()

In a later patch we want to change the semantics of offset() to be in terms
of SIMD width and scalar channels so it is consistent with the definition
of the same helper in the scalar backend. However, some uses of offset()
in the vec4 backend do not operate naturally in terms of these
semantics. In these cases it is more natural to use the byte_offset() helper
instead.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>

i965/vec4: add a byte_offset helper

v2: wrap the helper in a namespace to make clear that it is an
    implementation detail of byte_offset() and is not intended
    to be used independently (Curro).

Reviewed-by: Francisco Jerez <currojerez@riseup.net>

glsl: Size TCS->TES unsized arrays to gl_MaxPatchVertices for queries.

SSO validation and other program interface queries want to see that
unsized (non-patch) TCS output/TES input arrays are implicitly sized
to gl_MaxPatchVertices.

By the time we create the program resource lists, we've sized the arrays
to their actual size.  (We try to create TCS output arrays to match the
output patch size right away, and at this point, we should have shrunk
TES input arrays.)  One option would be to keep them sized to
gl_MaxPatchVertices, and defer shrinking them.  But that's a big change,
and I don't think it's a good idea.

Instead, this patch introduces a new ir_variable flag which indicates
the variable is implicitly to gl_MaxPatchVertices.  Then, the linker
munges the types when creating the resource list, ignoring the size
in the IR's types.  Basically, lie about it for resource queries.
It's ugly, but I think it ought to work.

We probably could use var->data.implicit_sized_array for this, but
I opted for a separate bit to try and avoid convoluting the existing
SSBO handling.  They're similar in concept, but share none of the
same code...

Fixes:
ES31-CTS.core.tessellation_shader.single.xfb_captures_data_from_correct_stage
and the ES32-CTS and ESEXT-CTS variants.

v2: Add a comment (requested by Timothy, written by me).

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

glsl: Pass ctx to program interface query helper functions.

The next commit will use this in add_shader_variable - this just
separates out some of the mechanical changes for easier review.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>

egl: set preserved behavior for surface only if config supports it

Otherwise we can end up with mismatching behavior between config and
surface when client queries surface attributes. As example, configs
for DRI3 do not support preserved behavior but here we were setting
preserved behavior for pixmap and pbuffer.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98326
Cc: "12.0 13.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Tested-by: Mark Janes <mark.a.janes@intel.com>

mesa: expose GL_EXT_robustness

Fixes 8 failing dEQP tests:
   dEQP-EGL.functional.create_context_ext.robust_gles*

(now 42 tests pass in dEQP-EGL*robust*, 0 fail and rest are skipped)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98343
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

st/mesa: set RobustAccess true when is supported

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

i956: set RobustAccess true when is supported

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

mesa: add missing CONTEXT_ROBUST_ACCESS enum

commit 85008db1d51f923113832394d7f8d6b1868be882 missed this enum
for GL_KHR_robustness implementation

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

egl: fix error handling in _eglCreateSync

EGL specification requires context to be current only when sync
type matches EGL_SYNC_FENCE_KHR.

Fixes 25 failing dEQP tests:
   dEQP-EGL.functional.reusable_sync.*

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98339
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>

vulkan/wsi/x11: add support for IMMEDIATE present mode

We shouldn't be using ASYNC here, that would be used
for immediate mode, so let's implement that.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

vulkan/wsi: store present mode in swapchain base class

This just moves this up a level as x11 will need it to
implement things properly.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

vulkan/wsi/x11: handle timeouts properly in next image acquire (v1.1)

For 0 timeout, just poll for an event, and if none, return
For UINT64_MAX timeout, just wait for special event blocked
For other timeouts get the xcb fd and block on it, decreasing
the timeout if we get woken up for non-special events.

v1.1: return VK_TIMEOUT for poll timeouts.
handle timeout going negative.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>

radv/ac/llvm: trim texture return values

The intrinsic engine asserts in llvm due to this,
as we put a vec4 into a vec1, and the next instruction
isn't expecting it.

So trim the vector at the end before inserting it.

Reported-by: Christoph Haag <haagch+mesadev@frickel.club>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>

glsl: Add pthread libs to cache_test

Fixes the following compile error, present when the SHA1 library is libgcrypt:

  CCLD     glsl/tests/cache-test
glsl/.libs/libglsl.a(libmesautil_la-mesa-sha1.o): In function `call_once':
/mesa/src/util/../../include/c11/threads_posix.h:96: undefined reference to `pthread_once'

Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>

genxml: Handle failure of Python codegen scripts.

nvc0/ir: fix emission of SHLADD with NEG modifiers

This affects GF100:GK110 chipsets, but not GM107+ where the
logic is a bit different. The emitters tried to emit sub
instead of subr when src0 has a NEG modifier.

This fixes the following piglit tests glsl-fs-loop-nested
and glsl-vs-loop-nested.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>

compiler: avoid warning about redefinition of PYTHON_GEN

PYTHON_GEN is defined to the exact same thing in both
Makefile.glsl.am and Makefile.nir.am. This makes automake complain,
so let's lift the definition up to Makefile.am, the same way as
MKDIR_GEN.

Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Tested-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

egl/dri2: swap_buffers_with_damage falls back to swap_buffers

Since commit 0a606a400fe3 ("egl: add eglSwapBuffersWithDamageKHR"),
Android has been broken because the function eglSwapBuffersWithDamageKHR
is provided regardless of the extension being present. Also, the Android
meta-EGL always advertises the extension regardless of the underlying
EGL implementation. As there doesn't seem to be a simple way
conditionally make the EGL function ptr NULL, just implement a brain
dead version of eglSwapBuffersWithDamage{KHR,EXT}.

Cc: 13.0 <mesa-stable@lists.freedesktop.org>
CC: Rob Clark <robdclark@gmail.com>
Suggested-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Rob Herring <robh@kernel.org>
[Emil Velikov: copy the original commit message from Rob's patch]
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

compiler: automake: add shader_info.h to the sources list

Otherwise it'll be missing from the tarball.

Fixes: 094fe3a9591 ("nir: move nir_shader_info to a common compiler header")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>

configure.ac: simplify EGL requirements for drivers dependent on EGL

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>

st/mesa: allow multiple concurrent waiters in ClientWaitSync

so->fence can be unreferenced by one thread while another thread is
somewhere in ClientWaitSync and expecting so->fence to be non-NULL.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98172

Cc: 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

st/mesa: unduplicate st_check_sync code

It's the same as st_client_wait_sync. Discovered by Michel.
This is needed to make the following fix simpler.

Cc: 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: remove si_resource_create_custom

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: stop using PIPE_BIND_CUSTOM

it has no effect whatsoever

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

r600g: remove a redundant buffer_create helper

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: remove unused r600_cmask_info members

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: don't force the same tiling parameters for FMASK

GCN can use a completely different tile mode for FMASK.

FMASK allocation now skips one unrelated amdgpu_surface_init codepath as
hinted by the assertion.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

winsys/amdgpu: allocate FMASK properly

I expect no change in behavior, because r600_texture.c forces the same
tile mode as the base texture has.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: print tiling index when printing texture info

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: don't do (fmask.size && cmask.size)

fmask implies that cmask is present too.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: re-order radeon_surf::dcc and htile members

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: rename bo_size -> surf_size, bo_alignment -> surf_alignment

these names were misleading.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: remove flags specific to libdrm_radeon from winsys interface

These just say whether libdrm can assume that the latest radeon_surface
definition is used by Mesa.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: remove r600_htile_info

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: remove unnecessary fields from radeon_surf_level

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: decrease the size of radeon_surf

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: pass pipe_resource and other params to surface_init directly

This removes input-only parameters from the radeon_surf structure.

Some of the translation logic from pipe_resource to radeon_surf is moved to
winsys/radeon.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeon/vce: use nblk_y instead of npix_y

npix_y will be removed. level[0].npix_y will be removed too. nblk_y should
be the same as npix_y if the block height == 1. However, nblk_y is aligned
to the tile size, so it can be greater than npix_y.

If that's a problem, we'll have to save the input height of surface_init
and use that.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: define RADEON_SURF_MODE_* as enums

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: stop using some input fields from radeon_surface

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: fold r600_setup_surface into r600_init_surface

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

winsys/amdgpu: remove unused definitions

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: fold radeon_winsys::surface_best into radeon/winsys

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: use r600_gfx_write_event_eop everywhere

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: make r600_gfx_write_fence more generic

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: fix a ZPASS comment, EVENT_WRITE_EOP fixups

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

radeonsi: enable SDMA on Carrizo and all CIK chips again

SDMA might be fixed by:
  "winsys/amdgpu: fix radeon_surf::macro_tile_index for imported textures"

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

winsys/amdgpu: fix radeon_surf::macro_tile_index for imported textures

Maybe this is why SDMA has been broken for many amdgpu users?

SDMA is the only block which is used with imported textures and relies
on this variable. DB also uses it, but it doesn't get imported textures,
so it's unaffected.

I do get SDMA failures on Tonga before this patch if R600_DEBUG=testdma
is changed to use imported textures.

Cc: 11.2 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: make sure the address of separate CMASK is aligned properly

This should fix random GPU hangs on Hawaii and Fiji.

Cc: 11.2 12.0 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

gallium/radeon: fix incorrect bpe use in si_set_optimal_micro_tile_mode

Oh my god, I wonder what catastrophic issues this was causing on SI.

Cc: 13.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

glsl: update default precision qualifier when it is set in the shader

Default precision qualifier for a data type could be set several times
inside a shader. This patch allows to update the default precision
qualifier for the given type that is saved in the symbol table.

If it is not in the symbol table, just add it.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97804
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>

mesa/program: Add _mesa_symbol_table_replace_symbol()

This function allows to modify an existing symbol.

v2:
- Remove namespace usage now that it was deleted.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>

nir: stop adjusting driver location for varying packing

As of 59864e8e020 we just use the location assigned by the front-end and
no longer need this for i965.

Since there were some issues in the logic with assigning arrays the same
driver location if they didn't start at the same location just remove it
and let other drivers implement a solution if needed when they add
ARB_enhanced_layouts support.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

compiler: remove copy_shader_info()

This temporary helper is no longer needed now that we have finished
refactoring common shader metadata.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

glsl: set uses texture gather directly in shader_info

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

glsl/st/mesa: use common system values read field

And set system values read directly in shader_info.

st/mesa changes where:
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

glsl: set patch outputs written directly in shader_info

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

st/mesa: use common patch outputs written field

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

glsl: set patch inputs read directly in shader_info

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

st/mesa: use common patch inputs read field

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

glsl: set outputs read directly in shader_info

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

r200/glsl/st/mesa: use common outputs written field

And set outputs written directly in shader_info.

st/mesa changes where:
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

mesa/glsl: set double inputs read directly in shader_info

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

st/mesa: use common double inputs read field

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

r200/i915/st/mesa/compiler: use common inputs read field

And set set inputs_read directly in shader_info.

To avoid regressions between changes this change is a squashed
version of the following patches.

st/mesa changes where:
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

mesa/compiler: copy early fragment tests to shader_info in _mesa_copy_linked_program_data()

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

meta: remove remaining tabs in meta.c

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965: replace brw_compute_program with brw_program

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965: replace brw_fragment_program with brw_program

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965: replace brw_tess_{eval,ctrl}_program with brw_program

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965: replace brw_geomerty_program with brw_program

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965: replace brw_vertex_program with new generic brw_program

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

st/mesa/r200/i915/i965: eliminate gl_fragment_program

Here we move OriginUpperLeft and PixelCenterInteger into gl_program
all other fields have been replace by shader_info.

V2: Don't use anonymous union/structs to hold vertex/fragment fields
suggested by Ian.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

i965/mesa/st/swrast: set fs shader_info directly and switch to using it

Note we access shader_info from the program struct rather than the
nir_shader pointer because shader cache won't create a nir_shader.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

mesa: remove now unused IsCentroid from gl_fragment_program

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>