mesa.git
5 years agointel/fs: Support min_lod parameters on texture instructions
Jason Ekstrand [Thu, 11 Oct 2018 20:57:50 +0000 (15:57 -0500)]
intel/fs: Support min_lod parameters on texture instructions

We have to lower some shadow instructions because they don't exist in
hardware and we have to lower txb+offset+clamp because the message gets
too big and we run into the sampler message length limit of 11 regs.

Acked-by: Ian Romanick <ian.d.romanick@intel.com>
5 years agonir/lower_tex: Add lowering for some min_lod cases
Jason Ekstrand [Thu, 11 Oct 2018 19:14:29 +0000 (14:14 -0500)]
nir/lower_tex: Add lowering for some min_lod cases

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
5 years agonir/lower_tex: Modify txd instructions instead of replacing them
Jason Ekstrand [Thu, 11 Oct 2018 19:27:26 +0000 (14:27 -0500)]
nir/lower_tex: Modify txd instructions instead of replacing them

I don't know if one is better than the other or not but this approach
has the advantage that we never forget to copy information over and
we're not hard-coding quite as many assumptions.  It's also a lot
simpler and much less code.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
5 years agonir/lower_tex: Simplify lower_gradient logic
Jason Ekstrand [Thu, 11 Oct 2018 17:56:21 +0000 (12:56 -0500)]
nir/lower_tex: Simplify lower_gradient logic

Instead of having to call two different lower_gradient functions based
on whether or not it's a cube, just make lower_gradient handle cubes.
This significantly simplifies some of the logic.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
5 years agospirv: Add support for MinLod
Jason Ekstrand [Wed, 3 Oct 2018 02:15:47 +0000 (21:15 -0500)]
spirv: Add support for MinLod

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
5 years agointel/ir: Don't allow allocating zero registers
Jason Ekstrand [Thu, 11 Oct 2018 18:52:45 +0000 (13:52 -0500)]
intel/ir: Don't allow allocating zero registers

This simple check helps catch bugs early that can end up propagating
into later stages of the compile and triggering strange asserts.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
5 years agogallivm: remove unused float coord wrapping for aos sampling
Roland Scheidegger [Fri, 7 Dec 2018 01:28:01 +0000 (02:28 +0100)]
gallivm: remove unused float coord wrapping for aos sampling

AoS sampling tries to use integers for coord wrapping when possible,
as it should be faster. However, for AVX, this was suboptimal, because
only floats can use 8x32bit vectors, whereas integers have to be split
into 4x32bit vectors. (I believe part of why it was slower was also
that at least earlier llvm versions had trouble optimizing it properly,
since you can still do simple bit ops with 8x32bit vectors, so a
sequence of int add / and / int add / and with such vectors would
actually end up doing 128bit inserts/extracts between the operations
instead of just doing the cheap 128bit ands.)
Hence, a special float coord wrapping path was added to AoS sampling.
But this path was actually disabled for a long time already, since we
found that just splitting everything before entering the AoS path was
still sligthly faster usually, so none of this float coord wrapping
code was used anymore (AoS sampling code, when avx2 isn't supported,
never sees vectors with length > 4). I thought it might be useful some
day again, but I'm not interested anymore in optimizing for very weird
instruction sets which have support for 256bit vectors for floats but
not for ints, so just drop it.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
5 years agodocs: update calendar, add news item and link release notes for 18.3.1
Emil Velikov [Tue, 11 Dec 2018 21:25:18 +0000 (21:25 +0000)]
docs: update calendar, add news item and link release notes for 18.3.1

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
5 years agodocs: add sha256 checksums for 18.3.1
Emil Velikov [Tue, 11 Dec 2018 21:19:03 +0000 (21:19 +0000)]
docs: add sha256 checksums for 18.3.1

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
5 years agodocs: add release notes for 18.3.1
Emil Velikov [Tue, 11 Dec 2018 21:12:55 +0000 (21:12 +0000)]
docs: add release notes for 18.3.1

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
5 years agofreedreno: Add .dir-locals to the common directory
Neil Roberts [Sun, 2 Dec 2018 17:22:11 +0000 (18:22 +0100)]
freedreno: Add .dir-locals to the common directory

The commit aa0fed10d35 moved a bunch of Freedreno code to a common
directory. The previous directory had a .dir-locals file for Emacs.
This patch copies it to the new directory as well.

Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
5 years agomesa/st/nir: fix missing nir_compact_varyings
Rob Clark [Sat, 8 Dec 2018 18:21:52 +0000 (13:21 -0500)]
mesa/st/nir: fix missing nir_compact_varyings

LinkedTransformFeedback is normally populated, which had nerf'd varying
packing since the check was introduced.

Fixes: dbd52585fa9 st/nir: Disable varying packing when doing transform feedback.
Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agonir: fix spelling typo
Rob Clark [Sat, 8 Dec 2018 18:19:51 +0000 (13:19 -0500)]
nir: fix spelling typo

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
5 years agoanv,radv: Disable VK_EXT_pci_bus_info
Jason Ekstrand [Mon, 10 Dec 2018 16:57:35 +0000 (10:57 -0600)]
anv,radv: Disable VK_EXT_pci_bus_info

The Vulkan working group recently discovered that we made a mistake in
assuming that PCI domains are 16-bit even though they can potentially be
32-bit values.  To fix this, the next spec update will change the types
in the VK_EXT_pci_bus_info struct to be 32 bits which will be a
backwards-incompatible change.  Normally, Khronos tries very hard to
never make backwards incompatible changes to specs.  Hopefully, the
extension is new enough (2 months) that there are no shipping apps which
use the extension so this should be safe.

This commit disables the extension for both anv and radv in mesa and
should be back-ported to 18.3 ASAP so we avoid any potential issues with
new apps running on old drivers.  I'll send out a commit (which we can
also back-port to 18.3 if we really care) to re-enable the extension in
both drivers once this week's spec update ships.  The one known use of
this extension is internal to mesa and will continue working with the
extension disabled and will naturally update when we get a new header.

Cc: "18.3" <mesa-stable@lists.freedesktop.org>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agodocs: extends 18.2 lifecycle
Juan A. Suarez Romero [Mon, 10 Dec 2018 12:22:59 +0000 (13:22 +0100)]
docs: extends 18.2 lifecycle

As 18.3 was published with some delay, let's extend 18.2 life for
another extra release.

CC: Andres Gomez <agomez@igalia.com>
CC: Dylan Baker <dylan@pnwbakers.com>
CC: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Dylan Baker <dylan@pnwbakers.com>
5 years agoglapi: fixup EXT_multisampled_render_to_texture dispatch
Kristian H. Kristensen [Mon, 10 Dec 2018 18:14:34 +0000 (18:14 +0000)]
glapi: fixup EXT_multisampled_render_to_texture dispatch

There's a few missing and convoluted bits:

 - FramebufferTexture2DMultisampleEXT
Missing sanity check, should be desktop="false"

 - RenderbufferStorageMultisampleEXT
Missing sanity check, is aliased to RenderbufferStorageMultisample.
Thus it's set only when desktop GL or GLES2 v3.0+, while the extension
is GLES2 2.0+.

If we flip the aliasing we'll break indirect GLX, so loosen the version
to 2.0. Not perfect, yet this is the most sane thing I could think of.

v2: [Emil] Fixup RenderbufferStorageMultisampleEXT, commmit message

Cc: Kristian H. Kristensen <hoegsberg@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108974
Fixes: 1b331ae505e ("mesa: Add core support for EXT_multisampled_render_to_texture{,2}")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
5 years agofreedreno: Fix the Makefile.am fix
Kristian H. Kristensen [Mon, 10 Dec 2018 22:22:47 +0000 (14:22 -0800)]
freedreno: Fix the Makefile.am fix

Commit b028ce29f090938d12b0999fe4b0e712d2adc431 fixed a typo in
src/freedreno/Makefile.am, but ended up breaking the build for
freedreno.  The typo inadvertently made things work, as we were not
supposed to link with libnir or libmesautil to begin with.  Those come
in through libmesagallium and the typo prevented the duplicated
linkage.

Fixes: b028ce29f ("freedreno: add the missing _la in libfreedreno_ir3_la")
Cc: Emil Velikov <emil.velikov@collabora.com>
5 years agoi965/fs: Handle V/UV immediates in dump_instructions()
Matt Turner [Mon, 5 Nov 2018 17:52:09 +0000 (09:52 -0800)]
i965/fs: Handle V/UV immediates in dump_instructions()

5 years agointel/compiler: Always print flag subregister number
Sagar Ghuge [Sun, 9 Dec 2018 07:07:43 +0000 (23:07 -0800)]
intel/compiler: Always print flag subregister number

While disassembling the predicate always print flag subregister number
to keep grammar same across the generation for assembler tool.

v2: Combine consecutive format calls (Matt Turner)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
5 years agointel/compiler: Set swizzle to BRW_SWIZZLE_XXXX for scalar region
Sagar Ghuge [Sun, 9 Dec 2018 05:50:36 +0000 (21:50 -0800)]
intel/compiler: Set swizzle to BRW_SWIZZLE_XXXX for scalar region

When RepCtrl is set, the swizzle field is ignored by the hardware. In
order to ensure a 1-to-1 correspondence between the human-readable
disassembly and the binary instruction encoding always set the swizzle
to XXXX (all zeros) when it is unused due to RepCtrl

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
5 years agomeson: Add nir_algebraic_parser_test to suites
Dylan Baker [Fri, 7 Dec 2018 17:15:27 +0000 (09:15 -0800)]
meson: Add nir_algebraic_parser_test to suites

Just to make it easier to run a nir tests together.

Fixes: a0ae12ca91a45f81897e774019cde9bd081f03a0
       ("nir/algebraic: Add unit tests for bitsize validation")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
5 years agoamd/addrlib: drop si_ci_vi_merged_enum.h from the list
Emil Velikov [Mon, 10 Dec 2018 14:47:38 +0000 (14:47 +0000)]
amd/addrlib: drop si_ci_vi_merged_enum.h from the list

Fixes: 776b9113656 ("amd/addrlib: update Mesa's copy of addrlib")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
5 years agofreedreno: add the missing _la in libfreedreno_ir3_la
Emil Velikov [Mon, 10 Dec 2018 11:48:24 +0000 (11:48 +0000)]
freedreno: add the missing _la in libfreedreno_ir3_la

Fixes: aa0fed10d35 ("freedreno: move ir3 to common location")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
5 years agofreedreno: drop duplicate MKDIR_GEN declaration
Emil Velikov [Mon, 10 Dec 2018 11:45:42 +0000 (11:45 +0000)]
freedreno: drop duplicate MKDIR_GEN declaration

Fixes: aa0fed10d35 ("freedreno: move ir3 to common location")
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
5 years agotravis: radeonsi and radv require LLVM 7.0
Rhys Kidd [Mon, 10 Dec 2018 05:21:23 +0000 (00:21 -0500)]
travis: radeonsi and radv require LLVM 7.0

Fixes: 3fbdcd942fe ("amd: remove support for LLVM 6.0")
Cc: Marek Olšák <marek.olsak@amd.com>
Cc: Jan Vesely <jan.vesely@rutgers.edu>
Cc: Andres Gomez <agomez@igalia.com>
Cc: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agoloader: free error state, when checking the drawable type
Kirill Burtsev [Wed, 5 Dec 2018 15:54:27 +0000 (15:54 +0000)]
loader: free error state, when checking the drawable type

Currently we distinguish if the drawable is a window or pixmap by
checking xcb_present_select_input throws an error or not.

Yet, we don't always free the error state returned by xcb.

Cc: Kirill Burtsev <kirill.burtsev@qt.io>
Cc: Boyan Ding <boyan.j.ding@gmail.com>
Fixes: 6bd9ba7d074 ("loader: Add dri3 helper")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
[Emil: add commit message, fixes tag]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
5 years agonir: make use of new nir_cf_list_clone_and_reinsert() helper
Timothy Arceri [Fri, 16 Nov 2018 03:58:03 +0000 (14:58 +1100)]
nir: make use of new nir_cf_list_clone_and_reinsert() helper

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: add a new nir_cf_list_clone_and_reinsert() helper
Timothy Arceri [Fri, 16 Nov 2018 03:57:11 +0000 (14:57 +1100)]
nir: add a new nir_cf_list_clone_and_reinsert() helper

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: clarify some nit_loop_info member names
Timothy Arceri [Tue, 20 Nov 2018 00:35:37 +0000 (11:35 +1100)]
nir: clarify some nit_loop_info member names

Following commits will introduce additional fields such as
guessed_trip_count. Renaming these will help avoid confusion
as our unrolling feature set grows.

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agonir: small tidy ups for nir_loop_analyze()
Timothy Arceri [Thu, 15 Nov 2018 09:40:08 +0000 (20:40 +1100)]
nir: small tidy ups for nir_loop_analyze()

Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agoi965: Flip arguments to load_register_reg helpers.
Kenneth Graunke [Fri, 7 Dec 2018 21:01:07 +0000 (13:01 -0800)]
i965: Flip arguments to load_register_reg helpers.

load_register_imm and load_register_mem take the destination as the
first argument, so I'd like load_register_reg to do the same the sake
of consistency.  Otherwise, reading sequences of mixed LRI/LRM/LRR is
needlessly confusing.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agoi965: Delete dead brw_meta_resolve_color prototype.
Kenneth Graunke [Sat, 8 Dec 2018 02:41:19 +0000 (18:41 -0800)]
i965: Delete dead brw_meta_resolve_color prototype.

Dead since commit 09e041d61d367ff3a9e8492521606090050255d4 (May 2016).

5 years agonv50/ir: fix use-after-free in ConstantFolding::visit
Karol Herbst [Fri, 7 Dec 2018 08:44:55 +0000 (09:44 +0100)]
nv50/ir: fix use-after-free in ConstantFolding::visit

opnd() might delete the passed in instruction, but it's used through
i->srcExists() later in visit

v2: use continue instead return
v3: use brackets for the outer if/else chain

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
5 years agonouveau: use atomic operations for driver statistics
Karol Herbst [Fri, 7 Dec 2018 19:10:50 +0000 (20:10 +0100)]
nouveau: use atomic operations for driver statistics

multiple threads can write to those at the same time

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
5 years agonv50/ir: initialize relDegree staticly
Karol Herbst [Fri, 7 Dec 2018 08:47:05 +0000 (09:47 +0100)]
nv50/ir: initialize relDegree staticly

this race condition is pretty harmless, but also pretty trivial to fix

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
5 years agoshader-packing
Eric Anholt [Sat, 8 Dec 2018 00:51:12 +0000 (16:51 -0800)]
shader-packing

5 years agotfu
Eric Anholt [Sat, 8 Dec 2018 00:49:41 +0000 (16:49 -0800)]
tfu

5 years agov3d: Fix a leak of the disassembled instruction string during debug dumps.
Eric Anholt [Fri, 7 Dec 2018 18:34:40 +0000 (10:34 -0800)]
v3d: Fix a leak of the disassembled instruction string during debug dumps.

Fixes: ade416d02369 ("broadcom: Add VC5 NIR compiler.")
5 years agovc4: Fix a leak of the transfer helper on screen destroy.
Eric Anholt [Fri, 7 Dec 2018 18:31:27 +0000 (10:31 -0800)]
vc4: Fix a leak of the transfer helper on screen destroy.

Fixes: d009463a6549 ("vc4: Switch to using u_transfer_helper for MSAA maps.")
5 years agov3d: Fix a leak of the transfer helper on screen destroy.
Eric Anholt [Fri, 7 Dec 2018 18:30:09 +0000 (10:30 -0800)]
v3d: Fix a leak of the transfer helper on screen destroy.

Fixes: 7a30517cce8f ("broadcom/vc5: Start adding support for rendering to Z32F_S8X24_UINT.")
5 years agov3d: Add VIR dumping of TMU config p0/p1.
Eric Anholt [Tue, 4 Dec 2018 23:03:15 +0000 (15:03 -0800)]
v3d: Add VIR dumping of TMU config p0/p1.

I had a bit of it for V3D 3.x, but didn't update it for 4.x.

5 years agov3d: Simplify VIR uniform dumping using a temporary.
Eric Anholt [Tue, 4 Dec 2018 23:01:58 +0000 (15:01 -0800)]
v3d: Simplify VIR uniform dumping using a temporary.

5 years agov3d: Garbage collect unused uniforms code.
Eric Anholt [Mon, 3 Dec 2018 16:52:36 +0000 (08:52 -0800)]
v3d: Garbage collect unused uniforms code.

5 years agov3d: Split most of TEXTURE_SHADER_STATE setup out of sampler views.
Eric Anholt [Tue, 4 Dec 2018 22:25:22 +0000 (14:25 -0800)]
v3d: Split most of TEXTURE_SHADER_STATE setup out of sampler views.

For shader image load/store, we want most of this logic to be shared.

5 years agov3d: Avoid confusing auto-indenting in TEXTURE_SHADER_STATE packing
Eric Anholt [Tue, 4 Dec 2018 22:32:27 +0000 (14:32 -0800)]
v3d: Avoid confusing auto-indenting in TEXTURE_SHADER_STATE packing

Having "v3dx_pack() {" under each #if branch would confuse emacs's
indenter.

5 years agov3d: Fix handling of texture first_layer offsets for 3D textures.
Eric Anholt [Tue, 4 Dec 2018 22:18:45 +0000 (14:18 -0800)]
v3d: Fix handling of texture first_layer offsets for 3D textures.

I think this bug predated adding v3d_layer_offset().  Noticed during an
unrelated refactor.

5 years agov3d: Return the right gl_SampleMaskIn[] value.
Eric Anholt [Mon, 3 Dec 2018 16:51:29 +0000 (08:51 -0800)]
v3d: Return the right gl_SampleMaskIn[] value.

It's supposed to be the dispatched sample mask for this pixel, not the GL
state's sample mask.

5 years agov3d: Fix a comment typo
Eric Anholt [Mon, 3 Dec 2018 16:43:46 +0000 (08:43 -0800)]
v3d: Fix a comment typo

5 years agov3d: Convert to using nir_src_as_uint() from const_value derefs.
Eric Anholt [Mon, 3 Dec 2018 16:35:50 +0000 (08:35 -0800)]
v3d: Convert to using nir_src_as_uint() from const_value derefs.

Follows 16870de8a0aa ("nir: Use nir_src_is_const and nir_src_as_* in core
code") to clean up v3d.

5 years agov3d: Don't forget to flush writes to UBOs.
Eric Anholt [Thu, 6 Dec 2018 01:10:15 +0000 (17:10 -0800)]
v3d: Don't forget to flush writes to UBOs.

If someone did TF into a UBO, we might have left the TF job un-flushed at
the point of reading.

5 years agov3d: Make an array for frag/vert texture state in the context.
Eric Anholt [Tue, 4 Dec 2018 21:48:10 +0000 (13:48 -0800)]
v3d: Make an array for frag/vert texture state in the context.

This simplifies a bunch of our texture handling, while introducing the
slots necessary for adding new shader stages.

5 years agov3d: Re-use the wrap mode uniform on V3D 3.3.
Eric Anholt [Tue, 4 Dec 2018 21:36:48 +0000 (13:36 -0800)]
v3d: Re-use the wrap mode uniform on V3D 3.3.

5 years agov3d: Put default vertex attribute values into the state uploader as well.
Eric Anholt [Fri, 7 Dec 2018 20:36:55 +0000 (12:36 -0800)]
v3d: Put default vertex attribute values into the state uploader as well.

The default attributes are long-lived (the state struct is cached), and
only 256 bytes each.

5 years agov3d: Create a state uploader for packing our shaders together.
Eric Anholt [Fri, 7 Dec 2018 20:18:34 +0000 (12:18 -0800)]
v3d: Create a state uploader for packing our shaders together.

Shaders are usually quite short, and are private to the context.  We can
save memory and reduce the work the kernel needs to do at exec time by
packing them together in a stream uploader for long-lived state.

5 years agov3d: Update simulator cache flushing code to match the kernel better.
Eric Anholt [Fri, 7 Dec 2018 19:34:30 +0000 (11:34 -0800)]
v3d: Update simulator cache flushing code to match the kernel better.

We were missing the invalidate between bin and render (possibly relevant
for SSBOs), and still trying to flush the nonexistent L2C on 3.3+.

5 years agov3d: Use the TFU to do generatemipmap.
Eric Anholt [Fri, 2 Nov 2018 18:31:42 +0000 (11:31 -0700)]
v3d: Use the TFU to do generatemipmap.

This is a separate, dedicated hardware unit for texture layout conversions
and mipmap generation.

5 years agov3d: Add the V3D TFU submit interface to the simulator.
Eric Anholt [Thu, 1 Nov 2018 23:10:01 +0000 (16:10 -0700)]
v3d: Add the V3D TFU submit interface to the simulator.

The TFU lets us format raster and SAND images into formats that can be
read by the texture engine, and do mipmap generation.

The UAPI comes from drm-next e69aa5f9b97f ("Merge tag
'drm-misc-next-2018-12-06' of git://anongit.freedesktop.org/drm/drm-misc
into drm-next")

5 years agov3d: Use combined input/output segments.
Eric Anholt [Mon, 10 Sep 2018 15:19:48 +0000 (08:19 -0700)]
v3d: Use combined input/output segments.

The HW apparently has some issues (or at least a much more complicated VCM
calculation) with non-combined segments, and the closed source driver also
uses combined I/O.  Until I get the last CTS failure resolved (which does
look plausibly like some VPM stomping), let's use combined I/O too.

5 years agov3d: Add missing OES_half_float_linear support.
Eric Anholt [Fri, 7 Dec 2018 21:03:29 +0000 (13:03 -0800)]
v3d: Add missing OES_half_float_linear support.

We were exposing ARB_texture_float, but apparently not the OES subset
flag.  Fixes regression from GLES3 support to GLES2.

Fixes: fcf9fcee3c8a ("mesa/main: do not require float-texture filtering
for es3")

5 years agov3d: Add support for RGBA_SRGB along with BGRA_SRGB.
Eric Anholt [Fri, 7 Dec 2018 20:53:16 +0000 (12:53 -0800)]
v3d: Add support for RGBA_SRGB along with BGRA_SRGB.

This is the actual native format for the hardware, without swizzling.
Noticed while debugging why GLES3 disappeared.

5 years agointel/blorp: Expand blorp_address::offset to be 64 bits.
Kenneth Graunke [Sat, 21 Apr 2018 07:06:29 +0000 (00:06 -0700)]
intel/blorp: Expand blorp_address::offset to be 64 bits.

In the softpin world, surface state base address may be a fixed 64-bit
address (with no associated BO).  It makes sense to store this in the
offset field.  But it needs to be the full size.

We also update the clear color address to be consistently uint64_t
everywhere so we can continue passing intel_miptree_get_clear_color
a pointer to the blorp_address's offset field without type mismatches.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
5 years agofreedreno/drm: fix memory leak
Rob Clark [Fri, 7 Dec 2018 19:11:01 +0000 (14:11 -0500)]
freedreno/drm: fix memory leak

Fix an emberrasing memory leak with the non-softpin submit/rb
implementation.

Fixes: f3cc0d27475 freedreno: import libdrm_freedreno + redesign submit
Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: track max flow control depth for a5xx/a6xx
Rob Clark [Wed, 5 Dec 2018 15:51:16 +0000 (10:51 -0500)]
freedreno/ir3: track max flow control depth for a5xx/a6xx

Rather than just hard-coding BRANCHSTACK size.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: code-motion
Rob Clark [Thu, 8 Nov 2018 19:50:56 +0000 (14:50 -0500)]
freedreno/ir3: code-motion

Split up ir3_compiler_nir.c a bit before starting to add new stuff for
a6xx SSBO/image instructions.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: sync instr/disasm
Rob Clark [Wed, 7 Nov 2018 18:22:12 +0000 (13:22 -0500)]
freedreno/ir3: sync instr/disasm

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/ir3: don't fetch unused tex components
Rob Clark [Tue, 4 Dec 2018 14:52:14 +0000 (09:52 -0500)]
freedreno/ir3: don't fetch unused tex components

Detect when a component of an (for example) texture fetch is unused and
propagate the updated wrmask back to the parent instruction.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/a6xx: blitter fixes
Rob Clark [Mon, 3 Dec 2018 15:27:32 +0000 (10:27 -0500)]
freedreno/a6xx: blitter fixes

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno: update generated headers
Rob Clark [Wed, 5 Dec 2018 15:17:20 +0000 (10:17 -0500)]
freedreno: update generated headers

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/drm: fix relocs in nested stateobjs
Rob Clark [Wed, 28 Nov 2018 15:35:32 +0000 (10:35 -0500)]
freedreno/drm: fix relocs in nested stateobjs

If we have an reloc from stateobjA to stateobjB, we would previously
leave stateobjB's bos out of the submit's bos table.  Handle this case
by copying into stateobjA's reloc_bos table.

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno/a5xx+a6xx: remove unused fs/vs pvt mem
Rob Clark [Fri, 30 Nov 2018 13:26:56 +0000 (08:26 -0500)]
freedreno/a5xx+a6xx: remove unused fs/vs pvt mem

copy/pasta from older gens

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agogallium: fix typo
Rob Clark [Tue, 27 Nov 2018 20:19:16 +0000 (15:19 -0500)]
gallium: fix typo

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agofreedreno: remove unused fd_surface fields
Rob Clark [Thu, 1 Nov 2018 19:07:46 +0000 (15:07 -0400)]
freedreno: remove unused fd_surface fields

Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agomeson: link LLVM 'native' component when LLVM is available
Nicolai Hähnle [Wed, 5 Dec 2018 12:28:03 +0000 (13:28 +0100)]
meson: link LLVM 'native' component when LLVM is available

Linking against LLVM built with BUILD_SHARED_LIBS fails otherwise,
as the component is required for the draw module.

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agonir: Fixup algebraic test for variable-sized conversions
Connor Abbott [Fri, 7 Dec 2018 09:48:22 +0000 (10:48 +0100)]
nir: Fixup algebraic test for variable-sized conversions

b2i can now take any size boolean in preparation for 1-bit booleans, so
the error message printed is slightly different.

Fixes: dca6cd9ce65 ("nir: Make boolean conversions sized just like the others")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108961
Cc: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agogallium: add missing PIPE_CAP_SURFACE_SAMPLE_COUNT default value
Samuel Pitoiset [Fri, 7 Dec 2018 09:08:38 +0000 (10:08 +0100)]
gallium: add missing PIPE_CAP_SURFACE_SAMPLE_COUNT default value

Fixes: 2710c40e3c8 ("gallium: Add new PIPE_CAP_SURFACE_SAMPLE_COUNT")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Michel Dänzer <michel.daenzer@amd.com>
5 years agodocs: update calendar, add news item and link release notes for 18.3.0
Emil Velikov [Fri, 7 Dec 2018 11:50:12 +0000 (11:50 +0000)]
docs: update calendar, add news item and link release notes for 18.3.0

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
5 years agodocs: add sha256 checksums for 18.3.0
Emil Velikov [Fri, 7 Dec 2018 11:27:49 +0000 (11:27 +0000)]
docs: add sha256 checksums for 18.3.0

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit d81beab96afb403915805435fd4b810a00291b99)

5 years agodocs: update 18.3.0 release notes
Emil Velikov [Fri, 7 Dec 2018 11:20:00 +0000 (11:20 +0000)]
docs: update 18.3.0 release notes

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
(cherry picked from commit d603cd9d84c8293c22407030c7664ac775ffb97f)

5 years agofreedreno: Add support for EXT_multisampled_render_to_texture
Kristian H. Kristensen [Tue, 6 Nov 2018 05:23:27 +0000 (21:23 -0800)]
freedreno: Add support for EXT_multisampled_render_to_texture

There is not much to do in freedreno - tile layout and multisample
state for gmem renderings is programmed based on the pfb sample count,
while resolve blits take the destination sample count from the resource.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
5 years agofreedreno/a6xx: MSAA
Rob Clark [Mon, 29 Oct 2018 19:44:13 +0000 (15:44 -0400)]
freedreno/a6xx: MSAA

Reviewed-by: Kristian H. Kristensen <hoegsberg@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
5 years agost/mesa: Add support for EXT_multisampled_render_to_texture
Kristian H. Kristensen [Tue, 6 Nov 2018 05:22:44 +0000 (21:22 -0800)]
st/mesa: Add support for EXT_multisampled_render_to_texture

In gallium, we model the attachment sample count as a new nr_samples
field in pipe_surface. A driver can indicate support for the extension
using the new pipe cap, PIPE_CAP_MULTISAMPLED_RENDER_TO_TEXTURE.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
5 years agogallium: Add new PIPE_CAP_SURFACE_SAMPLE_COUNT
Kristian H. Kristensen [Tue, 6 Nov 2018 21:08:32 +0000 (13:08 -0800)]
gallium: Add new PIPE_CAP_SURFACE_SAMPLE_COUNT

This new pipe cap and the new nr_samples field in pipe_surface lets a
state tracker bind a render target with a different sample count than
the resource. This allows for implementing
EXT_multisampled_render_to_texture and
EXT_multisampled_render_to_texture2.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
5 years agomesa: Add core support for EXT_multisampled_render_to_texture{,2}
Kristian H. Kristensen [Tue, 6 Nov 2018 05:19:21 +0000 (21:19 -0800)]
mesa: Add core support for EXT_multisampled_render_to_texture{,2}

This also turns on EXT_multisampled_render_to_texture which is a
subset of EXT_multisampled_render_to_texture2, allowing only
COLOR_ATTACHMENT0.

Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Kristian H. Kristensen <hoegsberg@chromium.org>
5 years agonir/algebraic: Make algebraic_parser_test.sh executable.
Vinson Lee [Thu, 6 Dec 2018 19:42:04 +0000 (11:42 -0800)]
nir/algebraic: Make algebraic_parser_test.sh executable.

Fixes make check permission error.

../../bin/test-driver: line 107: ./nir/tests/algebraic_parser_test.sh: Permission denied
FAIL nir/tests/algebraic_parser_test.sh (exit status: 126)

Fixes: a0ae12ca91a4 ("nir/algebraic: Add unit tests for bitsize validation")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
5 years agoamd: remove support for LLVM 6.0
Samuel Pitoiset [Fri, 2 Nov 2018 08:50:32 +0000 (09:50 +0100)]
amd: remove support for LLVM 6.0

User are encouraged to switch to LLVM 7.0 released in September 2018.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agogallium: Android build fixes
Kristian H. Kristensen [Tue, 4 Dec 2018 18:19:13 +0000 (10:19 -0800)]
gallium: Android build fixes

A couple of simple fixes for building on Android with autotools.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
5 years agonir: Make boolean conversions sized just like the others
Jason Ekstrand [Wed, 7 Nov 2018 19:43:40 +0000 (13:43 -0600)]
nir: Make boolean conversions sized just like the others

Instead of a single i2b and b2i, we now have i2b32 and b2iN where N is
one if 8, 16, 32, or 64.  This leads to having a few more opcodes but
now everything is consistent and booleans aren't a weird special case
anymore.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir/opt_algebraic: Add 32-bit specifiers to a bunch of booleans
Jason Ekstrand [Fri, 9 Nov 2018 00:08:37 +0000 (18:08 -0600)]
nir/opt_algebraic: Add 32-bit specifiers to a bunch of booleans

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir/opt_algebraic: Drop bit-size suffixes from conversions
Jason Ekstrand [Wed, 7 Nov 2018 23:32:32 +0000 (17:32 -0600)]
nir/opt_algebraic: Drop bit-size suffixes from conversions

Suffixes are dropped from a bunch of conversion opcodes when it makes
sense to do so.  Others are kept if we really do want the bit-size
restriction.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir/opt_algebraic: Simplify an optimization using the new search ops
Jason Ekstrand [Wed, 7 Nov 2018 22:25:31 +0000 (16:25 -0600)]
nir/opt_algebraic: Simplify an optimization using the new search ops

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir/algebraic: Add support for unsized conversion opcodes
Jason Ekstrand [Wed, 7 Nov 2018 21:40:02 +0000 (15:40 -0600)]
nir/algebraic: Add support for unsized conversion opcodes

All conversion opcodes require a destination size but this makes
constructing certain algebraic expressions rather cumbersome.  This
commit adds support to nir_search and nir_algebraic for writing
conversion opcodes without a size.  These meta-opcodes match any
conversion of that type regardless of destination size and the size gets
inferred from the sizes of the things being matched or from other
opcodes in the expression.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir/algebraic: Refactor codegen a bit
Jason Ekstrand [Wed, 7 Nov 2018 20:32:19 +0000 (14:32 -0600)]
nir/algebraic: Refactor codegen a bit

Instead of using an OrderedDict, just have a (necessarily sorted) array
of transforms and a set of opcodes.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir/algebraic: Clean up some __str__ cruft
Jason Ekstrand [Thu, 8 Nov 2018 20:00:07 +0000 (14:00 -0600)]
nir/algebraic: Clean up some __str__ cruft

Both of these things are already handled in the Value base class so we
don't need to handle them explicitly in Constant.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir/opcodes: Rename tbool to tbool32
Jason Ekstrand [Wed, 7 Nov 2018 18:19:36 +0000 (12:19 -0600)]
nir/opcodes: Rename tbool to tbool32

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir/opcodes: Pull in the type helpers from constant_expressions
Jason Ekstrand [Wed, 7 Nov 2018 18:15:22 +0000 (12:15 -0600)]
nir/opcodes: Pull in the type helpers from constant_expressions

While we're at it, we rework them a bit to all use regular expressions
and assert more.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
5 years agonir/algebraic: Add unit tests for bitsize validation
Connor Abbott [Thu, 29 Nov 2018 16:46:59 +0000 (17:46 +0100)]
nir/algebraic: Add unit tests for bitsize validation

The non-failure path can be tested by just compiling mesa and then
testing it, but the failure paths won't be hit unless you make a mistake,
so it's best to test them with some unit tests.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agonir/algebraic: Rewrite bit-size inference
Connor Abbott [Fri, 23 Nov 2018 16:34:19 +0000 (17:34 +0100)]
nir/algebraic: Rewrite bit-size inference

Before this commit, there were two copies of the algorithm: one in C,
that we would use to figure out what bit-size to give the replacement
expression, and one in Python, that emulated the C one and tried to
prove that the C algorithm would never fail to correctly assign
bit-sizes. That seemed pretty fragile, and likely to fall over if we
make any changes. Furthermore, the C code was really just recomputing
more-or-less the same thing as the Python code every time. Instead, we
can just store the results of the Python algorithm in the C
datastructure, and consult it to compute the bitsize of each value,
moving the "brains" entirely into Python. Since the Python algorithm no
longer has to match C, it's also a lot easier to change it to something
more closely approximating an actual type-inference algorithm. The
algorithm used is based on Hindley-Milner, although deliberately
weakened a little. It's a few more lines than the old one, judging by
the diffstat, but I think it's easier to verify that it's correct while
being as general as possible.

We could split this up into two changes, first making the C code use the
results of the Python code and then rewriting the Python algorithm, but
since the old algorithm never tracked which variable each equivalence
class, it would mean we'd have to add some non-trivial code which would
then get thrown away. I think it's better to see the final state all at
once, although I could also try splitting it up.

v2:
- Replace instances of "== None" and "!= None" with "is None" and
"is not None".
- Rename first_src to first_unsized_src
- Only merge the destination with the first unsized source, since the
sources have already been merged.
- Add a comment explaining what nir_search_value::bit_size now means.
v3:
- Fix one last instance to use "is not" instead of !=
- Don't try to be so clever when choosing which error message to print
based on whether we're in the search or replace expression.
- Fix trailing whitespace.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agoradv: expose VK_EXT_scalar_block_layout
Samuel Pitoiset [Wed, 5 Dec 2018 12:48:36 +0000 (13:48 +0100)]
radv: expose VK_EXT_scalar_block_layout

Nothing to do, the compiler already handles that.

All new dEQP.VK.ubo.* and dEQP.VK.ssbo.* pass, except some
16-bit tests that are quite related to fdo bug #108114.

Only enable the extension on CIK+ because it might not work on SI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agospirv: add SpvCapabilityInt64Atomics
Samuel Pitoiset [Wed, 5 Dec 2018 13:28:28 +0000 (14:28 +0100)]
spirv: add SpvCapabilityInt64Atomics

Required for VK_KHR_shader_atomic_int64.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agodrisw: Use separate drisw_loader_funcs for shm
Michal Srb [Fri, 23 Nov 2018 16:03:53 +0000 (17:03 +0100)]
drisw: Use separate drisw_loader_funcs for shm

The original code was modifying the global drisw_lf variable, which is bad
when there are multiple contexts in single process, each initialized with
different loader. One may support put_image_shm and the other not.

Since there are currently only two possible combinations, lets create two
global tables, one for each. Lets make them const, since we won't change them
and they can be shared.

This fixes crash in VLC. It used two GL contexts (each in different thread), one
was initialized by its Qt GUI, the other by its video output plugin. The first
one set the put_image_shm=drisw_put_image_shm, the second did not, but
since the same structure was used, the drisw_put_image_shm was used too. Then
it crashed because the second loader did not have putImageShm set.

Downstream bug:
https://bugzilla.opensuse.org/show_bug.cgi?id=1113533

v2: Added Fixes and described the VLC bug.

Fixes: 63c427fa71a ("drisw: use putImageShm if available")
Signed-off-by: Michal Srb <msrb@suse.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>