mesa.git
5 years agonir/worklist: Rework the foreach macro
Jason Ekstrand [Wed, 4 Jul 2018 02:18:28 +0000 (19:18 -0700)]
nir/worklist: Rework the foreach macro

This makes the arguments match the (thing, container) pattern used in
other nir_foreach macros and also renames it to make that a bit more
clear.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agointel: tools: Fix uninitialized variable warnings in intel_dump_gpu.
Eric Anholt [Thu, 12 Jul 2018 18:45:27 +0000 (11:45 -0700)]
intel: tools: Fix uninitialized variable warnings in intel_dump_gpu.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
5 years agospirv: Fix a couple of image atomic load/store bugs
Jason Ekstrand [Fri, 6 Jul 2018 21:41:12 +0000 (14:41 -0700)]
spirv: Fix a couple of image atomic load/store bugs

For one thing, the NIR opcodes for image load/store always take and
return a vec4 value regardless of the image type.  We need to fix up
both the source and destination to handle it.  For another thing, we
weren't actually setting up a destination in the OpAtomicLoad case.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Cc: mesa-stable@lists.freedesktop.org
5 years agowinsys/amdgpu: clean up error handling in amdgpu_cs_submit_ib
Marek Olšák [Thu, 12 Jul 2018 04:47:11 +0000 (00:47 -0400)]
winsys/amdgpu: clean up error handling in amdgpu_cs_submit_ib

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agoradeonsi: rework RADEON_PRIO flags to be <= 31
Marek Olšák [Thu, 12 Jul 2018 04:27:06 +0000 (00:27 -0400)]
radeonsi: rework RADEON_PRIO flags to be <= 31

This decreases sizeof(struct amdgpu_cs_buffer) from 24 to 16 bytes.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agoradeonsi: merge DCC/CMASK/HTILE priority flags
Marek Olšák [Thu, 12 Jul 2018 04:17:02 +0000 (00:17 -0400)]
radeonsi: merge DCC/CMASK/HTILE priority flags

For a later simplification.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agoradeonsi: remove non-GFX BO priority flags
Marek Olšák [Thu, 12 Jul 2018 04:05:23 +0000 (00:05 -0400)]
radeonsi: remove non-GFX BO priority flags

For a later simplification.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agowinsys/amdgpu: use alloca when using global_bo_list
Marek Olšák [Thu, 12 Jul 2018 03:24:31 +0000 (23:24 -0400)]
winsys/amdgpu: use alloca when using global_bo_list

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agowinsys/amdgpu: remove label bo_list_error
Marek Olšák [Thu, 12 Jul 2018 03:21:16 +0000 (23:21 -0400)]
winsys/amdgpu: remove label bo_list_error

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agowinsys/amdgpu: always update gfx_bo_list_counter
Marek Olšák [Thu, 12 Jul 2018 03:20:06 +0000 (23:20 -0400)]
winsys/amdgpu: always update gfx_bo_list_counter

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agowinsys/amdgpu: make amdgpu_cs_context::flags & handles local
Marek Olšák [Thu, 12 Jul 2018 03:19:15 +0000 (23:19 -0400)]
winsys/amdgpu: make amdgpu_cs_context::flags & handles local

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
5 years agomesa/virgl: Fix off-by-one and copy-paste error in multisample position evaluation
Gert Wollny [Fri, 13 Jul 2018 12:46:31 +0000 (14:46 +0200)]
mesa/virgl: Fix off-by-one and copy-paste error in multisample position evaluation

Converting from a switch statement that would not allow intermediate sample counts
to use an if-else chain went a bit wrong, so that in some cases the range that
should be inclusive was exclusive and the line for 16 samples was copies wrongly.

v2: elaborate commit message.

Fixes: 91f48cdfe5c817158c533a8f67c60e9aabbe4479
       virgl: Add support for glGetMultisample
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com> (v1)
5 years agonouveau: fix 3D blitter for unsigned to signed integer conversions
Karol Herbst [Sun, 24 Jun 2018 20:10:28 +0000 (22:10 +0200)]
nouveau: fix 3D blitter for unsigned to signed integer conversions

fixes a couple of packed_pixel CTS tests. No regressions inside a CTS run.

v2: simplify the changes a bit

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonir: fix printing of vec16 type
Karol Herbst [Thu, 12 Jul 2018 04:27:49 +0000 (06:27 +0200)]
nir: fix printing of vec16 type

Fixes: 2f181c8c183cc8b4d0450789bb20c2be48d32db3
       "glsl_types: vec8/vec16 support"

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonir/spirv: implement BuiltInWorkDim
Rob Clark [Thu, 8 Mar 2018 19:18:59 +0000 (14:18 -0500)]
nir/spirv: implement BuiltInWorkDim

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonir/spirv: print id for unsupported builtins
Karol Herbst [Wed, 11 Jul 2018 23:18:23 +0000 (01:18 +0200)]
nir/spirv: print id for unsupported builtins

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agointel/blorp: Handle 3-component formats in clears
Jason Ekstrand [Thu, 12 Jul 2018 21:05:26 +0000 (14:05 -0700)]
intel/blorp: Handle 3-component formats in clears

This fixes a nasty hang in Batman: Arkham City which apparently calls
vkCmdClearColorImage on a linear RGB image.

cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
5 years agointel/blorp: Fix blits to R8G8B8_UNORM_SRGB
Jason Ekstrand [Thu, 12 Jul 2018 20:55:26 +0000 (13:55 -0700)]
intel/blorp: Fix blits to R8G8B8_UNORM_SRGB

In this case, the surface faking will give us a R8_UNORM surface and we
need to do an sRGB conversion in the shader.  Found by inspection.

cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
5 years agoutil/hash_table: add helper to remove entry by key
Caio Marcelo de Oliveira Filho [Thu, 12 Jul 2018 18:17:04 +0000 (11:17 -0700)]
util/hash_table: add helper to remove entry by key

And the corresponding test case.

Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agonir/lower_tex: Use nir_format_srgb_to_linear
Jason Ekstrand [Fri, 13 Jul 2018 01:23:34 +0000 (18:23 -0700)]
nir/lower_tex: Use nir_format_srgb_to_linear

A while ago, we added a bunch of format conversion helpers; we should
use them instead of hand-rolling sRGB conversions.

Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agovc4: Tell NIR to lower fdiv instructions
Jason Ekstrand [Fri, 13 Jul 2018 17:12:02 +0000 (10:12 -0700)]
vc4: Tell NIR to lower fdiv instructions

This should allow us to use them in nir_lower_tex

Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agodocs: Update news, calendar, and relnotes for 18.1.4
Dylan Baker [Fri, 13 Jul 2018 20:54:46 +0000 (13:54 -0700)]
docs: Update news, calendar, and relnotes for 18.1.4

5 years agodocs: Add sha256 sums for 18.1.4 tarballs
Dylan Baker [Fri, 13 Jul 2018 18:46:58 +0000 (11:46 -0700)]
docs: Add sha256 sums for 18.1.4 tarballs

5 years agodocs: Add release notes for 18.1.4
Dylan Baker [Fri, 13 Jul 2018 18:34:55 +0000 (11:34 -0700)]
docs: Add release notes for 18.1.4

5 years agovc4: Switch to using u_transfer_helper for MSAA maps.
Eric Anholt [Tue, 20 Feb 2018 17:07:09 +0000 (17:07 +0000)]
vc4: Switch to using u_transfer_helper for MSAA maps.

No requirement, just reduces code duplication.

5 years agov3d: Work around GFXH-1461 bug losing our Z/S clears.
Eric Anholt [Thu, 12 Jul 2018 23:58:07 +0000 (16:58 -0700)]
v3d: Work around GFXH-1461 bug losing our Z/S clears.

If you load S and clear Z or vice versa, the clear may get lost.  Just
fall back to drawing a quad.

Fixes KHR-GLES3.packed_depth_stencil.verify_read_pixels.depth24_stencil8

5 years agomeson: Move xvmc test tools from unit tests to installed tools.
Eric Anholt [Thu, 12 Jul 2018 18:41:37 +0000 (11:41 -0700)]
meson: Move xvmc test tools from unit tests to installed tools.

These are not unit tests, as they rely on the host's XVMC and some user
configuration.  Switch them over to being general installed tools, to fix
unit testing.

Fixes: 22a817af8a89 ("meson: build gallium xvmc state tracker")
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
5 years agor600: Add spill output to group only if register or target index changes
Gert Wollny [Thu, 5 Jul 2018 17:11:22 +0000 (19:11 +0200)]
r600: Add spill output to group only if register or target index changes

The current spill code checks in each instruction of an instruction group whether
spilling is needed and if so, it adds spilling for each component as a seperate
instruction and it allocates a new temporary for each component and since it takes
the write mask from the TGSI representation, all components might be written
each time and as a result already written components might be overwritten with
garbage like:

   ...
   y: MOV                R9.y,  [0x42140000 37].x
   t: MOV                R8.x,  [0x42040000 33].y
   ...
   MEM_SCRATCH  WRITE_IND_ACK 0     R9.xy__, @R4.x  ES:3
   MEM_SCRATCH  WRITE_IND_ACK 0     R8.xy__, @R4.x  ES:3
   ...

To resolve this isse accumulate spills to the same memory location so that only one
memory write instruction is emitted for an instruction group that writes up to all
four components.

This fixes updated piglits (see https://patchwork.freedesktop.org/series/46064/):
   spec/glsl-1.30/execution
       fs-large-local-array-vec2.shader_test
       fs-large-local-array-vec3.shader_test
       fs-large-local-array-vec4.shader_test

v2: fix some typos and add comment about piglits (Roland Scheidegger)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com> (v1)
5 years agoi965/miptree: Allocate MS texture BOs as BUSY
Nanley Chery [Fri, 6 Jul 2018 20:02:44 +0000 (13:02 -0700)]
i965/miptree: Allocate MS texture BOs as BUSY

These buffer objects are never accessed with the CPU.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
5 years agoi965/miptree: Inline make_separate_stencil
Nanley Chery [Sat, 9 Jun 2018 23:44:15 +0000 (16:44 -0700)]
i965/miptree: Inline make_separate_stencil

Note that the separate stencil miptree now has the same alloc_flag as
the depth component. Only stencil renderbuffers (as opposed to textures)
have BO_ALLOC_BUSY.

v2: Add note about BO_ALLOC_BUSY in message (Topi).

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
5 years agoi965/miptree: Init r8stencil_needs_update to false
Nanley Chery [Sat, 9 Jun 2018 00:50:39 +0000 (17:50 -0700)]
i965/miptree: Init r8stencil_needs_update to false

The current behavior masked two bugs where the flag was not set to true
after modifying the stencil texture. One case was a regression
introduced with commit bdbb527a65fc729e7a9319ae67de60d03d06c3fd and
another was a bug in the depthstencil mapping code. These have since
been fixed.

To prevent such bugs from being masked in the future, initialize
r8stencil_needs_update to false.

v2: Keep the delayed allocation.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
5 years agoi965/miptree: Refactor miptree_create
Nanley Chery [Mon, 11 Jun 2018 18:01:52 +0000 (11:01 -0700)]
i965/miptree: Refactor miptree_create

Enable a future patch to create the r8stencil_mt in this function.

v2: Explicitly set etc_format to MESA_FORMAT_NONE (Topi).

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
5 years agoi965/miptree: Add and use mt_surf_usage
Nanley Chery [Mon, 11 Jun 2018 15:15:17 +0000 (08:15 -0700)]
i965/miptree: Add and use mt_surf_usage

v2: Make mt_fmt const (Topi).

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
5 years agoi965/miptree: Share alloc_flags in miptree_create
Nanley Chery [Mon, 11 Jun 2018 17:35:28 +0000 (10:35 -0700)]
i965/miptree: Share alloc_flags in miptree_create

Note that this maintains BO_ALLOC_BUSY for depth renderbuffers, but not
depth textures.

v2: Add note about BO_ALLOC_BUSY in message (Topi).

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
5 years agoi965/miptree: Share the miptree format in miptree_create
Nanley Chery [Mon, 11 Jun 2018 17:31:05 +0000 (10:31 -0700)]
i965/miptree: Share the miptree format in miptree_create

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
5 years agoi965/miptree: Share tiling_flags in miptree_create
Nanley Chery [Mon, 11 Jun 2018 17:23:23 +0000 (10:23 -0700)]
i965/miptree: Share tiling_flags in miptree_create

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
5 years agoi965/miptree: Delete MIPTREE_CREATE_LINEAR
Nanley Chery [Tue, 12 Jun 2018 14:16:16 +0000 (07:16 -0700)]
i965/miptree: Delete MIPTREE_CREATE_LINEAR

This enum constant was introduced to enable blit maps with
intel_miptree_create da2880bea05bfc87109477ab026a7f5401fc8f0c. Now that
such maps use the more direct make_surface function which allows you to
specify the tiling directly, the constant is no longer being used.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
5 years agoi965/miptree: Use make_surface in map_blit
Nanley Chery [Sat, 9 Jun 2018 23:45:02 +0000 (16:45 -0700)]
i965/miptree: Use make_surface in map_blit

Do this so that we don't have to special case linearly-tiled depth
buffers in miptree_create.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
5 years agoi965/draw: Fix adding the stencil bo to the depth cache
Nanley Chery [Fri, 8 Jun 2018 20:24:09 +0000 (13:24 -0700)]
i965/draw: Fix adding the stencil bo to the depth cache

Fix the case where stencil writes are enabled on a depth stencil
texture. Found by inspection.

v2: Fix message to allow for depth stencil writes (Topi).

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
5 years agoi965/draw: Set the r8stencil flag after drawing
Nanley Chery [Tue, 29 May 2018 06:18:41 +0000 (23:18 -0700)]
i965/draw: Set the r8stencil flag after drawing

Fixes the regresion introduced with commit
bdbb527a65fc729e7a9319ae67de60d03d06c3fd
"i965: Use ISL for emitting depth/stencil/hiz state on gen6+"

Found by inspection.

Prevents regressing the piglit test, fbo-depth-array stencil-draw, later
on in this series.

Cc: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
5 years agoi965/miptree: Set the r8stencil flag in map_depthstencil
Nanley Chery [Fri, 8 Jun 2018 06:55:44 +0000 (23:55 -0700)]
i965/miptree: Set the r8stencil flag in map_depthstencil

Found by initializing the r8stencil_needs_update to false in
make_separate_stencil_surface.

Prevents regressing the piglit test arb_stencil_texturing-draw, later on
in the series.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
5 years agoi965: Set the r8stencil flag in miptree_finish_write
Nanley Chery [Tue, 29 May 2018 05:35:33 +0000 (22:35 -0700)]
i965: Set the r8stencil flag in miptree_finish_write

This seems to be the most appropriate place.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
5 years agonir: cleanup oversized arrays in nir_swizzle calls
Karol Herbst [Fri, 13 Jul 2018 01:33:22 +0000 (03:33 +0200)]
nir: cleanup oversized arrays in nir_swizzle calls

There are no fixed sized array arguments in C, those are simply pointers
to unsized arrays and as the size is passed in anyway, just rely on that.

where possible calls are replaced by nir_channel and nir_channels.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agoi965/miptree: Use the correct BLT pitch
Nanley Chery [Wed, 30 May 2018 23:32:07 +0000 (16:32 -0700)]
i965/miptree: Use the correct BLT pitch

Retile miptrees to a linear tiling less often. Retiling can cause issues
with imported BOs.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106738
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
5 years agoi965/miptree: Drop an if case from retile_as_linear
Nanley Chery [Wed, 23 May 2018 22:50:14 +0000 (15:50 -0700)]
i965/miptree: Drop an if case from retile_as_linear

Drop an if statement whose predicate never evaluates to true. row_pitch
belongs to a surface with non-linear tiling. According to
isl_calc_tiled_min_row_pitch, the pitch is a multiple of the tile width.
By looking at isl_tiling_get_info, we see that non-linear tilings have
widths greater than or equal to 128B.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
5 years agoi965: Make blt_pitch public
Nanley Chery [Wed, 30 May 2018 23:22:13 +0000 (16:22 -0700)]
i965: Make blt_pitch public

We'd like to reuse this helper.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
5 years agonir: delete not needed for reinserted nir_cf_list
Caio Marcelo de Oliveira Filho [Thu, 5 Jul 2018 20:02:30 +0000 (13:02 -0700)]
nir: delete not needed for reinserted nir_cf_list

It wasn't causing problems since there's nothing to delete, but better
be consistent with the rest of existing codebase.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agoglsl: remove struct kill_entry in constant propagation
Caio Marcelo de Oliveira Filho [Mon, 9 Jul 2018 18:29:41 +0000 (11:29 -0700)]
glsl: remove struct kill_entry in constant propagation

The only value in kill_entry is the writemask, which can be stored in
the data pointer of the hash table entry.

Suggested by Eric Anholt.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
5 years agoglsl: slim the kill_entry struct used in const propagation
Caio Marcelo de Oliveira Filho [Sat, 7 Jul 2018 00:21:34 +0000 (17:21 -0700)]
glsl: slim the kill_entry struct used in const propagation

Since 4654439fdd7 "glsl: Use hash tables for
opt_constant_propagation() kill sets." uses a hash_table for storing
kill_entries, so the structs can be simplified.

Remove the exec_node from kill_entry since it is not used in an
exec_list anymore.

Remove the 'var' from kill_entry since it is now redundant with the
key of the hash table.

Suggested by Eric Anholt.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Thomas Helland <thomashelland90@gmail.com>
5 years agoi965: fix typo (wrong gen number) in comment
Caio Marcelo de Oliveira Filho [Fri, 29 Jun 2018 18:38:09 +0000 (11:38 -0700)]
i965: fix typo (wrong gen number) in comment

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agoutil/set: helper to remove entry by key
Caio Marcelo de Oliveira Filho [Mon, 25 Jun 2018 20:42:22 +0000 (13:42 -0700)]
util/set: helper to remove entry by key

v2: Add unit test. (Eric Anholt)

Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agoutil/set: add a clone function
Caio Marcelo de Oliveira Filho [Mon, 25 Jun 2018 16:51:20 +0000 (09:51 -0700)]
util/set: add a clone function

v2: Add unit test. (Eric Anholt)

Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agoutil/set: add a basic unit test
Caio Marcelo de Oliveira Filho [Fri, 6 Jul 2018 18:26:13 +0000 (11:26 -0700)]
util/set: add a basic unit test

Reviewed-by: Eric Anholt <eric@anholt.net>
5 years agoradeonsi: add support for Vega20
Marek Olšák [Tue, 7 Nov 2017 01:02:21 +0000 (02:02 +0100)]
radeonsi: add support for Vega20

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
5 years agou_blitter: Add an option to draw the triangles using an index buffer.
Eric Anholt [Wed, 11 Jul 2018 21:53:57 +0000 (14:53 -0700)]
u_blitter: Add an option to draw the triangles using an index buffer.

For V3D, the HW will interpolate slightly differently along the shared
edge of the trifan.  The conformance tests manage to catch this in the
nearest_consistency_* group.  To get interpolation to match, we need the
last vertex of the triangle to be shared.

I first tried implementing draw_rectangle to do triangles instead, but
that was quite a bit (147 lines) of code duplication from u_blitter, and
this seems much simpler and less likely to break as u_blitter changes.

Fixes dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_* on V3D.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agou_draw: Add some indices to the util_draw_elements() helpers.
Eric Anholt [Wed, 11 Jul 2018 21:58:40 +0000 (14:58 -0700)]
u_draw: Add some indices to the util_draw_elements() helpers.

These helpers have been unused, and were definitely not useful since
330d0607ed60 ("gallium: remove pipe_index_buffer and set_index_buffer")
made it so that they never had an index buffer passed in.

For an upcoming u_blitter change to use these helpers, I have just 6 bytes
of index data, so pass it as user data until a more interesting caller
comes along.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agovc4: Don't automatically reallocate a PERSISTENT-mapped buffer.
Eric Anholt [Wed, 11 Jul 2018 18:23:36 +0000 (11:23 -0700)]
vc4: Don't automatically reallocate a PERSISTENT-mapped buffer.

I had mistakenly used the COHERENT flag, which can only be set when
PERSISTENT is mapped, but isn't always.

Fixes: a2014c2eb9e0 ("vc4: Simplify the DISCARD_RANGE handling")
5 years agov3d: Don't automatically reallocate a PERSISTENT-mapped buffer.
Eric Anholt [Wed, 11 Jul 2018 18:22:16 +0000 (11:22 -0700)]
v3d: Don't automatically reallocate a PERSISTENT-mapped buffer.

I had mistakenly used the COHERENT flag, which can only be set when
PERSISTENT is mapped, but isn't always.

Fixes piglit bufferstorage-persistent read

5 years agov3d: Fix stride of 1D_ARRAY mappings.
Eric Anholt [Wed, 11 Jul 2018 18:11:34 +0000 (11:11 -0700)]
v3d: Fix stride of 1D_ARRAY mappings.

All of our other texture arrays will be tiled, but 1D is an array of
raster mappings and we had the wrong value plugged in here.  Fixes piglit
getteximage-targets 1D_ARRAY

5 years agov3d: Fix MRT blending with independent blending disabled.
Eric Anholt [Wed, 11 Jul 2018 18:02:11 +0000 (11:02 -0700)]
v3d: Fix MRT blending with independent blending disabled.

We were only emitting the RT blend state for RT 0 and only enabling it for
RT 0, when the gallium API for !independent_blend is for rt0's state to
apply to all of them.

Fixes piglit fbo-drawbuffers-blend-add.

5 years agogallium/u_transfer_helper: Initialize the stride of MSAA maps.
Eric Anholt [Tue, 10 Jul 2018 00:51:37 +0000 (17:51 -0700)]
gallium/u_transfer_helper: Initialize the stride of MSAA maps.

We just never set the value that was returned for MSAA mappings (directly
reading back an MSAA framebuffer).  Since we're handing back ss_map, it
should be ss_map's stride from our nested transfer.

Fixes piglit /home/anholt/src/piglit/bin/fbo-depthstencil -samples=4
cases.

Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agogallium/u_transfer_helper: Fix MSAA mappings with nonzero x/y.
Eric Anholt [Mon, 9 Jul 2018 21:09:07 +0000 (14:09 -0700)]
gallium/u_transfer_helper: Fix MSAA mappings with nonzero x/y.

We created a temporary with box->{width,height} and then tried to map
width,height from a nonzero offset when we meant to just map the whole
temporary.

Fixes segfaults in V3D in dEQP-GLES3.functional.prerequisite.read_pixels
with --deqp-egl-config-name=rgba8888d24s8ms4 and also piglit's read-front
clear-front-first -samples=4

Reviewed-by: Rob Clark <robdclark@gmail.com>
5 years agoutil/rb_tree: Fix a compiler warning
Jason Ekstrand [Thu, 12 Jul 2018 00:06:26 +0000 (17:06 -0700)]
util/rb_tree: Fix a compiler warning

Gcc 8 warns "cast to pointer from integer of different size" in 32-bit
builds.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agoi965/fs: unspills shoudn't use grf127 as dest since Gen8+
Jose Maria Casanova Crespo [Wed, 11 Jul 2018 09:19:20 +0000 (11:19 +0200)]
i965/fs: unspills shoudn't use grf127 as dest since Gen8+

At 232ed8980217dd65ab0925df28156f565b94b2e5 "i965/fs: Register allocator
shoudn't use grf127 for sends dest" we didn't take into account the case
of SEND instructions that are not send_from_grf. But since Gen7+ although
the backend still uses MRFs internally for sends they are finally
assigned to a GRFs.

In the case of unspills the backend assigns directly as source its
destination because it is suppose to be available. So we always have a
source-destination overlap. If the reg_allocator assigns registers that
include the grf127 we fail the validation rule that affects Gen8+
"r127 must not be used for return address when there is a src and dest
overlap in send instruction."

So this patch activates the grf127_send_hack_node for Gen8+ and if we
have any register spilled we add interferences to the destination of
the unspill operations.

We also need to avoid that opt_bank_conflicts() optimization, that runs
after the register allocation, doesn't move things around, causing the
grf127 to be used in the condition we were avoiding.

Fixes piglit test tests/spec/arb_compute_shader/linker/bug-93840.shader_test
and some shader-db crashed because of the grf127 validation rule..

v2: make sure that opt_bank_conflicts() optimization doesn't change
the use of grf127. (Caio)

Found by Caio Marcelo de Oliveira Filho

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107193
Fixes: 232ed89802 "i965/fs: Register allocator shoudn't use grf127 for sends dest"
Cc: 18.1 <mesa-stable@lists.freedesktop.org>
Cc: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Cc: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
5 years agogallium: Check pipe_screen::resource_changed before dereferencing it
Michel Dänzer [Thu, 12 Jul 2018 14:29:51 +0000 (16:29 +0200)]
gallium: Check pipe_screen::resource_changed before dereferencing it

It's optional, only implemented by the etnaviv driver so far.

Fixes: 501d0edeca32 "st/mesa: call resource_changed when binding a
                     EGLImage to a texture"
Fixes: a37cf630b4d1 "gallium: add pipe_screen::resource_changed callback
                     wrappers"
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
5 years agodocs/features: Add the missing KHR extensions
Jason Ekstrand [Wed, 11 Jul 2018 23:03:38 +0000 (16:03 -0700)]
docs/features: Add the missing KHR extensions

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agodocs/features: Move the Vulkan 1.1 extensions to the 1.1 section
Jason Ekstrand [Wed, 11 Jul 2018 23:03:37 +0000 (16:03 -0700)]
docs/features: Move the Vulkan 1.1 extensions to the 1.1 section

While we're at it, add some extensions we missed along the way like the
VK_KHR_maintenanceN extensions.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agodocs/features: Mark some Vulkan extensions as done
Jason Ekstrand [Wed, 11 Jul 2018 23:03:36 +0000 (16:03 -0700)]
docs/features: Mark some Vulkan extensions as done

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agonir/spirv: handle OpConstantComposites with OpUndef members
Karol Herbst [Fri, 4 May 2018 14:28:03 +0000 (16:28 +0200)]
nir/spirv: handle OpConstantComposites with OpUndef members

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonir/spirv: implement BuiltInGlobalSize
Karol Herbst [Thu, 22 Feb 2018 22:35:50 +0000 (23:35 +0100)]
nir/spirv: implement BuiltInGlobalSize

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonir: move lowering of SYSTEM_VALUE_LOCAL_GROUP_SIZE into a function
Karol Herbst [Wed, 11 Jul 2018 00:42:03 +0000 (02:42 +0200)]
nir: move lowering of SYSTEM_VALUE_LOCAL_GROUP_SIZE into a function

we already have this code duplicated and we will need it for the global
group size as well

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agocompiler: add missing entries to gl_system_value_name
Karol Herbst [Tue, 10 Jul 2018 23:13:46 +0000 (01:13 +0200)]
compiler: add missing entries to gl_system_value_name

also reorder to match the gl_system_value enum.

It is weird that the STATIC_ASSERT doesn't trigger though.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonir/spirv: print extension name in fail msg
Rob Clark [Fri, 23 Feb 2018 20:56:03 +0000 (15:56 -0500)]
nir/spirv: print extension name in fail msg

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agonir/spirv: Use imov where we might have 8 bit types
Rob Clark [Sat, 3 Mar 2018 20:31:13 +0000 (15:31 -0500)]
nir/spirv: Use imov where we might have 8 bit types

Otherwise nir_validate may complain about 8 bit floats, which do not exist.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Karol Herbst <kherbst@redhat.com>
5 years agoradv: simplify the logic in radv_set_descriptor_set()
Samuel Pitoiset [Tue, 10 Jul 2018 14:13:42 +0000 (16:13 +0200)]
radv: simplify the logic in radv_set_descriptor_set()

Now that 'set' can't be NULL because the meta operations no
longer bind a NULL descriptor, the logic can be simplified
a little bit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradv: remove one useless check in radv_bind_descriptor_set()
Samuel Pitoiset [Tue, 10 Jul 2018 14:13:41 +0000 (16:13 +0200)]
radv: remove one useless check in radv_bind_descriptor_set()

'set' shouldn't be NULL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradv/meta: do not restore a NULL descriptor
Samuel Pitoiset [Tue, 10 Jul 2018 14:13:40 +0000 (16:13 +0200)]
radv/meta: do not restore a NULL descriptor

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradv: remove unnecessary verification code around ring_offsets_idx
Samuel Pitoiset [Tue, 10 Jul 2018 14:13:39 +0000 (16:13 +0200)]
radv: remove unnecessary verification code around ring_offsets_idx

I don't want to waste CPU cycles for nothing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradv: get rid of buffer object priorities
Samuel Pitoiset [Tue, 10 Jul 2018 14:13:38 +0000 (16:13 +0200)]
radv: get rid of buffer object priorities

We mostly use the same priority for all buffer objects, so
I don't think that matter much. This should reduce CPU
overhead a little bit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agost/mesa: call resource_changed when binding a EGLImage to a texture
Lucas Stach [Tue, 20 Mar 2018 11:14:12 +0000 (12:14 +0100)]
st/mesa: call resource_changed when binding a EGLImage to a texture

When a EGLImage is newly bound to a texture, we need to make sure the
driver is informed that the resource might have changed. Fixes stale
texture content on Etnaviv when binding an existing EGLImage to an
existing texture object.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agoradv: emit a dummy ZPASS_DONE to prevent GPU hangs on GFX9
Samuel Pitoiset [Wed, 11 Jul 2018 09:55:55 +0000 (11:55 +0200)]
radv: emit a dummy ZPASS_DONE to prevent GPU hangs on GFX9

A ZPASS_DONE or PIXEL_STAT_DUMP_EVENT (of the DB occlusion
counters) must immediately precede every timestamp event to
prevent a GPU hang on GFX9.

Cc: 18.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradv: add support for VK_KHR_create_renderpass2
Samuel Pitoiset [Sun, 8 Jul 2018 15:47:52 +0000 (17:47 +0200)]
radv: add support for VK_KHR_create_renderpass2

VkCreateRenderPass2KHR() is quite similar to VkCreateRenderPass()
but refactoring the code is a bit painful.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agoradv: introduce radv_subpass_attachment data structure
Samuel Pitoiset [Sun, 8 Jul 2018 15:47:51 +0000 (17:47 +0200)]
radv: introduce radv_subpass_attachment data structure

Needed for VK_KHR_create_renderpass2.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agost/mesa: Only enable depth writes if the function isn't EQUAL.
Kenneth Graunke [Thu, 5 Jul 2018 09:55:57 +0000 (02:55 -0700)]
st/mesa: Only enable depth writes if the function isn't EQUAL.

If the depth function is EQUAL, then we'll only write the depth value
when it already matches what's in the buffer, which is pointless.
Skipping these writes can save bandwidth.

The state tracker can easily take care of this, so all drivers benefit.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
5 years agoanv/android: Fix type error in call to vk_errorf()
Chad Versace [Thu, 28 Jun 2018 03:22:23 +0000 (20:22 -0700)]
anv/android: Fix type error in call to vk_errorf()

In a single call to vk_errorf() in the Android code, the arguments were
swapped. The bug has existed since day one. Chrome OS used to forgive
the warning, but it is now a compilation error.

CC: <mesa-stable@lists.freedesktop.org>
Fixes: 053d4c32 "anv: Implement VK_ANDROID_native_buffer (v9)"
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
5 years agoanv/android: Fix Autotools build for VK_ANDROID_native_buffer
Chad Versace [Thu, 28 Jun 2018 02:40:44 +0000 (19:40 -0700)]
anv/android: Fix Autotools build for VK_ANDROID_native_buffer

Changes to vk.xml and anv_entrypoints_gen.py broke the Autotools build
on Android. The changes undef'd the VK_ANDROID_native_buffer entrypoints
in anv_entrypoints.h.

Fix it with CPPFLAGS += -DVK_USE_PLATFORM_ANDROID_KHR.

CC: <mesa-stable@lists.freedesktop.org>
See-Also: 63525ba7 "android: enable VK_ANDROID_native_buffer"
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
5 years agoradv: make sure to wait for CP DMA when needed
Samuel Pitoiset [Mon, 9 Jul 2018 16:02:58 +0000 (18:02 +0200)]
radv: make sure to wait for CP DMA when needed

This might fix some synchronization issues. I don't know if
that will affect performance but it's required for correctness.

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
5 years agointel/tools/dump_gpu: Add option to print ppgtt mappings.
Rafael Antognolli [Tue, 3 Jul 2018 18:38:39 +0000 (11:38 -0700)]
intel/tools/dump_gpu: Add option to print ppgtt mappings.

Using -vv will increase the verbosity, by printing the ppgtt mappings as
they get written into the aub file.

Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
5 years agospirv: Fix InterpolateAt* instructions for vecs with dynamic index
Neil Roberts [Wed, 9 May 2018 13:14:36 +0000 (15:14 +0200)]
spirv: Fix InterpolateAt* instructions for vecs with dynamic index

If the glsl is something like this:

  in vec4 some_input;
  interpolateAtCentroid(some_input[idx])

then it now gets generated as if it were:

  interpolateAtCentroid(some_input)[idx]

This is necessary because the index will get generated as a series of
nir_bcsel instructions so it would no longer be an input variable. It
is similar to what is done for GLSL in ca63a5ed3e9efb2bd645b42.

Although I can’t find anything explicit in the Vulkan specs to say
this should be allowed, the SPIR-V spec just says “the operand
interpolant must be a pointer to the Input Storage Class”, which I
guess doesn’t rule out any type of pointer to an input.

This was found using the spec/glsl-4.40/execution/fs-interpolateAt*
Piglit tests with the ARB_gl_spirv branch.

Signed-off-by: Neil Roberts <nroberts@igalia.com>
Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
v2: update after nir_deref_instr land on master. Implemented by
    Alejandro Piñeiro. Special thanks to Jason Ekstrand for guidance
    at the new nir_deref_instr world.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
5 years agointel/ir: Uncomment definition of several unused hardware opcodes.
Francisco Jerez [Wed, 24 Jan 2018 03:35:23 +0000 (19:35 -0800)]
intel/ir: Uncomment definition of several unused hardware opcodes.

There are a number of opcode_desc table entries for many of these
unused opcodes.  A symbolic opcode enum will be required in a future
commit in order to keep them in the opcode description tables.  The
alternative would be to remove the unused opcodes from the opcode
description tables.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/fs: Initialize mlen for gen7 varying pull constant load messages.
Francisco Jerez [Wed, 27 Dec 2017 03:08:10 +0000 (19:08 -0800)]
intel/fs: Initialize mlen for gen7 varying pull constant load messages.

This makes the message length available at the IR level, which should
save some guesswork in a future commit.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/eu: Assert that the instruction is send-like in brw_set_desc_ex().
Francisco Jerez [Sun, 3 Jun 2018 20:20:45 +0000 (13:20 -0700)]
intel/eu: Assert that the instruction is send-like in brw_set_desc_ex().

Constructing a descriptor in-place as part of the immediate of an ALU
instruction is no longer supported.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/eu: Get rid of the return value of brw_send_indirect_message().
Francisco Jerez [Sat, 2 Jun 2018 22:08:18 +0000 (15:08 -0700)]
intel/eu: Get rid of the return value of brw_send_indirect_message().

The return value is not used anymore.  This allows simplifying the
code slightly, and in addition it should frustrate anybody's attempts
to continue using the obsolete piecemeal approach to construct a
message descriptor in combination with brw_send_indirect_message().

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/eu: Get rid of the return value of brw_send_indirect_surface_message().
Francisco Jerez [Sun, 3 Jun 2018 10:30:50 +0000 (03:30 -0700)]
intel/eu: Get rid of the return value of brw_send_indirect_surface_message().

All users of brw_send_indirect_surface_message() should be providing a
full descriptor immediate up front by now, this isn't necessary
anymore.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/eu: Use descriptor constructors for dataport typed surface messages.
Francisco Jerez [Thu, 7 Jun 2018 22:27:06 +0000 (15:27 -0700)]
intel/eu: Use descriptor constructors for dataport typed surface messages.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/eu: Use descriptor constructors for dataport scattered byte surface messages.
Francisco Jerez [Thu, 7 Jun 2018 22:24:48 +0000 (15:24 -0700)]
intel/eu: Use descriptor constructors for dataport scattered byte surface messages.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/eu: Use descriptor constructors for dataport untyped surface messages.
Francisco Jerez [Thu, 7 Jun 2018 22:22:58 +0000 (15:22 -0700)]
intel/eu: Use descriptor constructors for dataport untyped surface messages.

v2: Use SET_BITS macro instead of left shift (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/eu: Provide single descriptor argument to brw_send_indirect_surface_message().
Francisco Jerez [Thu, 7 Jun 2018 22:19:49 +0000 (15:19 -0700)]
intel/eu: Provide single descriptor argument to brw_send_indirect_surface_message().

Instead of the current message_len, response_len and header_present
arguments.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/eu: Use descriptor constructors for pixel interpolator messages.
Francisco Jerez [Mon, 9 Jul 2018 23:16:16 +0000 (16:16 -0700)]
intel/eu: Use descriptor constructors for pixel interpolator messages.

v2: Use SET_BITS macro instead of left shift (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
5 years agointel/eu: Use descriptor constructors for dataport write messages.
Francisco Jerez [Mon, 9 Jul 2018 23:12:59 +0000 (16:12 -0700)]
intel/eu: Use descriptor constructors for dataport write messages.

v2: Use SET_BITS macro instead of left shift (Ken).

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>