mesa.git
6 years agost/nine: Add parameter to start with bind
Axel Davy [Sun, 9 Sep 2018 10:36:28 +0000 (12:36 +0200)]
st/nine: Add parameter to start with bind

Add a parameter to start new object with a bind
instead of a refcount.

Signed-off-by: Axel Davy <davyaxel0@gmail.com>
6 years agost/nine: Use perspective correction for ps depth fog
Axel Davy [Thu, 16 Aug 2018 14:29:31 +0000 (16:29 +0200)]
st/nine: Use perspective correction for ps depth fog

Emulate perspective interpolation of depth for programmable ps fog

ff ps fog uses position z, or 1/w depending on the ff
projection matrix set. This is according to public documents
found describing the algorithm and tests we made.

In the case of programmable ps, we used position's z,
which was sufficient to pass wine tests (which test shaders
don't set w).

Issue https://github.com/iXit/Mesa-3D/issues/315 showed
that this calculation was wrong.
Using perspective interpolation on z, that is using z * 1/w
seems to satisfy both this application and wine tests.

Fixes: https://github.com/iXit/Mesa-3D/issues/315
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
6 years agost/nine: Clamp RCP when 0*inf!=0
Axel Davy [Fri, 27 Jan 2017 22:13:29 +0000 (23:13 +0100)]
st/nine: Clamp RCP when 0*inf!=0

Tests done on several devices of all 3 vendors and
of different generations showed that there are several
ways of handling infs and NaN for d3d9.

Tests showed Intel on windows does always clamp
RCP, RSQ and LOG (thus preventing inf/nan generation),
for all shader versions (some vendor behaviours vary
with shader versions).
Doing this in nine avoids 0*inf issues for drivers
that can't generate 0*inf=0 (which is controled by
TGSI's MUL_ZERO_WINS).

For now clamp for all drivers. An ulterior optimization
would be to avoid clamping for drivers with MUL_ZERO_WINS
for the specific shader versions where NV or AMD don't
clamp.

LOG and RSQ being already clamped, this patch only
clamps RCP.

Fixes: https://github.com/iXit/Mesa-3D/issues/316
Signed-off-by: Axel Davy <davyaxel0@gmail.com>
CC: <mesa-stable@lists.freedesktop.org>
6 years ago.travis: Drop note about Clover builds being slow
Jan Vesely [Wed, 12 Sep 2018 22:18:24 +0000 (18:18 -0400)]
.travis: Drop note about Clover builds being slow

SWR takes 17+ minutes to build. Clover builds take ~6-7 minutes.

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years ago.travis: Add LLVM-7 Clover build
Jan Vesely [Wed, 12 Sep 2018 21:52:18 +0000 (17:52 -0400)]
.travis: Add LLVM-7 Clover build

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agointel/compiler: Export TCS passthrough creation
Caio Marcelo de Oliveira Filho [Fri, 21 Sep 2018 20:26:03 +0000 (13:26 -0700)]
intel/compiler: Export TCS passthrough creation

Move create_passthrough_tcs() from i965 so can be used in other
contexts.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agomesa/st: In the precense of integer buffers enable per buffer blending
Gert Wollny [Thu, 13 Sep 2018 08:06:45 +0000 (10:06 +0200)]
mesa/st: In the precense of integer buffers enable per buffer blending

Since blending will be disabled later for integer formats we have to
consider that in the case of a mixed set of integer/non-integer format
buffers blending must be handled on a per buffer basis.

Fixes on r600:
  dEQP-GLES31.functional.draw_buffers_indexed.random.
      max_required_draw_buffers.13

Fixes: 8fb966688bc1053a48e8ee7f7394ce030bcfd345
  st/mesa: Disable blending for integer formats.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agomeson+autotools: get rid of spammy GCC warning -Wformat-truncation
Eric Engestrom [Fri, 21 Sep 2018 10:42:38 +0000 (11:42 +0100)]
meson+autotools: get rid of spammy GCC warning -Wformat-truncation

That warning fires every time a string function takes an argument that
could possibly be longer than its max output, which triggers all over
the place, especially when working with file paths ("what if every file
path is MAX_PATH long?" is what GCC is saying, which is really annoying
when we *know* that "/dev/dri/cardN" is not gonna be 4096 char long and
it's safe to store it in a 32-char array).

Anyway, we either add a ton of dead code all over the place to make GCC
happy, or we get rid of its spam. I chose the latter.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
6 years agomeson: make it trivial to add other -Wno-foo CFLAGS
Eric Engestrom [Fri, 21 Sep 2018 10:37:53 +0000 (11:37 +0100)]
meson: make it trivial to add other -Wno-foo CFLAGS

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agogallivm: ensure string is null-terminated instead of assert()ing
Eric Engestrom [Fri, 21 Sep 2018 11:00:33 +0000 (12:00 +0100)]
gallivm: ensure string is null-terminated instead of assert()ing

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agointel/compiler/icl: Use barrier id bits 24:30 instead of 24:27,31
Topi Pohjolainen [Thu, 20 Sep 2018 10:46:04 +0000 (06:46 -0400)]
intel/compiler/icl: Use barrier id bits 24:30 instead of 24:27,31

Fixes gpu hangs with Carchase and Manhattan.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
6 years agoradv: only emit ZPASS_DONE for timestamp queries on gfx queues
Andres Rodriguez [Tue, 25 Sep 2018 06:30:34 +0000 (02:30 -0400)]
radv: only emit ZPASS_DONE for timestamp queries on gfx queues

A ZPASS_DONE packet doesn't make sense for the compute queue. It will
result in a gpu hang.

This change resolves a gpu hang for SteamVR+Vega.

Cc: mesa-stable@lists.freedesktop.org
Fixes: 1f616a840eac02241c585d28e9dac8f19a297f39 "radv: emit a dummy ..."
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
6 years agoradv: make use of nir_lower_load_const_to_scalar()
Timothy Arceri [Mon, 24 Sep 2018 08:18:48 +0000 (18:18 +1000)]
radv: make use of nir_lower_load_const_to_scalar()

This allows NIR to CSE more operations. LLVM does this also so the
impact is limited, however doing this in NIR allows other opts to
make progress. For example in radeonsi more loops are unrolled in
Civilization Beyond Earth.

The actual pipeline-db stats are not overwhelming but even in the
negatively affected shaders the NIR is clearly better. It just
happens that the code shuffling and in some cases calls to max
rather than a flt result in the final output from LLVM not
giving as good numbers.

However this is an incremental opt that further passes build off
so the change should be made IMO.

Totals from affected shaders:
SGPRS: 20192 -> 20184 (-0.04 %)
VGPRS: 19516 -> 19524 (0.04 %)
Spilled SGPRs: 437 -> 444 (1.60 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 1527444 -> 1522276 (-0.34 %) bytes
LDS: 6 -> 6 (0.00 %) blocks
Max Waves: 1018 -> 1016 (-0.20 %)
Wait states: 0 -> 0 (0.00 %)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agomeson: de-duplicate LLVM check
Dylan Baker [Mon, 24 Sep 2018 16:32:56 +0000 (09:32 -0700)]
meson: de-duplicate LLVM check

By adding `_llvm == 'true'` to the required argument we can check the
'auto' and 'true' case in one path.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
6 years agovulkan/wsi/display: wsi_display_select_crtc() doesn' need to modify the connector
Eric Engestrom [Fri, 14 Sep 2018 13:43:57 +0000 (14:43 +0100)]
vulkan/wsi/display: wsi_display_select_crtc() doesn' need to modify the connector

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
6 years agovulkan/wsi/display: check if wsi_swapchain_init() succeeded
Eric Engestrom [Thu, 13 Sep 2018 19:36:15 +0000 (20:36 +0100)]
vulkan/wsi/display: check if wsi_swapchain_init() succeeded

Fixes: da997ebec929421939553 "vulkan: Add KHR_display extension using DRM [v10]"
Cc: Keith Packard <keithp@keithp.com>
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agoradeon/uvd: use bitstream coded number for symbols of Huffman tables
Leo Liu [Tue, 18 Sep 2018 20:19:57 +0000 (16:19 -0400)]
radeon/uvd: use bitstream coded number for symbols of Huffman tables

Signed-off-by: Leo Liu <leo.liu@amd.com>
Fixes: 130d1f456(radeon/uvd: reconstruct MJPEG bitstream)
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
6 years agonv50/ir: fix link-time build failure
Rhys Perry [Sun, 23 Sep 2018 16:57:08 +0000 (17:57 +0100)]
nv50/ir: fix link-time build failure

Seems this fixes linking problems that occur in some situations.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
6 years agonvc0: fix bindless multisampled images on Maxwell+
Rhys Perry [Fri, 20 Jul 2018 14:56:21 +0000 (15:56 +0100)]
nvc0: fix bindless multisampled images on Maxwell+

NVC0_CB_AUX_BINDLESS_INFO isn't written to on Maxwell+ and it's too small
anyway.

With these changes, TXQ is used to determine the number of samples and
the coordinate adjustment information looked up in a small array in the
driver constant buffer.

v2: rework to use TXQ and a small array instead of a larger array with an
    entry for each texture
v3: get rid of the small array and calculate the adjustments in the shader

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: c2ae9b40527 ('nvc0: implement multisampled images on Maxwell+')
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
6 years agodocs: fix couple typos/outdated info
Eric Engestrom [Fri, 21 Sep 2018 13:41:00 +0000 (14:41 +0100)]
docs: fix couple typos/outdated info

`git-branch` doesn't exist, and mesa3d-dev hasn't been used in a great
many years :)

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agodocs: update repo URLs after GitLab move
Eric Engestrom [Fri, 21 Sep 2018 13:39:53 +0000 (14:39 +0100)]
docs: update repo URLs after GitLab move

I also updated the developer instructions; presumably someone who's been
given commit rights already knows how to clone a repository :)

A more useful thing is to show how to update the pushurl, and how to use
access tokens to push over HTTPS (especially for us at Intel, where
non-http traffic is a pain).

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agodocs: Update FAQ with respect to s3tc support
Stuart Young [Thu, 20 Sep 2018 07:12:43 +0000 (17:12 +1000)]
docs: Update FAQ with respect to s3tc support

It's just over 10 months since 17.3.0 was released with s3tc support enabled.
Probably a good idea to update the FAQ page.

v2: Incorporate feedback from Adam Jackson <ajax@redhat.com>

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Fixes: 04396a134f0 ("mesa: Import libtxc_dxtn sources")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agonvc0: warn about changing NVC0_CB_AUX_MP_INFO and NVC0_CB_AUX_DRAW_INFO
Rhys Perry [Thu, 20 Sep 2018 17:39:06 +0000 (18:39 +0100)]
nvc0: warn about changing NVC0_CB_AUX_MP_INFO and NVC0_CB_AUX_DRAW_INFO

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
6 years agonvc0: Update counter reading shaders to new NVC0_CB_AUX_MP_INFO
Rhys Perry [Thu, 20 Sep 2018 17:06:27 +0000 (18:06 +0100)]
nvc0: Update counter reading shaders to new NVC0_CB_AUX_MP_INFO

Fixes: 66ca7e400b8 ('nvc0: add support for programmable sample locations')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
6 years agovc4: Remove dead i == 0 code from the cos() implementation.
Eric Anholt [Fri, 21 Sep 2018 22:00:21 +0000 (15:00 -0700)]
vc4: Remove dead i == 0 code from the cos() implementation.

The loop starts at 1.

6 years agovc4: Fix sin(0.0) and cos(0.0) accuracy to fix SDL rendering rotation.
Eric Anholt [Fri, 21 Sep 2018 21:11:12 +0000 (14:11 -0700)]
vc4: Fix sin(0.0) and cos(0.0) accuracy to fix SDL rendering rotation.

SDL has some shaders that compute sin(angle) and cos(angle) for a rotation
matrix in the VS, and angle is usually 0.0.  Our previous implementation
had quite a bit of error around 0.0, causing single-pixel rotations at
typical window sizes.  SDL2 has changed as of August 28th (commit
12156:e5a666405750) to not need sin/cos in the VS, but we should still fix
this for existing implementations or similar patterns that other programs
may have.

glsl-cos goes from 32 instructions to 36, but 9 uniforms to 7.
glsl-sin goes from 32 instructions to 34, but 8 uniforms to 7.

This seems like a fine impact to have for the bugfix.

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
Fixes: https://github.com/anholt/mesa/issues/110
6 years agointel/icl: Fix URB size for different SKUs
Anuj Phogat [Mon, 10 Sep 2018 23:23:31 +0000 (16:23 -0700)]
intel/icl: Fix URB size for different SKUs

Different ICL SKUs have different URB sizes.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agoi965/icl: Set Enabled Texel Offset Precision Fix bit
Anuj Phogat [Mon, 27 Aug 2018 18:23:08 +0000 (11:23 -0700)]
i965/icl: Set Enabled Texel Offset Precision Fix bit

h/w specification requires this bit to be always set.

V2: Fix bit mask (Chris Wilson)

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agoanv/icl: Set Enabled Texel Offset Precision Fix bit
Anuj Phogat [Mon, 27 Aug 2018 23:16:58 +0000 (16:16 -0700)]
anv/icl: Set Enabled Texel Offset Precision Fix bit

h/w specification requires this bit to be always set.

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agopci_ids: add new polaris pci id
Alex Deucher [Wed, 19 Sep 2018 15:24:30 +0000 (10:24 -0500)]
pci_ids: add new polaris pci id

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: mesa-stable@lists.freedesktop.org
6 years agoglsl_to_tgsi: invert gl_SamplePosition.y for the default framebuffer
Marek Olšák [Tue, 11 Sep 2018 22:02:22 +0000 (18:02 -0400)]
glsl_to_tgsi: invert gl_SamplePosition.y for the default framebuffer

Fixes dEQP-GLES31.functional.shaders.sample_variables.sample_pos.correctness.default_framebuffer
with --deqp-gl-config-name=rgba8888d24s8ms4

Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
6 years agoutil: Add macro to get number of elements in dynarray
Caio Marcelo de Oliveira Filho [Wed, 12 Sep 2018 22:21:20 +0000 (15:21 -0700)]
util: Add macro to get number of elements in dynarray

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
6 years agodocs/meson: Add note about llvm-config$version and llvm-config-$version
Dylan Baker [Tue, 18 Sep 2018 16:09:47 +0000 (09:09 -0700)]
docs/meson: Add note about llvm-config$version and llvm-config-$version

v2: - fix typo

These are how FreeBSD and Debian handle multiple versions of LLVM
installed at the same time, respectively.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
6 years agodocs/meson: Update notes on using CFLAGS and -Dc_args
Dylan Baker [Tue, 18 Sep 2018 16:07:25 +0000 (09:07 -0700)]
docs/meson: Update notes on using CFLAGS and -Dc_args

v2: - Use ${} to denote variables instead of just $
    - fix spelling error

bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107313
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
6 years agodocs: update meson docs to reflect the current status
Dylan Baker [Tue, 18 Sep 2018 16:01:45 +0000 (09:01 -0700)]
docs: update meson docs to reflect the current status

v2: - minor grammar changes
    - fix typo

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
6 years agomeson: Don't force libva to required from auto
Dylan Baker [Tue, 18 Sep 2018 15:45:57 +0000 (08:45 -0700)]
meson: Don't force libva to required from auto

We already correctly handle va being auto, but we force it to being
true, which is bad.

Fixes 94cf3970925ec87d913a1549a42cdb03713fc4bb
      ("meson: Fix auto option for va")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
6 years agomeson: Don't compile pipe loader with dri support when not using dri
Dylan Baker [Mon, 17 Sep 2018 15:56:51 +0000 (08:56 -0700)]
meson: Don't compile pipe loader with dri support when not using dri

Corrects building glx as gallium-xlib without any dri targets.

v2: - fix ugly formatting

Fixes: 66c94b9313a697ce8f2b222f4ba353035e4b8726
       ("meson: build gallium winsys for dri, null, and wrapper")

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
6 years agoradv: use the resolve compute path if dest uses multiple layers
Samuel Pitoiset [Fri, 21 Sep 2018 09:36:17 +0000 (11:36 +0200)]
radv: use the resolve compute path if dest uses multiple layers

The hardware path doesn't support resolving layers, for both
source and destination images.

This fixes a reflection issue when MSAA is enabled which
affects GTA V and probably DIRT3.

CC: <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107786
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Gregor Münch <gr.muench_at_gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoanv,radv: Implement vkAcquireNextImage2
Jason Ekstrand [Thu, 20 Sep 2018 10:30:03 +0000 (05:30 -0500)]
anv,radv: Implement vkAcquireNextImage2

This was added as part of 1.1 but it's very hard to track exactly what
extension added it.  In any case, we should implement it.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Dave Airlie <Airlied@redhat.com>
6 years agodocs: update calendar, add news and link release notes to 18.2.1
Juan A. Suarez Romero [Fri, 21 Sep 2018 11:09:21 +0000 (13:09 +0200)]
docs: update calendar, add news and link release notes to 18.2.1

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
6 years agodocs: add sha256 checksums for 18.2.1
Juan A. Suarez Romero [Fri, 21 Sep 2018 11:05:44 +0000 (13:05 +0200)]
docs: add sha256 checksums for 18.2.1

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit 686eab66420eec742338c1b75e499367e103e82b)

6 years agodocs: add release notes for 18.2.1
Juan A. Suarez Romero [Fri, 21 Sep 2018 10:38:01 +0000 (12:38 +0200)]
docs: add release notes for 18.2.1

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit 3c8c851fe46b1924d84b04c49c60885452c4fbe2)

6 years agoradv: only enable shaderInt16 on GFX9+ and LLVM7+
Samuel Pitoiset [Thu, 20 Sep 2018 20:17:03 +0000 (22:17 +0200)]
radv: only enable shaderInt16 on GFX9+ and LLVM7+

The throughput is similar to 32-bit integers on GFX8 and
AMDVLK does not expose 16-bit integers on pre Vega as well.
On GFX9+, only LLVM 7+ has support.

This fixes a bunch of CTS crashes on GFX9/LLVM 6.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agodocs/features: add EXT_direct_state_access features
Marek Olšák [Tue, 18 Sep 2018 03:30:32 +0000 (23:30 -0400)]
docs/features: add EXT_direct_state_access features

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
6 years agoradv: Fix driver UUID SHA1 init.
Bas Nieuwenhuizen [Thu, 20 Sep 2018 17:15:58 +0000 (19:15 +0200)]
radv: Fix driver UUID SHA1 init.

Was missing the init, found by Emil.

Fixes: d17443a4593 "radv: Use build ID if available for cache UUID."
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
6 years agosvga: fix uninitialized fields in DefineDepthStencilView/DefineStreamOutput
Charmaine Lee [Thu, 13 Sep 2018 20:14:39 +0000 (13:14 -0700)]
svga: fix uninitialized fields in DefineDepthStencilView/DefineStreamOutput

This patch fixes uninitialized fields in DefineDepthStencilView and
DefineStreamOutput commands that are not relevant in SM4 device.

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agor300g: add PIPE_SHADER_CAP_SCALAR_ISA switch case to silence warning
Brian Paul [Tue, 18 Sep 2018 03:07:58 +0000 (21:07 -0600)]
r300g: add PIPE_SHADER_CAP_SCALAR_ISA switch case to silence warning

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agost/mesa: silenced unhanded enum warning in st_glsl_to_tgsi.cpp
Brian Paul [Tue, 18 Sep 2018 03:08:19 +0000 (21:08 -0600)]
st/mesa: silenced unhanded enum warning in st_glsl_to_tgsi.cpp

Add ir_intrinsic_begin_fragment_shader_ordering switch case to
silence warning

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agomesa: use GLsizeiptrARB, GLintptrARB in bufferobj.c
Brian Paul [Tue, 18 Sep 2018 03:05:04 +0000 (21:05 -0600)]
mesa: use GLsizeiptrARB, GLintptrARB in bufferobj.c

The function pointer declarations in dd.h for the BufferData() and
BufferSubData() use the ARB-suffixed datatypes.  This patch changes
the buffer_data_fallback() and buffer_sub_data_fallback() functions
to use those datatypes too.

This fixes a build warning when building 32-bit libraries.  Evidently,
GLsizeiptrARB and GLsizeiptr are defined differently in that situation.

All all implementations of these driver hooks use the ARB-suffixed
types.

Reviewed-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agosvga: Enable Opengl 3.3 compatibility profile
Neha Bhende [Tue, 11 Sep 2018 19:27:54 +0000 (13:27 -0600)]
svga: Enable Opengl 3.3 compatibility profile

With this patch, svga driver will start advertising OpenGL 3.3
compatibility profile.

Tested with some mesa demos, piglit and glretrace.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
6 years agosvga: Apply texcoord scale factors only if there is sampler view
Neha Bhende [Thu, 30 Aug 2018 21:46:56 +0000 (14:46 -0700)]
svga: Apply texcoord scale factors only if there is sampler view

We need to convert unnormalized texcoords to normalized texcoords
when we are sampling from texture. We don't need this conversion
if there is no sampler view.

Tested with piglit, glretrace

Fixes vmware bug 2101970

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
6 years agosvga: fix texture array layer index in transfer map
Charmaine Lee [Mon, 27 Aug 2018 19:07:42 +0000 (12:07 -0700)]
svga: fix texture array layer index in transfer map

In gallium, the layer index of a texture array to be mapped
is specified in the z component, whereas in svga device, the
index is specified in a separate argument.
Currently in svga_texture_transfer_map(), we explicitly modify
the z value in the base transfer map to 0 so the layer offset will not be
applied twice, but this causes problem when state tracker later
refers to the base transfer map and expects the slice index to be
specified in z (commit 463b0ea1f6762b7e0536cfadc4e384840af3e8e0).

To fix the problem, this patch makes a local copy of the box in
svga_transfer and modifies the z value in this copy instead.

Fixes spec@khr_texture_compression-astc piglit test crashes.
Fixes regression in the dma path with commit 1fdd3dd94a.

Tested with mtt glretrace, piglit on Windows VM and Linux VM.

Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agoRevert "utils/u_math: break dependency on gallium/utils"
Dylan Baker [Thu, 20 Sep 2018 17:36:33 +0000 (10:36 -0700)]
Revert "utils/u_math: break dependency on gallium/utils"

This reverts commit 0abce6d7700ee42eb00c787732ec1fdefe250d03.

Which broke the windows build.

6 years agoi965: remove outdated comment about TCS passthrough
Caio Marcelo de Oliveira Filho [Tue, 18 Sep 2018 01:31:48 +0000 (18:31 -0700)]
i965: remove outdated comment about TCS passthrough

Since commit 75881bed9e1 "i965: Rework the TCS passthrough shader to
use NIR." the created nir_shader is not dummy, and it is compiled by
the backend like the others.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agomeson: add option to statically link llvm
Christoph Haag [Mon, 17 Sep 2018 23:08:07 +0000 (01:08 +0200)]
meson: add option to statically link llvm

Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agoutils/u_math: break dependency on gallium/utils
Dylan Baker [Fri, 7 Sep 2018 20:09:23 +0000 (13:09 -0700)]
utils/u_math: break dependency on gallium/utils

Currently u_math needs gallium utils for cpu detection.  Most of what
u_math uses out of u_cpu_detection is duplicated in src/mesa/x86
(surprise!), so I've just reworked it as much as possible to use the
x86/common_x86_features.h macros instead of the gallium ones. The mesa
implementation is a header only approach, with no external dependencies.
There is one small function that was copied over, as promoting
u_cpu_detection is itself a fairly hefty undertaking, as it depends on
u_debug, and this fixes the bug for now.

bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107870
Tested-by: Vinson Lee <vlee@freedesktop.org>
6 years agoegl/android: rework device probing
Emil Velikov [Mon, 3 Sep 2018 12:37:47 +0000 (13:37 +0100)]
egl/android: rework device probing

Unlike the other platforms, here we aim do guess if the device that we
somewhat arbitrarily picked, is supported or not.

In particular: when a vendor is _not_ requested we loop through all
devices, picking the first one which can create a DRI screen.

When a vendor is requested - we use that and do _not_ fall-back to any
other device.

The former seems a bit fiddly, but considering EGL_EXT_explicit_device and
EGL_MESA_query_renderer are MIA, this is the best we can do for the
moment.

With those (proposed) extensions userspace will be able to create a
separate EGL display for each device, query device details and make the
conscious decision which one to use.

v2:
 - update droid_open_device_drm_gralloc()
 - set the dri2_dpy->fd before using it
 - return a EGLBoolean for droid_{probe,open}_device*
 - do not warn on droid_load_driver failure (Tomasz)
 - plug mem leak on dri2_create_screen failure (Tomasz)
 - fixup function name typo (Tomasz, Rob)

v3:
 - add forward declaration for droid_load_driver()
Fixes the HAVE_DRM_GRALLOC build (Mauro)
 - split dup() assignment and check in separate lines (Tomasz, Eric)
 - make droid_load_driver() static (Tomasz)
 - drop unused prop_set variable (Tomasz)

v4:
 - rebase
 - fwd declarationi should be for droid_probe_device()

Cc: Robert Foss <robert.foss@collabora.com>
Cc: Tomasz Figa <tfiga@chromium.org>
Cc: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
Tested-by: Tomasz Figa <tfiga@chromium.org>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
6 years agoglsl: Add an assert when cloning ir_dereference_record with invalid field
Danylo Piliaiev [Wed, 15 Aug 2018 12:46:23 +0000 (15:46 +0300)]
glsl: Add an assert when cloning ir_dereference_record with invalid field

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
6 years agoglsl: Avoid propagating incompatible type of initializer
Danylo Piliaiev [Wed, 15 Aug 2018 12:46:22 +0000 (15:46 +0300)]
glsl: Avoid propagating incompatible type of initializer

do_assignment validated assigment but when rhs type was not compatible
it proceeded without issues and returned error_emitted = false.
On the other hand process_initializer expected do_assignment to always
return compatible type and never fail.

As a result when variable was initialized with incompatible type
the type of variable changed to the incompatible one.
This manifested in unnecessary error messages and in one case in crash.

Example GLSL:
 vec4 tmp = vec2(0.0);
 tmp.z -= 1.0;

Past error messages:
 initializer of type vec2 cannot be assigned to variable of type vec4
 invalid swizzle / mask `z'
 type mismatch
 operands to arithmetic operators must be numeric

After this patch:
 initializer of type vec2 cannot be assigned to variable of type vec4

In the other case when we initialize variable with incompatible struct,
accessing variable's field leaded to a crash. Example:
 uniform struct {float field;} data;
 ...
 vec4 tmp = data;
 tmp.x -= 1.0;

After the patch there is only error line without a crash:
 initializer of type #anon_struct cannot be assigned to variable of
  type vec4

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107547

6 years agost/dri: don't set queryDmaBufFormats/queryDmaBufModifiers if the driver does not...
Michal Srb [Thu, 15 Mar 2018 16:27:57 +0000 (17:27 +0100)]
st/dri: don't set queryDmaBufFormats/queryDmaBufModifiers if the driver does not implement it

This is equivalent to commit a65db0ad1c3, but for dri_kms_init_screen. Without
this gbm_dri_is_format_supported always returns false.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104926
Fixes: e14fe41e0bf ("st/dri: implement createImageFromRenderbuffer(2)")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Tested-by: Adam Williamson <adamwill@fedoraproject.org>
6 years agoanv/so_memcpy: Don't consider src/dst_offset when computing block size
Jason Ekstrand [Mon, 10 Sep 2018 21:36:10 +0000 (16:36 -0500)]
anv/so_memcpy: Don't consider src/dst_offset when computing block size

The only thing that matters is the size since we never specify any
offsets in terms of blocks.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
6 years agoRevert "mesa: only update framebuffer-state for clears"
Jakob Bornecrantz [Wed, 19 Sep 2018 14:21:26 +0000 (15:21 +0100)]
Revert "mesa: only update framebuffer-state for clears"

This reverts commit fb86365148d5b8f3f06c5e42d9c8440fc1f6693f.

6 years agoradv: use a 64-bit unsigned integer when allocating a descriptor pool
Samuel Pitoiset [Tue, 18 Sep 2018 14:18:37 +0000 (16:18 +0200)]
radv: use a 64-bit unsigned integer when allocating a descriptor pool

pool->size is a 64-bit unsigned integer too.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoradv: enable VK_SUBGROUP_FEATURE_ARITHMETIC_BIT
Samuel Pitoiset [Tue, 18 Sep 2018 13:27:52 +0000 (15:27 +0200)]
radv: enable VK_SUBGROUP_FEATURE_ARITHMETIC_BIT

All CTS pass on Polaris/Vega with LLVM 6, 7 and master, so
I think it's safe to enable the feature.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoradv: do not support blitting surfaces with depth and stencil
Samuel Pitoiset [Tue, 18 Sep 2018 13:06:42 +0000 (15:06 +0200)]
radv: do not support blitting surfaces with depth and stencil

Fixes:
dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.depth_stencil.d32_sfloat_s8_uint_d32_sfloat_s8_uint.optimal_optimal_nearest

And all friends that try to blit a surface with different
depth and stencil formats.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agomesa: only update framebuffer-state for clears
Erik Faye-Lund [Mon, 10 Sep 2018 20:11:16 +0000 (22:11 +0200)]
mesa: only update framebuffer-state for clears

If we update the program-state etc, we risk compiling needless shaders,
which can cost quite a bit of performance.

Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agonir: add initializer data to fix MSVC compile error
Juan A. Suarez Romero [Wed, 19 Sep 2018 09:27:49 +0000 (11:27 +0200)]
nir: add initializer data to fix MSVC compile error

CC: Jason Ekstrand <jason@jlekstrand.net>
Fixes: 82799a5d1b8 ("nir: Add a small pass to rematerialize derefs
per-block")
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
6 years agonir: Add some asserts that we don't put derefs in phis
Jason Ekstrand [Tue, 11 Sep 2018 18:06:01 +0000 (13:06 -0500)]
nir: Add some asserts that we don't put derefs in phis

The lcssa and phis_to_regs passes are used by various NIR optimizations
that modify the CFG.  Putting a couple of asserts will help ensure that
we don't accidentally put derefs in phis as part of an optimization
pass.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
6 years agonir/opt_if: Re-materialize derefs in use blocks before peeling loops
Jason Ekstrand [Tue, 11 Sep 2018 17:55:45 +0000 (12:55 -0500)]
nir/opt_if: Re-materialize derefs in use blocks before peeling loops

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107879
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
6 years agonir/loop_unroll: Re-materialize derefs in use blocks before unrolling
Jason Ekstrand [Tue, 11 Sep 2018 17:51:09 +0000 (12:51 -0500)]
nir/loop_unroll: Re-materialize derefs in use blocks before unrolling

When we're about to re-arrange a bunch of blocks, it's a good idea to
make sure that we don't have deref uses crossing block boundaries.
Otherwise we may end up with a deref going through a phi and that would
be bad.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
6 years agonir: Add a small pass to rematerialize derefs per-block
Jason Ekstrand [Tue, 11 Sep 2018 17:15:22 +0000 (12:15 -0500)]
nir: Add a small pass to rematerialize derefs per-block

This pass re-materializes deref instructions on a per-block basis to
ensure that every use of a deref occurs in the same block as the
instruction which uses it.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Cc: "18.2" <mesa-stable@lists.freedesktop.org>
6 years agoamd: Add Picasso device id
Kenneth Feng [Thu, 26 Jul 2018 02:53:33 +0000 (10:53 +0800)]
amd: Add Picasso device id

No changes here compared to Raven.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Cc: 18.1 18.2 <mesa-stable@lists.freedesktop.org>
6 years agoRevert "radv: fix descriptor pool allocation size"
Bas Nieuwenhuizen [Tue, 18 Sep 2018 20:46:43 +0000 (22:46 +0200)]
Revert "radv: fix descriptor pool allocation size"

This reverts commit 90819abb56f6b1a0cd4946b13b6caf24fb46e500.

This logic was wrong, the original code is correct. The direct
impact is that we allocate up to approximately a squared amount
of memory compared to what we should allocate.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
6 years agoradv: implement VK_EXT_conservative_rasterization
Samuel Pitoiset [Mon, 17 Sep 2018 14:34:11 +0000 (16:34 +0200)]
radv: implement VK_EXT_conservative_rasterization

Only supported by GFX9+.

The conservativeraster Sascha demo seems to work as expected.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoradv: do not re-create the sampler for every blits in CmdBlitImage()
Samuel Pitoiset [Mon, 17 Sep 2018 12:57:51 +0000 (14:57 +0200)]
radv: do not re-create the sampler for every blits in CmdBlitImage()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoradv: allow to force anisotropy via RADV_TEX_ANISO
Samuel Pitoiset [Mon, 17 Sep 2018 20:23:19 +0000 (22:23 +0200)]
radv: allow to force anisotropy via RADV_TEX_ANISO

Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agomesa: enable EXT_framebuffer_object in core profile
Timothy Arceri [Sat, 8 Sep 2018 04:20:17 +0000 (14:20 +1000)]
mesa: enable EXT_framebuffer_object in core profile

Since user defined names are not allowed in core profile
we remove the allow_user_names bool and just check if
we have a core profile like all other buffer/texture
object handling code does.

This extension is required by "Wolfenstein: The Old Blood"
and is exposed in core in the Nvidia binary driver.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agomesa: move legacy dri config option texture_depth
Timothy Arceri [Thu, 30 Aug 2018 00:19:08 +0000 (10:19 +1000)]
mesa: move legacy dri config option texture_depth

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agomesa: move legacy dri config option fthrottle_mode
Timothy Arceri [Thu, 30 Aug 2018 00:19:07 +0000 (10:19 +1000)]
mesa: move legacy dri config option fthrottle_mode

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agomesa: move legacy dri config option def_max_anisotropy
Timothy Arceri [Thu, 30 Aug 2018 00:19:06 +0000 (10:19 +1000)]
mesa: move legacy dri config option def_max_anisotropy

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agomesa: move legacy dri config option no_neg_lod_bias
Timothy Arceri [Thu, 30 Aug 2018 00:19:05 +0000 (10:19 +1000)]
mesa: move legacy dri config option no_neg_lod_bias

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agomesa: move legacy dri config option round_mode
Timothy Arceri [Thu, 30 Aug 2018 00:19:04 +0000 (10:19 +1000)]
mesa: move legacy dri config option round_mode

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agomesa: remove unused dri option float_depth
Timothy Arceri [Thu, 30 Aug 2018 00:19:03 +0000 (10:19 +1000)]
mesa: remove unused dri option float_depth

This seems to have only been used by DRI1 drivers which were
removed with e4344161bde2.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agomesa: move legacy dri config option dither_mode
Timothy Arceri [Thu, 30 Aug 2018 00:19:02 +0000 (10:19 +1000)]
mesa: move legacy dri config option dither_mode

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agomesa: move legacy dri config option color_reduction
Timothy Arceri [Thu, 30 Aug 2018 00:19:01 +0000 (10:19 +1000)]
mesa: move legacy dri config option color_reduction

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agomesa: move legacy TCL dri config options
Timothy Arceri [Thu, 30 Aug 2018 00:19:00 +0000 (10:19 +1000)]
mesa: move legacy TCL dri config options

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoutil: use force_compat_profile for Wolfenstein The Old Blood
Timothy Arceri [Wed, 12 Sep 2018 00:52:07 +0000 (10:52 +1000)]
util: use force_compat_profile for Wolfenstein The Old Blood

This game is looking for some odd extension after creating a core
context such as ARB_vertex_program and EXT_framebuffer_object.

Rather then enabling these in core this forces the game to use
compat. This allows the game to run and seems to work without
issues. All other id tech games/engines use a compat profile.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agomesa/st: add force_compat_profile option to driconfig
Timothy Arceri [Wed, 12 Sep 2018 00:52:06 +0000 (10:52 +1000)]
mesa/st: add force_compat_profile option to driconfig

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agoRevert "radeonsi: avoid syncing the driver thread in si_fence_finish"
Timothy Arceri [Wed, 12 Sep 2018 10:50:34 +0000 (20:50 +1000)]
Revert "radeonsi: avoid syncing the driver thread in si_fence_finish"

This reverts commit bc65dcab3bc48673ff6180afb036561a4b8b1119.

This was manually reverted. Reverting stops the menu hanging in
some id tech games such as RAGE and Wolfenstein The New Order.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107891

6 years agov3d: Switch from FLUSH_ALL_STATE to FLUSH for ending our bin CLs.
Eric Anholt [Thu, 13 Sep 2018 19:56:18 +0000 (12:56 -0700)]
v3d: Switch from FLUSH_ALL_STATE to FLUSH for ending our bin CLs.

The HW for FLUSH_ALL_STATE isn't validated, since the closed driver only
uses FLUSH.  Now that we don't have any new state at the end of our bin
CLs, follow their lead.

6 years agov3d: Stop clearing the OQ state at the end of the job.
Eric Anholt [Thu, 13 Sep 2018 19:59:13 +0000 (12:59 -0700)]
v3d: Stop clearing the OQ state at the end of the job.

Ever since we added OQ support, we've been clearing OQ state at the start
of the job anyway.  We're intentionally breaking old-and-new-driver-mix
systems, because we need to stop using the unvalidated FLUSH_ALL_STATE.

6 years agov3d: Always emit a TF disable at the start of drawing on V3D 4.x.
Eric Anholt [Thu, 13 Sep 2018 19:54:26 +0000 (12:54 -0700)]
v3d: Always emit a TF disable at the start of drawing on V3D 4.x.

The HW's FLUSH_ALL_STATE is not validated, so we probably shouldn't use
it, meaning that we need to reset state at the start.  By doing this, we
also make ourselves more resilient to another client leaving the TF state
enabled at the end of their batch (as we now do, ourselves).

However, we still need to emit a single TF disable at the end of the
frame, for SWVC5-718.

6 years agobuild: Don't overlink gallium xlib target
Dylan Baker [Mon, 17 Sep 2018 17:17:48 +0000 (10:17 -0700)]
build: Don't overlink gallium xlib target

Currently gallium's xlib target will fail to link due to multiple
definitions of all the symbols in libmesautil, this only shows up in
autotools, and not in meson due to differences in the way that meson and
autotools handle linking static archives into static archives. Autotools
uses -Wl,--whole-archive implicitly, meson requires this behavior to be
opted-into. The solution is just to remove libmesautils from the
libgl-xlib target, since it will get all of those symbols form
libmesagallium.

I've dropped the link from meson as well, it doesn't seem to hurt
anything and should make linking just a little faster.

Fixes: 8396043f304bb2a752130230055605c5c966e89f
       ("Replace uses of _mesa_bitcount with util_bitcount")
bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107923
Tested-by: Brian Paul <brianp@vmware.com>
Tested-by: Vinson Lee <vlee@freedesktop.org>
Cc: Sergii Romantsov<sergii.romantsov@globallogic.com>
6 years agomove pthread_setaffinity_np check to the build system
Dylan Baker [Thu, 13 Sep 2018 18:06:09 +0000 (11:06 -0700)]
move pthread_setaffinity_np check to the build system

Rather than trying to encode all of the rules in a header, lets just put
them in the build system where they belong. This fixes the build on
FreeBSD, which does have pthraed_setaffinity_np, but it's in a
pthread_np.h, not behind _GNU_SOURCE. FreeBSD also implements cpu_set
slightly differently, so additional changes would be required to get it
working right there anyway.

v2: - fix #define in autotools

Fixes: 9f1bbbdbbd77d346c74c7abbb31f399151a85713
       ("util: try to fix the Android and MacOS build")
Cc: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
6 years agomesa: FramebufferParameteri parameter checking
Fritz Koenig [Fri, 14 Sep 2018 18:40:49 +0000 (11:40 -0700)]
mesa: FramebufferParameteri parameter checking

Missing break; causes parameter checking to
never pass GL_FRAMEBUFFER_FLIP_Y_MESA parameters.

Fixes: 318c265160 ("mesa: GL_MESA_framebuffer_flip_y extension [v4]")
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agomesa: Additional FlipY applications
Fritz Koenig [Mon, 10 Sep 2018 19:11:16 +0000 (12:11 -0700)]
mesa: Additional FlipY applications

Instances where direction was determined based on
winsys or user fbo and should be determined based on
FlipY.

Key STATE_FB_WPOS_Y_TRANSFORM for of FlipY instead of
_mesa_is_user_fbo.  This corrects gl_FragCoord usage
when applying GL_MESA_framebuffer_flip_y.

Fixes: ab05dd183cc ("i965: implement GL_MESA_framebuffer_flip_y [v3]")
Reviewed-by: Brian Paul <brianp@vmware.com>
6 years agoradv: Use build ID if available for cache UUID.
Bas Nieuwenhuizen [Sun, 16 Sep 2018 00:50:34 +0000 (02:50 +0200)]
radv: Use build ID if available for cache UUID.

To get an useful UUID for systems that have a non-useful mtime
for the binaries.

I started using SHA1 to ensure we get reasonable mixing in the
various possibilities and the various build id lengths.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
6 years agoradv: enable shaderInt16 capability
Samuel Pitoiset [Fri, 14 Sep 2018 10:52:40 +0000 (12:52 +0200)]
radv: enable shaderInt16 capability

Not sure if this is all wired up. CTS does pass and the Tangrams
demo works fine on Vega. There are corruption issues on Polaris
but not sure if that related to 16-bit support.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoac: add 16-bit support to ac_build_bitfield_reverse()
Samuel Pitoiset [Fri, 14 Sep 2018 10:52:39 +0000 (12:52 +0200)]
ac: add 16-bit support to ac_build_bitfield_reverse()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoac: add 16-bit support to ac_build_bit_count()
Samuel Pitoiset [Fri, 14 Sep 2018 10:52:38 +0000 (12:52 +0200)]
ac: add 16-bit support to ac_build_bit_count()

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>