Benjamin Herrenschmidt [Tue, 12 May 2020 11:31:23 +0000 (21:31 +1000)]
soc: Don't update CSR alignment when there is no CPU
The alignment specified by the standalone core config should
be honored.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Benjamin Herrenschmidt [Tue, 12 May 2020 11:30:19 +0000 (21:30 +1000)]
soc: Don't create a wishbone slave to LiteDRAM with no CPU
When creating a standalone LiteDRAM core with no CPU, there is
no need to create a wishbone slave to LiteDRAM interface.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Dave Marples [Tue, 12 May 2020 11:28:09 +0000 (12:28 +0100)]
Bring into line with master
Benjamin Herrenschmidt [Tue, 12 May 2020 10:58:19 +0000 (20:58 +1000)]
soc: Don't create a share intercon with only one master and one slave
This creates a lot of useless churn in the resulting verilog. Instead
use a point to point interconnect in that case.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
enjoy-digital [Tue, 12 May 2020 09:41:25 +0000 (11:41 +0200)]
Merge pull request #506 from scanakci/blackparrot_litex
Update README and core.py for Blackparrot and change vivado command for systemverilog
enjoy-digital [Tue, 12 May 2020 09:38:09 +0000 (11:38 +0200)]
Merge pull request #508 from antmicro/update_litesdcard
Update Litex bios to handle updated litesdcard.
Dave Marples [Tue, 12 May 2020 08:41:37 +0000 (09:41 +0100)]
Addition of boot address parameter for trellis builds
Kamil Rakoczy [Fri, 3 Apr 2020 12:58:36 +0000 (14:58 +0200)]
Update Litex bios to handle updated litesdcard.
sadullah [Tue, 12 May 2020 04:58:19 +0000 (00:58 -0400)]
Update README.md and core.py for BlackParrot
sadullah [Fri, 8 May 2020 06:17:37 +0000 (02:17 -0400)]
Vivado Command Update for Systemverilog
Add BlackParrot to LiteX setup file
enjoy-digital [Mon, 11 May 2020 20:53:31 +0000 (22:53 +0200)]
Merge pull request #505 from DurandA/patch-3
Enable 1x mode on SPI flash
Florent Kermarrec [Mon, 11 May 2020 20:39:17 +0000 (22:39 +0200)]
soc: remove with_wishbone (a SoC always always has a Bus) and expose more bus parameters.
Arnaud Durand [Mon, 11 May 2020 20:12:40 +0000 (22:12 +0200)]
Enable 1x mode on SPI flash
Florent Kermarrec [Mon, 11 May 2020 08:50:25 +0000 (10:50 +0200)]
build/lattice/diamond/clock_constraints: review and improve similarities with the others build backends.
enjoy-digital [Mon, 11 May 2020 07:55:52 +0000 (09:55 +0200)]
Merge pull request #502 from shuffle2/master
diamond: project generation improvements
enjoy-digital [Mon, 11 May 2020 07:42:55 +0000 (09:42 +0200)]
Merge pull request #490 from daveshah1/rdimm_bside_init
Add RDIMM side-B inversion support
enjoy-digital [Mon, 11 May 2020 07:42:35 +0000 (09:42 +0200)]
Merge branch 'master' into rdimm_bside_init
Florent Kermarrec [Mon, 11 May 2020 07:33:26 +0000 (09:33 +0200)]
lattice/icestorm: add ignoreloops/seed support (similar to trellis) and icestorm_args.
Florent Kermarrec [Mon, 11 May 2020 07:26:12 +0000 (09:26 +0200)]
lattice/trellis: simplify seed support and add it to trellis_args.
enjoy-digital [Mon, 11 May 2020 07:13:26 +0000 (09:13 +0200)]
Merge pull request #484 from ilya-epifanov/lattice-trellis-toolchain-seed
Can now pass `--seed` to `nextpnr-ecp5` via `TrellisToolchain` `kwargs`
enjoy-digital [Mon, 11 May 2020 06:58:28 +0000 (08:58 +0200)]
Merge pull request #485 from ilya-epifanov/cpu-imac-config-for-vexriscv
Added `imac` config for CPUs …
enjoy-digital [Mon, 11 May 2020 06:58:20 +0000 (08:58 +0200)]
Merge branch 'master' into cpu-imac-config-for-vexriscv
Florent Kermarrec [Mon, 11 May 2020 06:47:34 +0000 (08:47 +0200)]
integration/soc/add_adapter: rename is_master to direction.
enjoy-digital [Mon, 11 May 2020 06:34:03 +0000 (08:34 +0200)]
Merge pull request #504 from sergachev/master
integration/soc: fix add_adapter for slaves
Ilia Sergachev [Sun, 10 May 2020 09:32:34 +0000 (11:32 +0200)]
integration/soc: fix add_adapter for slaves
Benjamin Herrenschmidt [Sat, 9 May 2020 17:43:37 +0000 (19:43 +0200)]
bios: Fix warning on 64-bit
This fixes an incorrect printf format specifier
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
rprinz08 [Sat, 9 May 2020 17:20:32 +0000 (19:20 +0200)]
BIOS boot firmware from SPI with address offset
Shawn Hoffman [Sat, 9 May 2020 09:16:24 +0000 (02:16 -0700)]
diamond: close project when done
Avoids ".recovery file is present" prompt.
Shawn Hoffman [Sat, 9 May 2020 04:00:24 +0000 (21:00 -0700)]
diamond: clock constraint improvements
Specify NET or PORT for freq constraints
Add equivalent timing closure check that diamond ui uses,
and default to asserting check has passed
Florent Kermarrec [Fri, 8 May 2020 20:13:47 +0000 (22:13 +0200)]
core/led: simplify LedChaser (to have the same user interface than GPIOOut).
Florent Kermarrec [Fri, 8 May 2020 11:17:59 +0000 (13:17 +0200)]
cores/led: add LedChaser (now that LiteX is running on FPGA mining boards let's use fancy led blinks :))
Florent Kermarrec [Fri, 8 May 2020 11:15:44 +0000 (13:15 +0200)]
integration/soc: add clock_domain parameter to add_etherbone.
To allow using a sys_clk < 125MHz with a 1Gbps link.
Florent Kermarrec [Fri, 8 May 2020 09:54:51 +0000 (11:54 +0200)]
integration/soc: add add_uartbone method (to add a UARTBone aka UART Wishbone bridge).
Florent Kermarrec [Thu, 7 May 2020 10:11:59 +0000 (12:11 +0200)]
bios/sdram: fix lfsr typo.
enjoy-digital [Thu, 7 May 2020 09:55:58 +0000 (11:55 +0200)]
Merge pull request #500 from mubes/fixups
Fixups
Florent Kermarrec [Thu, 7 May 2020 09:34:26 +0000 (11:34 +0200)]
build/xilinx: add disable_constraints parameter to Platform.add_ip.
When integrate .xci, we don't necessarily want to apply the default timing/loc
constrants generated by Vivado but our custom ones. Setting disable_constraints
to True allow disabling .xdc generated by the IP.
Dave Marples [Thu, 7 May 2020 08:36:41 +0000 (09:36 +0100)]
Merge branch 'master' of https://github.com/enjoy-digital/litex into fixups
Dave Marples [Thu, 7 May 2020 08:26:46 +0000 (09:26 +0100)]
Small fixups to address compiler warnings etc.
Florent Kermarrec [Thu, 7 May 2020 06:21:57 +0000 (08:21 +0200)]
bios/sdram: fix merge typo in lfsr (thanks Benjamin Herrenschmidt).
Benjamin Herrenschmidt [Wed, 6 May 2020 19:54:27 +0000 (21:54 +0200)]
bios/sdram: Use an LFSR to speed up pseudo-random number generation
This speeds up the memory test by an order of magnitude, esp. on
cores without a hardware multiplier by getting rid of the
multiplication in the loop.
The LFSR implementation comes from microwatt's simple_random test
project.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
enjoy-digital [Wed, 6 May 2020 16:54:23 +0000 (18:54 +0200)]
Merge pull request #499 from DurandA/patch-2
Add data dirs to manifest
Florent Kermarrec [Wed, 6 May 2020 14:16:41 +0000 (16:16 +0200)]
boards/platforms: update xilinx programmers.
Florent Kermarrec [Wed, 6 May 2020 11:13:01 +0000 (13:13 +0200)]
build/xilinx/vivado: ensure Vivado process our .xdc early.
When generating the LitePCIe PHY wrappers from the .xci, Vivado is locking the
PCIe lanes to default locations that do not necessarily match the ones used in
the design.
Processing our constraints earlier makes Vivado use our constraints and not the
ones from the generated wrapper.
Arnaud Durand [Tue, 5 May 2020 20:15:24 +0000 (22:15 +0200)]
Add data dirs to manifest
Florent Kermarrec [Tue, 5 May 2020 14:58:33 +0000 (16:58 +0200)]
gen/fhdl/verilog: explicitly define input/output/inout wires.
When integrating designs which set `default_nettype none, the top also needs
to explicitly define the type of the signals.
Florent Kermarrec [Tue, 5 May 2020 14:33:14 +0000 (16:33 +0200)]
targets/genesys2: set cmd_latency to 1.
Florent Kermarrec [Tue, 5 May 2020 14:27:21 +0000 (16:27 +0200)]
bios: remove usddrphy debug (we'll use a specific debug firmware to fix the usddrphy corner cases).
Florent Kermarrec [Tue, 5 May 2020 13:55:09 +0000 (15:55 +0200)]
platforms/targets: fix CI.
Florent Kermarrec [Tue, 5 May 2020 13:27:56 +0000 (15:27 +0200)]
boards: keep in sync with LiteX-Boards, integrate improvements.
- create_programmer on all platforms.
- input clocks automatically constrainted.
- build/load parameters.
Florent Kermarrec [Tue, 5 May 2020 11:31:58 +0000 (13:31 +0200)]
build/lattice/programmer: add UJProg (for ULX3S).
Florent Kermarrec [Tue, 5 May 2020 10:17:12 +0000 (12:17 +0200)]
build/lattice/programmer: make OpenOCDJTAGProgrammer closer to OpenOCD programmer.
Florent Kermarrec [Tue, 5 May 2020 10:16:29 +0000 (12:16 +0200)]
build/generic_programmer: catch 404 not found when downloading config/proxy.
Florent Kermarrec [Tue, 5 May 2020 09:23:46 +0000 (11:23 +0200)]
build/platform: allow doing a loose lookup_request (return None instead of ConstraintError) and allow subname in lookup_request.
In the platforms, insead of doing:
self.lookup_request("eth_clocks").rx
we can now do:
self.lookup_request("eth_clocks:rx")
This allows some try/except simplifications on constraints.
Florent Kermarrec [Tue, 5 May 2020 07:56:13 +0000 (09:56 +0200)]
build/openocd: add find_config method to allow using local config file or download it if not available locally.
Florent Kermarrec [Mon, 4 May 2020 15:30:12 +0000 (17:30 +0200)]
cpu/microwatt: fix integration/crt0.S (thanks Benjamin Herrenschmidt).
Tested on Arty A7:
__ _ __ _ __
/ / (_) /____ | |/_/
/ /__/ / __/ -_)> <
/____/_/\__/\__/_/|_|
Build your hardware, easily!
(c) Copyright 2012-2020 Enjoy-Digital
(c) Copyright 2007-2015 M-Labs
BIOS built on May 4 2020 17:15:13
BIOS CRC passed (
0adc4193)
Migen git sha1:
5b5e4fd
LiteX git sha1:
6f24d46d
--=============== SoC ==================--
CPU: Microwatt @ 100MHz
ROM: 32KB
SRAM: 4KB
L2: 8KB
MAIN-RAM: 262144KB
--========== Initialization ============--
Initializing SDRAM...
SDRAM now under software control
Read leveling:
m0, b0: |
00000000000000000000000000000000| delays: -
m0, b1: |
00000000000000000000000000000000| delays: -
m0, b2: |
00000000000000000000000000000000| delays: -
m0, b3: |
00000000000000000000000000000000| delays: -
m0, b4: |
00000000000000000000000000000000| delays: -
m0, b5: |
00000000000000000000000000000000| delays: -
m0, b6: |
00000111111111111100000000000000| delays: 11+-06
m0, b7: |
00000000000000000000000000000000| delays: -
best: m0, b6 delays: 11+-06
m1, b0: |
00000000000000000000000000000000| delays: -
m1, b1: |
00000000000000000000000000000000| delays: -
m1, b2: |
00000000000000000000000000000000| delays: -
m1, b3: |
00000000000000000000000000000000| delays: -
m1, b4: |
00000000000000000000000000000000| delays: -
m1, b5: |
10000000000000000000000000000000| delays: 00+-00
m1, b6: |
00000011111111111100000000000000| delays: 12+-06
m1, b7: |
00000000000000000000000000000000| delays: -
best: m1, b6 delays: 12+-06
SDRAM now under hardware control
Memtest OK
Memspeed Writes: 129Mbps Reads: 215Mbps
--============== Boot ==================--
Booting from serial...
Press Q or ESC to abort boot completely.
sL5DdSMmkekro
Timeout
No boot medium found
--============= Console ================--
litex>
enjoy-digital [Mon, 4 May 2020 13:29:05 +0000 (15:29 +0200)]
Merge pull request #496 from gsomlo/gls-fix-makefiles
software/*/Makefile: no need to copy .S files from CPU directory
Gabriel Somlo [Mon, 4 May 2020 13:13:32 +0000 (09:13 -0400)]
software/*/Makefile: no need to copy .S files from CPU directory
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
enjoy-digital [Mon, 4 May 2020 09:53:10 +0000 (11:53 +0200)]
Merge pull request #494 from shuffle2/patch-2
diamond: quiet warning about missing clkin freq for EHXPLLL
shuffle2 [Mon, 4 May 2020 08:10:09 +0000 (01:10 -0700)]
diamond: quiet warning about missing clkin freq for EHXPLLL
FREQUENCY_PIN_CLKI should be given in mhz
Florent Kermarrec [Mon, 4 May 2020 07:59:01 +0000 (09:59 +0200)]
CHANGES: update.
Florent Kermarrec [Mon, 4 May 2020 06:51:38 +0000 (08:51 +0200)]
cpu/microwatt: add powerpc64le-linux-gnu to gcc_triple.
It seems to be what most distros cross-comiplers are using.
Florent Kermarrec [Mon, 4 May 2020 06:46:25 +0000 (08:46 +0200)]
cpu/microwatt: add pythondata and fix build with it.
Florent Kermarrec [Sun, 3 May 2020 19:29:54 +0000 (21:29 +0200)]
cpus: use a common definition of gcc_triple for the RISC-V CPUs, reorganize CPU by ISA/Data-Width.
Florent Kermarrec [Sun, 3 May 2020 08:54:35 +0000 (10:54 +0200)]
bios/cmd_mdio.c: fix missing <base/mdio.h> import.
Florent Kermarrec [Sat, 2 May 2020 18:07:52 +0000 (20:07 +0200)]
cpu/vexriscv: fix flush_cpu_icache, remove workaround on boot.c.
Florent Kermarrec [Sat, 2 May 2020 10:04:46 +0000 (12:04 +0200)]
cpus: add nop instruction and use it to simplify the BIOS.
Florent Kermarrec [Sat, 2 May 2020 09:52:58 +0000 (11:52 +0200)]
cpus: add human_name attribute and use it to simplify the BIOS.
Florent Kermarrec [Sat, 2 May 2020 09:02:51 +0000 (11:02 +0200)]
software/libbase/system.c: remove unused includes.
enjoy-digital [Sat, 2 May 2020 09:25:34 +0000 (11:25 +0200)]
Merge pull request #492 from scanakci/blackparrot_litex
BP -> Linux simulation, Comply with pythondata, and README update
enjoy-digital [Sat, 2 May 2020 09:16:33 +0000 (11:16 +0200)]
Merge branch 'master' into blackparrot_litex
enjoy-digital [Sat, 2 May 2020 08:45:12 +0000 (10:45 +0200)]
Merge pull request #474 from fjullien/term_hist_auto_compl
Terminal: add history and auto completion
Sadullah Canakci [Sat, 2 May 2020 04:10:06 +0000 (00:10 -0400)]
Update README.md
sadullah [Sat, 2 May 2020 03:44:20 +0000 (23:44 -0400)]
update to comply with python-data layout
sadullah [Fri, 1 May 2020 03:02:32 +0000 (23:02 -0400)]
BP fpga recent version
sadullah [Fri, 1 May 2020 02:39:05 +0000 (22:39 -0400)]
Fix memory transducer bug, --with-sdram for BIOS works, memspeed works
sadullah [Tue, 28 Apr 2020 03:56:51 +0000 (23:56 -0400)]
rebased, minor changes in core.py
sadullah [Tue, 28 Apr 2020 03:03:36 +0000 (23:03 -0400)]
Linux works, LiteDRAM works (need cleaning, temporary push)
Sadullah Canakci [Tue, 10 Mar 2020 20:47:26 +0000 (16:47 -0400)]
Create GETTING STARTED
Rename GETTING STARTED to GETTING STARTED.md
Update GETTING STARTED.md
Update GETTING STARTED.md
Update GETTING STARTED.md
enjoy-digital [Fri, 1 May 2020 19:18:09 +0000 (21:18 +0200)]
Merge pull request #483 from ilya-epifanov/lattice-openocd-jtag-programmer-erase-flag-and-quiet-output
Lattice OpenOCD JTAG programmer: removed erase flag and made progress output less noisy
enjoy-digital [Fri, 1 May 2020 19:17:38 +0000 (21:17 +0200)]
Merge pull request #491 from gsomlo/gls-spisd-clusters
software: spisdcard: cosmetic: avoid filling screen with cluster numbers
Florent Kermarrec [Fri, 1 May 2020 19:13:12 +0000 (21:13 +0200)]
.travis.yml: disable python3.5 test (nMigen requires 3.6+).
As discussed in #479.
Florent Kermarrec [Fri, 1 May 2020 18:13:05 +0000 (20:13 +0200)]
CHANGES: update.
Florent Kermarrec [Fri, 1 May 2020 18:12:02 +0000 (20:12 +0200)]
cpu/minerva: add pythondata and use it to compile the sources.
Florent Kermarrec [Fri, 1 May 2020 17:09:32 +0000 (19:09 +0200)]
litex_setup: add nmigen dependency (used to generate Minerva CPU).
This also requires Yosys, but Yosys is already expected to be installed separately.
Florent Kermarrec [Fri, 1 May 2020 17:07:43 +0000 (19:07 +0200)]
CHANGES: start listing changes for next release.
Gabriel Somlo [Fri, 1 May 2020 13:45:42 +0000 (09:45 -0400)]
software: spisdcard: cosmetic: avoid filling screen with cluster numbers
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Florent Kermarrec [Fri, 1 May 2020 10:35:12 +0000 (12:35 +0200)]
cpu/software: move flush_cpu_icache/flush_cpu_dcache functions to CPUs.
Franck Jullien [Wed, 29 Apr 2020 19:57:13 +0000 (21:57 +0200)]
bios: add auto completion for commands
Franck Jullien [Wed, 29 Apr 2020 19:33:51 +0000 (21:33 +0200)]
bios: switch command handler to a modular format
Command are now described with a structure. A pointer to this
structure is placed in a dedicated linker section.
Franck Jullien [Tue, 28 Apr 2020 21:15:04 +0000 (23:15 +0200)]
bios: move helper functions to their own file
Franck Jullien [Tue, 28 Apr 2020 21:03:18 +0000 (23:03 +0200)]
bios: add terminal history
Terminal history and characters parsing is done in readline.c.
Passing TERM_NO_HIST disable terminal history.
Passing TERM_MINI use a simple terminal implementation in order to save
more space.
Franck Jullien [Mon, 27 Apr 2020 19:52:36 +0000 (21:52 +0200)]
builder: add a parameter to pass options to BIOS Makefile
Florent Kermarrec [Fri, 1 May 2020 06:15:17 +0000 (08:15 +0200)]
cpu/software: move CPU specific software from the BIOS to the CPU directories.
This simplifies the integration of the CPUs' software, avoid complex switches in the code,
and is a first step to make CPUs fully pluggable.
The CPU name is no longer present in the crt0 files (for example crt0-vexriscv-ctr.o
becomes crt0-ctr.o) so users building firmwares externally will have to update their
Makefiles to remove the $(CPU) from crt0-$(CPU)-ctr.o.
Florent Kermarrec [Fri, 1 May 2020 09:01:50 +0000 (11:01 +0200)]
cpu/Minerva: Clone the repository locally for now, we need to create a pythondata repository.
Florent Kermarrec [Thu, 30 Apr 2020 19:45:53 +0000 (21:45 +0200)]
integration/soc: rename usb_cdc to usb_acm.
As discussed on Discord recently.
Florent Kermarrec [Thu, 30 Apr 2020 19:31:58 +0000 (21:31 +0200)]
litex/__init__.py: remove retro-compat > 6 months old.
Florent Kermarrec [Wed, 29 Apr 2020 18:11:47 +0000 (20:11 +0200)]
soc: allow passing custom CPU class to SoC.
Useful to experiment with custom CPU wrappers and a first step to make CPUs plugable.
David Shah [Tue, 28 Apr 2020 14:14:27 +0000 (15:14 +0100)]
Add RDIMM side-B inversion support
Signed-off-by: David Shah <dave@ds0.me>
enjoy-digital [Wed, 29 Apr 2020 06:48:06 +0000 (08:48 +0200)]
Merge pull request #488 from enjoy-digital/python3.5
travis: add back test on python3.5 (python3.6 is recommended but we c…
Florent Kermarrec [Wed, 29 Apr 2020 06:00:55 +0000 (08:00 +0200)]
travis: add back test on python3.5 (python3.6 is recommended but we can try to keep 3.5 compatibility until we have good reason to no longer support it).