Sebastien Bourdeauducq [Tue, 9 Oct 2012 19:11:26 +0000 (21:11 +0200)]
framebuffer: use new SingleGenerator
Sebastien Bourdeauducq [Tue, 9 Oct 2012 19:11:15 +0000 (21:11 +0200)]
actorlib/spi: SingleGenerator
Sebastien Bourdeauducq [Tue, 9 Oct 2012 17:08:37 +0000 (19:08 +0200)]
Remove uses of the RE signal on field registers
Sebastien Bourdeauducq [Tue, 9 Oct 2012 17:08:09 +0000 (19:08 +0200)]
actorlib/spi/collector: atomic update for write_count
Sebastien Bourdeauducq [Tue, 9 Oct 2012 17:07:53 +0000 (19:07 +0200)]
bank: remove RE signal for field registers
Sebastien Bourdeauducq [Mon, 8 Oct 2012 16:43:18 +0000 (18:43 +0200)]
bank: support for atomic writes
Sebastien Bourdeauducq [Thu, 4 Oct 2012 18:10:24 +0000 (20:10 +0200)]
actorlib/spi: fix memory port we/wd
Sebastien Bourdeauducq [Thu, 4 Oct 2012 16:22:22 +0000 (18:22 +0200)]
flow/actorlib: Simple Processor Interface (WIP)
Sebastien Bourdeauducq [Fri, 28 Sep 2012 16:02:03 +0000 (18:02 +0200)]
fhdl: fix instance get_io
Florent Kermarrec [Wed, 26 Sep 2012 21:05:38 +0000 (23:05 +0200)]
start MigLa Doc
Sebastien Bourdeauducq [Sat, 22 Sep 2012 18:51:10 +0000 (20:51 +0200)]
fhdl: support expressions in instance ports
Sebastien Bourdeauducq [Sat, 22 Sep 2012 18:50:49 +0000 (20:50 +0200)]
fhdl: support inverted clock ports in instances
Florent Kermarrec [Tue, 18 Sep 2012 21:09:21 +0000 (23:09 +0200)]
update schematics
Florent Kermarrec [Tue, 18 Sep 2012 14:21:32 +0000 (16:21 +0200)]
update doc
Florent Kermarrec [Mon, 17 Sep 2012 22:22:52 +0000 (00:22 +0200)]
add Setup.py / .gitignore
start documentation
Florent Kermarrec [Mon, 17 Sep 2012 18:15:35 +0000 (20:15 +0200)]
add test_MigLa_1 example : csr access analyzing
Florent Kermarrec [Mon, 17 Sep 2012 16:37:23 +0000 (18:37 +0200)]
-add mask on Term
Florent Kermarrec [Mon, 17 Sep 2012 15:27:50 +0000 (17:27 +0200)]
improve truthtable tool
Florent Kermarrec [Mon, 17 Sep 2012 15:00:47 +0000 (17:00 +0200)]
new MigLa Class, simplify & clean up
Florent Kermarrec [Mon, 17 Sep 2012 13:27:37 +0000 (15:27 +0200)]
use of new migen clock_domains convention
Florent Kermarrec [Sun, 16 Sep 2012 09:51:03 +0000 (11:51 +0200)]
update README
Florent Kermarrec [Sun, 16 Sep 2012 09:49:16 +0000 (11:49 +0200)]
add ramp / square / sinus signal generation in examples
Florent Kermarrec [Sun, 16 Sep 2012 09:48:32 +0000 (11:48 +0200)]
simplify recorder
Florent Kermarrec [Sat, 15 Sep 2012 20:29:50 +0000 (22:29 +0200)]
examples/de1 : add ramp / square mode
Florent Kermarrec [Sat, 15 Sep 2012 18:22:02 +0000 (20:22 +0200)]
fix bug put_ptr on start, separate put / get processes
Florent Kermarrec [Sat, 15 Sep 2012 18:13:18 +0000 (20:13 +0200)]
remove buggy workaround on read
Florent Kermarrec [Fri, 14 Sep 2012 22:57:52 +0000 (00:57 +0200)]
fixes & clean up
Florent Kermarrec [Fri, 14 Sep 2012 12:08:20 +0000 (14:08 +0200)]
add test_MigLa.py (Wip)
fixes
Florent Kermarrec [Fri, 14 Sep 2012 10:57:09 +0000 (12:57 +0200)]
add access methods
Florent Kermarrec [Fri, 14 Sep 2012 10:26:48 +0000 (12:26 +0200)]
migScope/tools/truthtable.py: add function to remove duplicate operands
Florent Kermarrec [Thu, 13 Sep 2012 11:18:03 +0000 (13:18 +0200)]
add test_MigIo.py for de0_nano and de1 example
Florent Kermarrec [Thu, 13 Sep 2012 11:15:05 +0000 (13:15 +0200)]
fix write function
Florent Kermarrec [Thu, 13 Sep 2012 11:14:27 +0000 (13:14 +0200)]
add address parameter to migIo
Florent Kermarrec [Thu, 13 Sep 2012 09:34:19 +0000 (11:34 +0200)]
add spi2Csr tools : Python Host & Arduino Uart<-->Spi bridge
Florent Kermarrec [Wed, 12 Sep 2012 20:20:07 +0000 (22:20 +0200)]
examples/de1: use of MigIo
Florent Kermarrec [Wed, 12 Sep 2012 20:19:42 +0000 (22:19 +0200)]
add MigIo Class
Florent Kermarrec [Wed, 12 Sep 2012 16:09:12 +0000 (18:09 +0200)]
update README
Florent Kermarrec [Wed, 12 Sep 2012 16:07:36 +0000 (18:07 +0200)]
examples/de1: fix top
Florent Kermarrec [Wed, 12 Sep 2012 15:56:36 +0000 (17:56 +0200)]
initialize de1 example
Florent Kermarrec [Wed, 12 Sep 2012 14:28:52 +0000 (16:28 +0200)]
examples/de0_nano : add load cmd / change rst polarity
Sebastien Bourdeauducq [Tue, 11 Sep 2012 08:00:03 +0000 (10:00 +0200)]
fhdl/verilog: sort clock domains by name
Sebastien Bourdeauducq [Tue, 11 Sep 2012 07:59:37 +0000 (09:59 +0200)]
fhdl: list signals in execution order
Sebastien Bourdeauducq [Mon, 10 Sep 2012 22:21:07 +0000 (00:21 +0200)]
Define clock domains instead of passing extra clocks as regular signals
Sebastien Bourdeauducq [Mon, 10 Sep 2012 22:09:11 +0000 (00:09 +0200)]
Merge branch 'master' of github.com:milkymist/migen
Sebastien Bourdeauducq [Mon, 10 Sep 2012 21:47:06 +0000 (23:47 +0200)]
Basic support for new clock domain and instance API
Sebastien Bourdeauducq [Mon, 10 Sep 2012 21:46:19 +0000 (23:46 +0200)]
examples: demonstrate multi-clock support
Sebastien Bourdeauducq [Mon, 10 Sep 2012 21:45:27 +0000 (23:45 +0200)]
examples: update LM32 instance
Sebastien Bourdeauducq [Mon, 10 Sep 2012 21:45:02 +0000 (23:45 +0200)]
Multi-clock design support + new instance API
Florent Kermarrec [Sun, 9 Sep 2012 21:46:26 +0000 (23:46 +0200)]
Clean up
Florent Kermarrec [Sun, 9 Sep 2012 21:27:51 +0000 (23:27 +0200)]
Wip de0_nano example
Florent Kermarrec [Sun, 9 Sep 2012 20:32:09 +0000 (22:32 +0200)]
Wip de0_nano example
Florent Kermarrec [Sun, 9 Sep 2012 19:18:09 +0000 (21:18 +0200)]
Initialize de0_nano example
Florent Kermarrec [Sun, 9 Sep 2012 18:51:15 +0000 (20:51 +0200)]
Clean up
Florent Kermarrec [Sun, 9 Sep 2012 18:38:01 +0000 (20:38 +0200)]
add global tb, fix bugs
Sebastien Bourdeauducq [Sun, 9 Sep 2012 17:56:04 +0000 (19:56 +0200)]
setup.py: cosmetic
Sébastien Bourdeauducq [Sun, 9 Sep 2012 17:52:52 +0000 (10:52 -0700)]
Merge pull request #3 from brandonhamilton/upstream
Optionally accept iverilog simulator options
Sebastien Bourdeauducq [Sun, 9 Sep 2012 17:34:46 +0000 (19:34 +0200)]
examples: new namer
Sebastien Bourdeauducq [Sun, 9 Sep 2012 17:33:55 +0000 (19:33 +0200)]
fhdl/namer: better handling of indices
Sebastien Bourdeauducq [Sun, 9 Sep 2012 16:53:24 +0000 (18:53 +0200)]
fhdl/tracer: support BUILD_LIST opcode
Sebastien Bourdeauducq [Sun, 9 Sep 2012 15:31:35 +0000 (17:31 +0200)]
fhdl/namer: use execution order indices for variable names as well
Florent Kermarrec [Sun, 9 Sep 2012 12:37:55 +0000 (14:37 +0200)]
simplify registers mgnt
Sebastien Bourdeauducq [Sun, 9 Sep 2012 10:27:32 +0000 (12:27 +0200)]
fhdl/namer: number objects according to execution order
Sebastien Bourdeauducq [Sat, 8 Sep 2012 23:26:33 +0000 (01:26 +0200)]
fhdl/namer: simplify + more relevant names
Florent Kermarrec [Sun, 26 Aug 2012 22:44:26 +0000 (00:44 +0200)]
add tb_RecorderCsr.py
fixs in recorder.py
Florent Kermarrec [Sun, 26 Aug 2012 19:30:23 +0000 (21:30 +0200)]
split migScope to trigger & recorder
Sebastien Bourdeauducq [Sun, 26 Aug 2012 19:19:34 +0000 (21:19 +0200)]
bus/csr: configurable data width
Florent Kermarrec [Sun, 26 Aug 2012 18:56:56 +0000 (20:56 +0200)]
add vcd generator
Florent Kermarrec [Sun, 26 Aug 2012 13:44:43 +0000 (15:44 +0200)]
tb_TriggerCsr.py : use truth table generator for Sum Lut
Florent Kermarrec [Sun, 26 Aug 2012 13:15:44 +0000 (15:15 +0200)]
add truth table generator
Florent Kermarrec [Sun, 26 Aug 2012 11:03:11 +0000 (13:03 +0200)]
tb_spi2Csr: Add clk_ratio
tb_spi2Csr: Add Read
spi2Csr : fixs
Florent Kermarrec [Sat, 25 Aug 2012 21:29:23 +0000 (23:29 +0200)]
- fix Spi2Csr mistakes
Florent Kermarrec [Sat, 25 Aug 2012 19:53:06 +0000 (21:53 +0200)]
add sim: tb_Spi2Csr.py (skeleton, WIP)
Florent Kermarrec [Sat, 25 Aug 2012 16:46:58 +0000 (18:46 +0200)]
add sim: tb_TriggerCsr.py
Florent Kermarrec [Thu, 23 Aug 2012 22:16:00 +0000 (00:16 +0200)]
use ram for Sum
Florent Kermarrec [Wed, 22 Aug 2012 21:59:00 +0000 (23:59 +0200)]
Add simulation skeleton
Remove SRLC16E, will be replaced by distributed ram
Florent Kermarrec [Sun, 12 Aug 2012 23:02:38 +0000 (01:02 +0200)]
new library spi2Csr (skeleton)
Florent Kermarrec [Sun, 12 Aug 2012 19:17:17 +0000 (21:17 +0200)]
add register interface to Trigger
Florent Kermarrec [Sun, 12 Aug 2012 17:42:25 +0000 (19:42 +0200)]
simplify EdgeDetector
Florent Kermarrec [Sun, 12 Aug 2012 17:39:26 +0000 (19:39 +0200)]
fix masks on EdgeDetector
Florent Kermarrec [Sun, 12 Aug 2012 17:30:27 +0000 (19:30 +0200)]
add Trigger
Sebastien Bourdeauducq [Sun, 12 Aug 2012 16:04:29 +0000 (18:04 +0200)]
doc: ASMI reader
Sebastien Bourdeauducq [Sun, 12 Aug 2012 15:55:29 +0000 (17:55 +0200)]
doc: IntSequence
Florent Kermarrec [Sun, 12 Aug 2012 15:31:15 +0000 (17:31 +0200)]
rename Recorder --> Storage
add Recorder
Florent Kermarrec [Sun, 12 Aug 2012 14:04:52 +0000 (16:04 +0200)]
add simple Sequencer
Florent Kermarrec [Sun, 12 Aug 2012 12:41:17 +0000 (14:41 +0200)]
add Readme
Florent Kermarrec [Sun, 12 Aug 2012 12:38:49 +0000 (14:38 +0200)]
add Readme
Florent Kermarrec [Sun, 12 Aug 2012 12:21:30 +0000 (14:21 +0200)]
- init Repo
Sebastien Bourdeauducq [Wed, 8 Aug 2012 15:30:18 +0000 (17:30 +0200)]
doc: framebuffer example
Sebastien Bourdeauducq [Mon, 6 Aug 2012 17:12:33 +0000 (19:12 +0200)]
doc: arrays
Sebastien Bourdeauducq [Sat, 4 Aug 2012 23:11:37 +0000 (01:11 +0200)]
framebuffer: disable debugger by default
Sebastien Bourdeauducq [Sat, 4 Aug 2012 22:16:11 +0000 (00:16 +0200)]
sim: ensure clean IPC shutdown
Sebastien Bourdeauducq [Sat, 4 Aug 2012 21:39:52 +0000 (23:39 +0200)]
flow/isd: add freeze register
Sebastien Bourdeauducq [Sat, 4 Aug 2012 21:39:29 +0000 (23:39 +0200)]
bios/dataflow: use freeze register
Sebastien Bourdeauducq [Sat, 4 Aug 2012 20:59:21 +0000 (22:59 +0200)]
asmicon: fix and simplify refresh grant logic
Sebastien Bourdeauducq [Sat, 4 Aug 2012 20:49:43 +0000 (22:49 +0200)]
asmicon/bankmachine: respect SDRAM write-to-precharge specification
Sebastien Bourdeauducq [Sat, 4 Aug 2012 15:38:42 +0000 (17:38 +0200)]
asmicon/multiplexer: correct read-to-write delay to prevent conflicts on the tag bus
Sebastien Bourdeauducq [Sat, 4 Aug 2012 14:32:15 +0000 (16:32 +0200)]
bios: asmiprobe command
Because with reordering architectures come order-dependent intermittent bugs.
Sebastien Bourdeauducq [Sat, 4 Aug 2012 14:31:24 +0000 (16:31 +0200)]
Add ASMIprobe core
Sebastien Bourdeauducq [Fri, 3 Aug 2012 20:33:52 +0000 (22:33 +0200)]
asmicon/bankmachine/selector: fix round-robin CE
Sebastien Bourdeauducq [Fri, 3 Aug 2012 20:11:16 +0000 (22:11 +0200)]
asmicon/bankmachine: do not insert buffer when using _SimpleSelector
projects / litex.git / log