7 | PO | BO| BI | BD |AA|LK |
10 |0 |6 |10 |15 |22 |23 |31|
11 | PO | RS | me | sh | me | XO |Rc|
14 |0 |6 |11 |16 |21 |26 |27 31|
15 | PO | RT | RA | RB |bm |L | XO |
18 |0 |6 |9 |12 |15 |18 |21 |29 |31 |
19 | PO | BF | BFA| BFB| BFC| msk| TLI | XO |msk|
22 |0 |6 |11 |16 |20 |27 |30 |31 |
23 | PO | ///| ///| // | LEV | //| 1| / |
26 |0 |6 |9 |10 |11 |16 |31 |
31 | PO | BF | / | L | RA| SI |
32 | PO | BF | / | L | RA| UI |
38 |0 |6 |11 |16 |30 |31 |
39 | PO | RT | RA | DS | XO |
40 | PO | RS | RA | DS | XO |
41 | PO | RSp | RA | DS | XO |
42 | PO | FRTp | RA | DS | XO |
43 | PO | FRSp | RA | DS | XO |
46 |0 |6 |11 |16 |28|29 |31 |
47 | PO | RTp | RA | DQ | PT |
48 | PO | S | RA | DQ |SX| XO |
49 | PO | T | RA | DQ |TX| XO |
53 | PO | RT| d1| d0| XO|d2
54 | PO | FRS| d1| d0| XO|d2
57 |0 |6 |7|8|9 |10 |11|12|13 |15|16|17 |20|21 |31 |
58 | PO | RT | RA | /// | XO | / |
59 | PO | RT | RA | RB | XO | / |
60 | PO | RT | RA | RB | XO |EH |
61 | PO | RT | RA | NB | XO | / |
62 | PO | RT | /|SR | /// | XO | / |
63 | PO | RT | /// | RB | XO | / |
64 | PO | RT | /// | RB | XO | 1 |
65 | PO | RT | /// | /// | XO | / |
66 | PO | RS | RA | RB | XO |Rc |
67 | PO | RT | RA | RB | XO |Rc |
68 | PO | RS | RA | RB | XO | 1 |
69 | PO | RS | RA | RB | XO | / |
70 | PO | RS | RA | NB | XO | / |
71 | PO | RS | RA | SH | XO |Rc |
72 | PO | RS | RA | /// | XO |Rc |
73 | PO | RS | RA | /// | XO | / |
74 | PO | RS | /|SR | /// | XO | / |
75 | PO | RS | /// | RB | XO | / |
76 | PO | RS | /// | /// | XO | / |
77 | PO | RS | /// |L1| /// | XO | / |
78 | PO | TH | RA | RB | XO | / |
79 | PO | BF |/ | L | RA | RB | XO | / |
80 | PO | BF |// | FRA | FRB | XO | / |
81 | PO | BF |// | BFA | // | /// | XO | / |
82 | PO | BF |// | /// |W | U |/ | XO |Rc |
83 | PO | BF |// | /// | /// | XO | / |
84 | PO | TH | RA | RB | XO | / |
85 | PO | /| CT | /// | /// | XO | / |
86 | PO | /| CT | RA | RB | XO | / |
87 | PO | /// | L2 | RA | RB | XO | / |
88 | PO | /// | L2 | /// | RB | XO | / |
89 | PO | /// | L2 | /// | /// | XO | / |
90 | PO | /// | L2 | /| E | /// | XO | / |
91 | PO | TO | RA | RB | XO | / |
92 | PO | FRT | RA | RB | XO | / |
93 | PO | FRT | FRA | FRB | XO | / |
94 | PO | FRTp | RA | RB | XO | / |
95 | PO | FRT | /// | FRB | XO |Rc |
96 | PO | FRT | /// | FRBp | XO |Rc |
97 | PO | FRT | /// | /// | XO |Rc |
98 | PO | FRTp | /// | FRB | XO |Rc |
99 | PO | FRTp | /// | FRBp | XO |Rc |
100 | PO | FRTp | FRA | FRBp | XO |Rc |
101 | PO | FRTp | FRAp | FRBp | XO |Rc |
102 | PO | BF |// | FRA | FRBp | XO | / |
103 | PO | BF |// | FRAp | FRBp | XO | / |
104 | PO | FRT |S | | FRB | XO |Rc |
105 | PO | FRTp |S | | FRBp | XO |Rc |
106 | PO | FRS | RA | RB | XO | / |
107 | PO | FRSp | RA | RB | XO | / |
108 | PO | BT | /// | /// | XO |Rc |
109 | PO | /// | RA | RB | XO | / |
110 | PO | /// | /// | RB | XO | / |
111 | PO | /// | /// | /// | XO | / |
112 | PO | /// | /// | E|/// | XO | / |
113 | PO | //|IH | /// | /// | XO | / |
114 | PO | A|// | /// | /// | XO | 1 |
115 | PO | A|// |R | /// | /// | XO | 1 |
116 | PO | /// | RA | RB | XO | 1 |
117 | PO | /// |WC | /// | /// | XO | / |
118 | PO | /// |T | RA | RB | XO | / |
119 | PO | VRT | RA | RB | XO | / |
120 | PO | VRS | RA | RB | XO | / |
121 | PO | MO | /// | /// | XO | / |
122 | PO | RT | /// |L3 | /// | XO | / |
125 |0 |6 |9 |11 |14 |16 |19|20|21 |31 |
126 | PO | BT | BA | BB | XO | / |
127 | PO | BO | BI | /// |BH | XO |LK |
128 | PO | | /// |S | XO | / |
129 | PO | BF |// |BFA |// | /// | XO | / |
130 | PO | /// | XO | / |
134 |0 |6 |11|12 |20|21 |31 |
135 | PO | RT | spr | XO | / |
136 | PO | RT | tbr | XO | / |
137 | PO | RT |0 | /// | XO | / |
138 | PO | RT |1 | FXM |/ | XO | / |
139 | PO | RT | dcr | XO | / |
140 | PO | RT | pmrn | XO | / |
141 | PO | RT | BHRBE | XO | / |
142 | PO | DUI | DUIS | XO | / |
143 | PO | RS |0 | FXM |/ | XO | / |
144 | PO | RS |1 | FXM |/ | XO | / |
145 | PO | RS | spr | XO | / |
146 | PO | RS | dcr | XO | / |
147 | PO | RS | pmrn | XO | / |
150 |0 |6|7 |15|16 |21 |31 |
151 | PO |L| FLM |W |FRB | XO |Rc |
154 |0 |6 |11 |16 |21 |31 |
155 | PO | T | RA | RB | XO |TX |
156 | PO | S | RA | RB | XO |SX |
159 |0 |6 |9 |11 |14 |16 |21 |30|31 |
160 | PO | T | /// | B |XO |BX|TX |
161 | PO | T | /// |UIM | B |XO |BX|TX |
162 | PO | BF | //| /// | B |XO |BX| / |
165 |0 |6 |9 |11 |16 |21 |22 |24 |29|30|31 |
166 | PO | T | A | B | XO |AX|BX|TX |
167 | PO | T | A | B |Rc | XO |AX|BX|TX |
168 | PO | BF | // | A | B | XO |AX|BX|/ |
169 | PO | T | A | B |XO |SHW | XO |AX|BX|TX |
170 | PO | T | A | B |XO |DM | XO |AX|BX|TX |
173 |0 |6 |11 |16 |21 |26 |28|29 |30|31 |
174 | PO | T | A | B | C | XO |CX|AX |BX|TX |
177 |0 |6 |11 |16 |21 |30|31 |
178 | PO | RS | RA | sh | XO |sh|Rc |
181 |0 |6 |11 |16 |22 |31 |
182 | PO | RT | RA | XBI | XO |Rc |
185 |0 |6 |11 |16 |21 |22 |31 |
186 | PO | RT| RA| RB |OE | XO |Rc |
187 | PO | RT| RA| RB | /| XO |Rc |
188 | PO | RT| RA| RB | /| XO | / |
189 | PO | RT| RA| /// |OE | XO |Rc |
192 |0 |6 |11 |16 |21 |26 |31 |
193 | PO | FRT | FRA | FRB | FRC | XO |Rc |
194 | PO | FRT | FRA | FRB | /// | XO |Rc |
195 | PO | FRT | FRA | /// | FRC | XO |Rc |
196 | PO | FRT | /// | FRB | /// | XO |Rc |
197 | PO | RT | RA | RB | BC | XO | /|
200 |0 |6 |11 |16 |21 |26 |31|
201 | PO | RS | RA | RB | MB | ME |Rc|
202 | PO | RS | RA | SH | MB | ME |Rc|
205 |0 |6 |11 |16 |21 |27|30|31|
206 | PO | RS | RA | sh | mb |XO|sh|Rc|
207 | PO | RS | RA | sh | me |XO|sh|Rc|
210 |0 |6 |11 |16 |21 |27 |31|
211 | PO | RS | RA | RB | mb | XO |Rc|
212 | PO | RS | RA | RB | me | XO |Rc|
215 |0 |6 |11 |16 |21|22 |25|26 |31|
216 | PO | RT | RA | RB | RC | XO |
217 | PO | VRT | VRA | VRB | VRC | XO |
218 | PO | VRT | VRA | VRB | /|SHB | XO |
219 | PO | VRT | VRA | VRB | /|BFA|/ | XO |
222 |0 |6 |11 |16 |21 |24|26 |31|
223 | PO | RT | RA | RB | RC | XO |Rc|
226 |0 |6 |11 |16 |21|22 |31|
227 | PO | VRT | VRA | VRB |Rc| XO |
230 |0 |6 |11 |16 |21 |31|
231 | PO | VRT | VRA | VRB | XO |
232 | PO | VRT | /// | VRB | XO |
233 | PO | VRT | UIM | VRB | XO |
234 | PO | VRT | / UIM | VRB | XO |
235 | PO | VRT | // UIM | VRB | XO |
236 | PO | VRT | /// UIM | VRB | XO |
237 | PO | VRT | SIM | ///| XO |
238 | PO | VRT | ///| | XO |
239 | PO | |/// | VRB | XO |
242 |0 |6 |9 |11 |16 |21 |31|
243 | PO | RS | RA | RB | XO |
244 | PO | RS | RA | UI | XO |
245 | PO | RT | ///| RB | XO |
246 | PO | RT | RA | RB | XO |
247 | PO | RT | RA | ///| XO |
248 | PO | RT | UI | RB | XO |
249 | PO | BF|//| RA | RB | XO |
250 | PO | RT | RA | UI | XO |
251 | PO | RT | SI | ///| XO |
254 |0 |6 |11 |16 |21 |29 |31 |
255 | PO | RT| RA | RB | XO |BFA |
258 |0 |6 |9 |11 |16 |22 |31 |
259 | PO | BF|//| FRA | DCM | XO | / |
260 | PO | BF|//| FRAp | DCM | XO | / |
261 | PO | BF|//| FRA | DGM | XO | / |
262 | PO | BF|//| FRAp | DGM | XO | / |
263 | PO | FRT | FRA | SH | XO |Rc |
264 | PO | FRTp| FRAp | SH | XO |Rc |
267 |0 |6 |11 |15 |16 |21 |23 |31 |
268 | PO | FRT | TE | FRB |RMC| XO |Rc |
269 | PO | FRTp| TE | FRBp |RMC| XO |Rc |
270 | PO | FRT | FRA | FRB |RMC| XO |Rc |
271 | PO | FRTp| FRA | FRBp |RMC| XO |Rc |
272 | PO | FRTp| FRAp | FRBp |RMC| XO |Rc |
273 | PO | FRT | /// | R | FRB |RMC| XO |Rc |
274 | PO | FRTp| /// | R | FRBp |RMC| XO |Rc |
277 |0 |6 |11 |16 |21 |23|24|25|26 31|
278 | PO | SVG|rmm | SVd |ew |yx|mm|sk| XO |
281 |0 |6 |11 |16 |23 |24 |25 |26 |31 |
282 | PO | RT | RA | SVi |ms |vs |vf | XO |Rc |
283 | PO | RT | / | SVi |/ |/ |vf | XO |Rc |
287 | PO | SCi | SCm | SCimm |
291 | PO | SCi | SCm | SRbr | SRimm |
294 |0 |6 |11 |16 |21 |31 |
295 | PO | RT | RA| RC | SVD |
296 | PO | RS | RA| RC | SVD |
297 | PO | FRT | RA| RC | SVD |
298 | PO | FRS | RA| RC | SVD |
301 |0 |6 |11 |16 |21 |30 |31 |
302 | PO | RT | RA | RC | SVDS | XO |
303 | PO | RS | RA | RC | SVDS | XO |
306 |0 |6 |11 |16 |21 |25 |26 |31 |
307 | PO | SVxd | SVyd | SVzd | SVrm |vf | XO |
310 |0 |6 |11 |13 |15 |17 |19 |21 |22 |26 |31 |
311 | PO | SVme |mi0 | mi1 | mi2 | mo0 | mo1 |pst |/// | XO |
314 |0 |6 |11 |16 |21 |29 |31 |
315 | PO | RT | RA | RB | TLI | XO |Rc |
316 | PO | RT | RA | RB | TLI | XO |L |
318 # 1.6.28 Instruction Fields
320 Field used by the tbegin. instruction to specify an
321 implementation-specific function.
322 Field used by the tend. instruction to specify the
323 completion of the outer transaction and all nested
328 0 The immediate field represents an address
329 relative to the current instruction address. For
330 I-form branches the effective address of the
331 branch target is the sum of the LI field
332 sign-extended to 64 bits and the address of
333 the branch instruction. For B-form branches
334 the effective address of the branch target is
335 the sum of the BD field sign-extended to 64
336 bits and the address of the branch instruction.
337 1 The immediate field represents an absolute
338 address. For I-form branches the effective
339 address of the branch target is the LI field
340 sign-extended to 64 bits. For B-form branches
341 the effective address of the branch target is
342 the BD field sign-extended to 64 bits.
345 Fields that are concatenated to specify a VSR to
349 Field used to specify a bit in the CR to be used as
353 Field used to specify a bit in the CR to be used as
357 Field used to specify a bit in the CR to be used as
361 Immediate field used to specify a 14-bit signed
362 two's complement branch displacement which is
363 concatenated on the right with 0b00 and
364 sign-extended to 64 bits.
367 Field used to specify one of the CR fields or one of
368 the FPSCR fields to be used as a target.
369 Formats: D, X, XL, XX2, XX3, Z22
371 Field used to specify one of the CR fields
372 to be used as a source.
375 Field used to specify one of the CR fields or one of
376 the FPSCR fields to be used as a source.
379 Field used to specify one of the CR fields or one of
380 the FPSCR fields to be used as a source.
383 Field used to specify a hint in the Branch Condi-
384 tional to Link Register and Branch Conditional to
385 Count Register instructions. The encoding is
386 described in Section 2.4, 'Branch Instructions'.
389 Field used to identify the BHRB entry to be used
390 as a source by the Move From Branch History
391 Rolling Buffer instruction.
394 Field used to specify a bit in the CR to be tested by
395 a Branch Conditional instruction.
398 Field used to specify the Bit-mask Mode for bmask
401 Field used to specify options for the Branch Condi-
402 tional instructions. The encoding is described in
403 Section 2.4, 'Branch Instructions'.
404 Formats: B, XL, X, XL
406 Field used to specify a bit in the CR or in the
407 FPSCR to be used as a target.
410 Fields that are concatenated to specify a VSR to
412 Formats: XX2, XX3, XX4
414 Field used in X-form instructions to specify a cache
415 target (see Section 4.3.2 of Book II).
418 Fields that are concatenated to specify a VSR to
422 Immediate field used to specify a 16-bit signed
423 two's complement integer which is sign-extended
426 d0,d1,d2 (16:25,11:15,31)
427 Immediate fields that are concatenated to specify a
428 16-bit signed two's complement integer which is
429 sign-extended to 64 bits.
431 dc,dm,dx (25,29,11:15)
432 Immediate fields that are concatenated to specify
436 Immediate field used to specify Data Class Mask.
439 Immediate field used to specify Data Class Mask.
442 Immediate field used as the Data Group Mask.
445 Immediate field used by xxpermdi instruction as
446 doubleword permute control.
449 Immediate operand field used to specify new deci-
450 mal floating-point rounding mode.
453 Field used by the dnh instruction (see Book III-E).
456 Field used by the dnh instruction (see Book III-E).
459 Immediate field used to specify a 12-bit signed
460 two's complement integer which is concatenated
461 on the right with 0b0000 and sign-extended to 64
465 Immediate field used to specify a 14-bit signed
466 two's complement integer which is concatenated
467 on the right with 0b00 and sign-extended to 64 bits.
470 Field used by the Write MSR External Enable
471 instruction (see Book III-E).
474 Field used to specify the access types ordered by
475 an Elemental Memory Barrier type of sync instruc-
478 Field used to specify a hint in the Load and
479 Reserve instructions. The meaning is described in
480 Section 4.6.2, 'Load and Reserve and Store Con-
481 ditional Instructions', in Book II.
484 Expanded opcode field
487 Expanded opcode field
490 Field used to specify Inexact form of round to
491 quad-precision integer.
494 Field used to specify the element width for SVI-Form
497 Field used to specify the function code in Load/
498 Store Atomic instructions.
501 Field mask used to identify the FPSCR fields that
502 are to be updated by the mtfsf instruction.
505 Field used to specify a FPR to be used as a
507 Formats: A, X, Z22, Z23
509 Field used to specify an even/odd pair of FPRs to
510 be concatenated and used as a source.
513 Field used to specify an FPR to be used as a
515 Formats: A, X, XFL, Z23
517 Field used to specify an even/odd pair of FPRs to
518 be concatenated and used as a source.
521 Field used to specify an FPR to be used as a
525 Field used to specify an FPR to be used as a
529 Field used to specify an even/odd pair of FPRs to
530 be concatenated and used as a source.
533 Field used to specify an FPR to be used as a tar-
535 Formats: A, D, X, Z22, Z23
537 Field used to specify an even/odd pair of FPRs to
538 be concatenated and used as a target.
539 Formats: DS, X, Z22, Z23
541 Field mask used to identify the CR fields that are to
542 be written by the mtcrf and mtocrf instructions, or
543 read by the mfocrf instruction.
546 Immediate field used to specify a 5-bit signed inte-
550 Field used to specify a hint in the SLB Invalidate
551 All instruction. The meaning is described in
552 Section 5.9.3.2, 'SLB Management Instructions',
556 Immediate field used to specify an 8-bit integer.
559 Immediate field used to specify a 5-bit signed inte-
563 Field used to specify whether the mtfsf instruction
564 updates the entire FPSCR.
567 Field used by the Data Cache Block Flush instruc-
568 tion (see Section 4.3.2 of Book II) and also by the
569 Synchronize instruction (see Section 4.6.3 of Book
573 Field used to specify whether a fixed-point Com-
574 pare instruction is to compare 64-bit numbers or
576 Field used by the Compare Range Byte instruction
577 to indicate whether to compare against 1 or 2
581 Field used by the Move To Machine State Register
582 instruction (see Book III).
583 Field used by the SLB Move From Entry VSID and
584 SLB Move From Entry ESID instructions for imple-
585 mentation-specific purposes.
588 Field used by the Deliver A Random Number
589 instruction (see Section 3.3.9, 'Fixed-Point Arith-
590 metic Instructions') to choose the random number
594 Field used to specify whether mask-in occurs in bmask
597 Field used to specify whether the grevlut instruction
598 updates the whole GPR or the first half.
601 Field used by the System Call instructions.
604 Immediate field used to specify a 24-bit signed
605 two's complement integer which is concatenated
606 on the right with 0b00 and sign-extended to 64
611 0 Do not set the Link Register.
612 1 Set the Link Register. The address of the
613 instruction following the Branch instruction is
614 placed into the Link Register.
617 Field used to specify a REMAP shape for SVI-Form
620 Field used in M-form instructions to specify the first
621 1-bit of a 64-bit mask, as described in
622 Section 3.3.14, 'Fixed-Point Rotate and Shift
623 Instructions' on page 101.
626 Field used in MD-form and MDS-form instructions
627 to specify the first 1-bit of a 64-bit mask, as
628 described in Section 3.3.14, 'Fixed-Point Rotate
629 and Shift Instructions' on page 101.
632 Field used in MD-form and MDS-form instructions
633 to specify the last 1-bit of a 64-bit mask, as
634 described in Section 3.3.14, 'Fixed-Point Rotate
635 and Shift Instructions' on page 101.
638 Field used in M-form instructions to specify the last
639 1-bit of a 64-bit mask, as described in
640 Section 3.3.14, 'Fixed-Point Rotate and Shift
641 Instructions' on page 101.
644 Field used in REMAP to select the SVSHAPE for 1st input register
647 Field used in REMAP to select the SVSHAPE for 2nd input register
650 Field used in REMAP to select the SVSHAPE for 3rd input register
653 Field used to specify the meaning of the rmm field for SVI-Form
656 Field used in REMAP to select the SVSHAPE for 1st output register
659 Field used in REMAP to select the SVSHAPE for 2nd output register
662 Field used in X-form instructions to specify a sub-
663 set of storage accesses.
666 Field used in Simple-V to specify whether MVL is to be set
669 Field used to specify the number of bytes to move
670 in an immediate Move Assist instruction.
673 Field used by the Embedded Hypervisor Privilege
677 Field used by XO-form instructions to enable set-
678 ting OV and SO in the XER.
681 Primary opcode field.
684 Field used to specify whether to invalidate pro-
685 cess- or partition-scoped entries for tlbie[l].
688 Field used to specify preferred sign for BCD opera-
692 Field used in REMAP to indicate "persistence" mode (REMAP
693 continues to apply to multiple instructions)
696 Immediate field used to specify a 4-bit unsigned
700 Field used by the tbegin. instruction to specify the
704 Immediate field that specifies whether the RMC is
705 specifying the primary or secondary encoding
706 Field used to specify whether to invalidate Radix
707 Tree or HPT entries for tlbie[l].
710 Field used to specify a GPR to be used as a
711 source or as a target.
712 Formats: A, BM2, D, DQ, DQE, DS, M, MD, MDS, TX, VA, VA2, VX, X, XO, XS, SVL, XB
714 Field used to specify a GPR to be used as a
716 Formats: A, BM2, M, MDS, VA, VA2, X, XO
719 0 Do not alter the Condition Register.
720 1 Set Condition Register Field 6 as described in
721 Section 2.3.1, 'Condition Register' on
725 Field used to specify a GPR to be used as a
727 Formats: VA, VA2, SVD, SVDS
730 0 Do not alter the Condition Register.
731 1 Set Condition Register Field 0 or Field 1 as
732 described in Section 2.3.1, 'Condition Regis-
734 Formats: A, M, MD, MDS, VA2, X, XFL, XO, XS, Z22, Z23, SVL, XB, TLI
736 Field used to specify what types of entries to inval-
740 Immediate operand field used to specify new
741 binary floating-point rounding mode.
744 Immediate field used for DFP rounding mode con-
748 Round to Odd override
751 Field used to specify a GPR to be used as a
753 Formats: D, DS, M, MD, MDS, X, XFX, XS
755 Field used to specify an even/odd pair of GPRs to
756 be concatenated and used as a source.
759 Field used to specify a GPR to be used as a target.
760 Formats: A, BM2, D, DQE, DS, DX, VA, VA2, VX, X, XFX, XO, XX2, SVL, XB
762 Field used to specify an even/odd pair of GPRs to
763 be concatenated and used as a target.
766 Immediate field that specifies signed versus
770 Immediate field that specifies whether or not the
771 rfebb instruction re-enables event-based
775 Index to SV Context Propagation SPR
778 SV Context Propagation Mode
781 SV Context Propagation immediate bitfield
784 SV REMAP byte-reversal field.
787 SV REMAP immediate FIFO bitfield
790 Field used to specify a shift amount.
793 Field used to specify a shift amount.
796 Fields that are concatenated to specify a shift
800 Field used to specify a shift amount in bytes.
803 Field used to specify a shift amount in words.
806 Immediate field used to specify a 5-bit signed inte-
810 Immediate field used to specify a 16-bit signed
814 Immediate field used to specify a 5-bit signed inte-
818 Field used to specify dimensional skipping in svindex
821 Immediate field that specifies signed versus
825 Field used to specify a Special Purpose Register
826 for the mtspr and mfspr instructions.
829 Field used by the Segment Register Manipulation
830 instructions (see Book III).
833 Immediate field used to specify the size of the REMAP dimension
834 in the svindex instruction.
837 Immediate field used to specify an 11-bit signed
838 two's complement integer which is sign-extended
842 Immediate field used to specify a 9-bit signed
843 two's complement integer which is concatenated
844 on the right with 0b00 and sign-extended to 64 bits.
847 Field used to specify a GPR to be used as a
851 Simple-V immediate field for setting VL or MVL
854 Simple-V "REMAP" map-enable bits (0-4)
857 Simple-V "REMAP" Mode
860 Simple-V "REMAP" x-dimension size
863 Simple-V "REMAP" y-dimension size
866 Simple-V "REMAP" z-dimension size
869 Fields SX and S are concatenated to specify a
870 VSR to be used as a source.
873 Fields SX and S are concatenated to specify a
874 VSR to be used as a source.
877 Field used to specify the type of invalidation done
878 by a TLB Invalidate Local instruction (see Book
882 Field used by the Move From Time Base instruc-
883 tion (see Section 6.1 of Book II).
886 Immediate field that specifies a DFP exponent.
889 Field used by the data stream variant of the dcbt
890 and dcbtst instructions (see Section 4.3.2 of Book
894 Field used by the ternlogi instruction as the
898 Field used to specify the conditions on which to
899 trap. The encoding is described in
900 Section 3.3.10.1, 'Character-Type Compare
901 Instructions' on page 87.
904 Fields that are concatenated to specify a VSR to
905 be used as either a target.
908 Fields that are concatenated to specify a VSR to
909 be used as either a target or a source.
910 Formats: X, XX2, XX3, XX4
912 Immediate field used as the data to be placed into
913 a field in the FPSCR.
916 Immediate field used to specify a 5-bit unsigned
920 Immediate field used to specify a 16-bit unsigned
924 Immediate field used to specify a 5-bit unsigned
928 Immediate field used to specify a 4-bit unsigned
932 Immediate field used to specify a 3-bit unsigned
936 Immediate field used to specify a 2-bit unsigned
940 Field used to specify a VR to be used as a source.
943 Field used to specify a VR to be used as a source.
946 Field used to specify a VR to be used as a source.
949 Field used to specify a VR to be used as a source.
952 Field used to specify a VR to be used as a target.
953 Formats: DS, VA, VC, VX, X
955 Field used in Simple-V to specify whether "Vertical" Mode is set
958 Field used in Simple-V to specify whether VL is to be set
961 Field used by the mtfsfi and mtfsf instructions to
962 specify the target word in the FPSCR.
965 Field used to specify the condition or conditions
966 that cause instruction execution to resume after
967 executing a wait instruction (see Section 4.6.4 of
971 Field used to specify a bit in the XER.
972 Formats: MDS, MDS, TX
974 Field used to specify a 6-bit unsigned immediate for bit manipulation
975 instructions, such as grevi.
978 Extended opcode field.
981 Extended opcode field.
984 Extended opcode field.
987 Extended opcode field.
990 Extended opcode field.
993 Extended opcode field.
994 Formats: X, XFL, XFX, XL
996 Extended opcode field.
999 Extended opcode field.
1000 Formats: XO, XX3, Z22, XB
1002 Extended opcode field.
1005 Extended opcode field.
1008 Extended opcode field.
1011 Extended opcode field.
1014 Extended opcode field.
1015 Formats: A, DX, VA2, SVL
1017 Extended opcode field.
1018 Formats: VA, SVM, SVRM, SVI
1020 Extended opcode field.
1023 Extended opcode field.
1026 Extended opcode field.
1029 Extended opcode field.
1032 Extended opcode field.
1035 Extended opcode field.
1036 Formats: DQE, DS, SC
1038 Field used to specify loop dimension order in svindex