2022-09-20 |
Luke Kenneth Casson... | missed one sorting order in test_pysvp64dis.py
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2022-09-20 |
Luke Kenneth Casson... | sort specifiers in pysvp64dis in lexicographical order
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2022-09-20 |
Luke Kenneth Casson... | add two extra tests, sv.bc/m=r3/sz
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2022-09-20 |
Luke Kenneth Casson... | add sv.bc/ctr/vsb unit test to test_pysvp64dis.py to...
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2022-09-19 |
Luke Kenneth Casson... | add bc_ctr and bc_cti but not used yet
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2022-09-19 |
Luke Kenneth Casson... | print out reg num in _check_regs, useful debug
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2022-09-19 |
Luke Kenneth Casson... | cut cruft in caller.py
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2022-09-19 |
Luke Kenneth Casson... | codemorph on rc handling
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2022-09-19 |
Luke Kenneth Casson... | codemorph
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2022-09-19 |
Luke Kenneth Casson... | first interation (ha ha) src/dst iterators for ISACaller
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2022-09-19 |
Luke Kenneth Casson... | codemorph reduce indentation
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2022-09-19 |
Luke Kenneth Casson... | code cleanup on ISACaller write_output
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2022-09-19 |
Luke Kenneth Casson... | rename to avoid conflict pred_dz from pred_dst_zero
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2022-09-19 |
Luke Kenneth Casson... | another code-morph splitting out the src/dst mask preparation
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2022-09-19 |
Luke Kenneth Casson... | add function for calling a simulation
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2022-09-19 |
Luke Kenneth Casson... | another code-morph working towards getting the predicate...
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2022-09-19 |
Luke Kenneth Casson... | whitespace
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2022-09-19 |
Luke Kenneth Casson... | code-morph in StepLoop work towards splitting into...
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2022-09-19 |
Luke Kenneth Casson... | add svstate param to constructor of StepLoop, ISACaller
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2022-09-19 |
Luke Kenneth Casson... | move two big step/loop functions into separate class...
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2022-09-18 |
Luke Kenneth Casson... | code-comments identifying tables
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2022-09-18 |
Luke Kenneth Casson... | simplify predicate mask reporting. assign dw=sw=mask...
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2022-09-18 |
Luke Kenneth Casson... | use widths.get(dw/sw) and test empty/non-empty after.
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2022-09-18 |
Luke Kenneth Casson... | fix predicate mask case when smask was zero but mmode...
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2022-09-18 |
Luke Kenneth Casson... | no, better than hack-job, stop CROpSimpleRM deriving...
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2022-09-18 |
Luke Kenneth Casson... | bit of a hack-job, a base class MRBaseRM - MapReduce...
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2022-09-18 |
Luke Kenneth Casson... | correct COopFF3RM and CRopSimpleRM: extra sz field...
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2022-09-18 |
Luke Kenneth Casson... | add first attempt at swapping inner/outer vl/subvl...
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2022-09-18 |
Luke Kenneth Casson... | add new svstep mode setting up pack/unpack
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2022-09-18 |
Luke Kenneth Casson... | sigh, check length of string returned, if non-zero...
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2022-09-18 |
Luke Kenneth Casson... | sort out CR RM Mode (sz/dz bits moved, consistent)
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2022-09-18 |
Luke Kenneth Casson... | add comments (links to URLs) into power_insns.py for...
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2022-09-18 |
Luke Kenneth Casson... | remove f"" use simpler code, easier to read
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2022-09-18 |
Luke Kenneth Casson... | reverse decode_bo inv/eq/lt/le/etc. thing
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2022-09-18 |
Luke Kenneth Casson... | dumb. accidentally removed test-call
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2022-09-18 |
Luke Kenneth Casson... | add unit tests for Rc=1 ffirst/predicate-result
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2022-09-18 |
Luke Kenneth Casson... | comment principle behind new tables in power_insn.py
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2022-09-18 |
Luke Kenneth Casson... | redo branch mode as a table, in power_insn.py
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2022-09-18 |
Luke Kenneth Casson... | code-morph CR ops to table in power_insn.py
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2022-09-18 |
Luke Kenneth Casson... | code-morph in power_insn.py - move table-search to...
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2022-09-18 |
Luke Kenneth Casson... | LDST_IDX Mode converted to table
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2022-09-18 |
Dmitry Selyutin | power_insn: support m/sm/dm specifiers
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2022-09-18 |
Dmitry Selyutin | power_insn: pass record to specifiers
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2022-09-18 |
Luke Kenneth Casson... | replace LDST_IMM mode with mask/value match table in...
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2022-09-18 |
Luke Kenneth Casson... | remove (invalid) NormalSaturationExtRM mode from power_insn.py
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2022-09-18 |
Luke Kenneth Casson... | reduce NORMAL svp64 mode down to a mask-value search
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2022-09-18 |
Luke Kenneth Casson... | remove subvector mode from power_insn.py
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2022-09-18 |
Luke Kenneth Casson... | adapt test_12_mr to /mrr and /mr modes, svm is gone...
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2022-09-18 |
Dmitry Selyutin | test_pysvp64dis: test mrr/svm specifiers
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2022-09-18 |
Dmitry Selyutin | power_fields: fix __lt__ operator
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2022-09-18 |
Dmitry Selyutin | power_insn: support mrr specifier
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2022-09-18 |
Dmitry Selyutin | power_insn: support svm specifier
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2022-09-18 |
Dmitry Selyutin | power_insn: sync RM modes
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2022-09-18 |
Luke Kenneth Casson... | remove subvector mode from sv/trans/svp64.py
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2022-09-18 |
Luke Kenneth Casson... | change sv/trans/svp64.py source/dest elwidth assembler...
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2022-09-17 |
Luke Kenneth Casson... | add sat/satu test_12_sat to test_pysvp64dis.py
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2022-09-17 |
Luke Kenneth Casson... | whoops. mode-bits need to be put in MSB0 order. sigh
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2022-09-17 |
Dmitry Selyutin | power_fields: fix mapping class accessor
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2022-09-17 |
Dmitry Selyutin | power_fields: support boolean checks
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2022-09-17 |
Dmitry Selyutin | power_insn: fix zz specifiers
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2022-09-17 |
Dmitry Selyutin | power_insn: drop field length method again
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2022-09-17 |
Dmitry Selyutin | power_insn: decouple base ld/st idx RM
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2022-09-17 |
Dmitry Selyutin | power_insn: decouple base ld/st imm RM
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2022-09-17 |
Dmitry Selyutin | power_insn: decouple base normal RM
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2022-09-17 |
Dmitry Selyutin | power_insn: support saturation mode
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2022-09-17 |
Dmitry Selyutin | power_insn: support dz/sz specifiers
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2022-09-17 |
Luke Kenneth Casson... | add zz mode to sv/trans/svp64.py as a hack
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2022-09-17 |
Luke Kenneth Casson... | remove sv.setvl/pk/up/pu - these are all gone in favour...
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2022-09-17 |
Luke Kenneth Casson... | add MASK_SRC to power_insn.py (SVmask_src from enums)
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2022-09-17 |
Luke Kenneth Casson... | add SVmask_src enum, rename fields to EN and NO to...
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2022-09-17 |
Luke Kenneth Casson... | as a double-check sv_analysis new CSV column "SM" was...
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2022-09-17 |
Luke Kenneth Casson... | add a "SM" column into RM*.csv (and LDSTRM*.csv) identifying...
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2022-09-17 |
Luke Kenneth Casson... | add sv.add/ew=XX test to test_pysvp64dis.py
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2022-09-17 |
Luke Kenneth Casson... | remove pack/unpack modes from power_insn.py, they no...
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2022-09-17 |
Dmitry Selyutin | selectable_int: drop redundant operators
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2022-09-17 |
Dmitry Selyutin | power_insn: support vec2/vec3/vec4
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2022-09-17 |
Dmitry Selyutin | power_insn: support specifiers
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2022-09-17 |
Dmitry Selyutin | power_fields: fix comparison operators
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2022-09-17 |
Dmitry Selyutin | power_insn: refactor and fix RM mappings
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2022-09-17 |
Dmitry Selyutin | power_fields: fix field slicing
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2022-09-17 |
Dmitry Selyutin | power_insn: fix mapping bits accessors
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2022-09-17 |
Dmitry Selyutin | power_fields: support traversing over instances
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2022-09-17 |
Dmitry Selyutin | power_insn: drop redundant table
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2022-09-17 |
Dmitry Selyutin | power_fields: inherit docstrings upon remap
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2022-09-17 |
Luke Kenneth Casson... | add vec2/3/4 test_pysvp64dis test
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2022-09-16 |
Luke Kenneth Casson... | comments on test_9_fptrans
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2022-09-15 |
Dmitry Selyutin | sv_binutils_fptrans: fptrans binutils generator
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2022-09-15 |
Dmitry Selyutin | power_insn: support instruction bytes conversion
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2022-09-15 |
Dmitry Selyutin | selectable_int: allow setting multiple bit
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2022-09-15 |
Dmitry Selyutin | power_insn: allow accessing instruction bits
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2022-09-15 |
Luke Kenneth Casson... | add minor_4.csv for maddld/maddhdu/maddhd and to insn_db.csv
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2022-09-15 |
Luke Kenneth Casson... | fix sprset mtspr/mfspr pseudocode with wrong definition of
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2022-09-13 |
Dmitry Selyutin | power_insn: support signed operands
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2022-09-13 |
Dmitry Selyutin | power_insn: support branch RM
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2022-09-13 |
Dmitry Selyutin | power_insn: support CR RM
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2022-09-13 |
Dmitry Selyutin | power_enums: convert SVExtra to RegType
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2022-09-13 |
Dmitry Selyutin | power_insn: refactor RM mapping
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2022-09-13 |
Dmitry Selyutin | sv_binutils: support multiple opcodes; minor fixes
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2022-09-13 |
Luke Kenneth Casson... | correct assrmbler in test_pysvpy4dis.py
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2022-09-13 |
Luke Kenneth Casson... | add first pack/unpack to ISACaller
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