git.libre-soc.org Git - ls2.git/search

2022-02-16	Luke Kenneth Casson...	* disable DDR3 for now	commit \| commitdiff \| tree
2022-02-15	Luke Kenneth Casson...	connect up stall signals (fake) for WB Classic compliance	commit \| commitdiff \| tree
2022-02-15	Luke Kenneth Casson...	alternative uart wishbone mapping which just takes...	commit \| commitdiff \| tree
2022-02-15	Luke Kenneth Casson...	attempt to do 8-bit downconvert on wishbone bus for...	commit \| commitdiff \| tree
2022-02-15	Luke Kenneth Casson...	correct syscon bus address to 0xC000_0000	commit \| commitdiff \| tree
2022-02-15	Luke Kenneth Casson...	add microwatt SYSCON peripheral at 0xc000_0000	commit \| commitdiff \| tree
2022-02-15	Luke Kenneth Casson...	increase size of bootmem	commit \| commitdiff \| tree
2022-02-15	Luke Kenneth Casson...	add interrupt controller module, remove stall feature...	commit \| commitdiff \| tree
2022-02-15	Luke Kenneth Casson...	FLGA_TARGET=verilator not uppercase	commit \| commitdiff \| tree
2022-02-14	Luke Kenneth Casson...	add external cpu	commit \| commitdiff \| tree
2022-02-14	Luke Kenneth Casson...	convert boot rom to bootmem and get first hello_world...	commit \| commitdiff \| tree
2022-02-14	Luke Kenneth Casson...	add IBM microwatt CC4 license and copyright notices	commit \| commitdiff \| tree
2022-02-14	Luke Kenneth Casson...	add first cut of verilator simulation, over from microwatt	commit \| commitdiff \| tree
2022-02-14	Luke Kenneth Casson...	add verilog build option, make DDR3 PHY optional, add...	commit \| commitdiff \| tree
2022-02-13	Luke Kenneth Casson...	add future sim option (needs Simulated DDR PHY)	commit \| commitdiff \| tree
2022-02-13	Luke Kenneth Casson...	add build to gitignore	commit \| commitdiff \| tree
2022-02-13	Luke Kenneth Casson...	rename examples to src	commit \| commitdiff \| tree
2022-02-13	Luke Kenneth Casson...	not for any good reason, separate adding the uart16550...	commit \| commitdiff \| tree
2022-02-13	Luke Kenneth Casson...	add MemoryMap to UART16550 (TODO, put that into UART16550...	commit \| commitdiff \| tree
2022-02-13	Luke Kenneth Casson...	start adding uart16550	commit \| commitdiff \| tree
2022-02-13	Luke Kenneth Casson...	select a firmware file	commit \| commitdiff \| tree
2022-02-13	Luke Kenneth Casson...	allow selection of alternative FPGAs at commandline	commit \| commitdiff \| tree
2022-02-13	Luke Kenneth Casson...	add blinky lights so we know FPGA is alive	commit \| commitdiff \| tree
2022-02-13	Luke Kenneth Casson...	make firmware and cpu optional for now to get a basic...	commit \| commitdiff \| tree
2022-02-12	Luke Kenneth Casson...	begin a tidyup on the example	commit \| commitdiff \| tree
2022-02-10	Luke Kenneth Casson...	resolve imports, whitespace, add Copyright	commit \| commitdiff \| tree
2022-02-10	Luke Kenneth Casson...	add crg.py	commit \| commitdiff \| tree
2022-02-10	Luke Kenneth Casson...	update contributors	commit \| commitdiff \| tree
2022-02-10	Luke Kenneth Casson...	sort out license and headers for NLnet and NGI POINTER...	commit \| commitdiff \| tree
2022-02-10	Luke Kenneth Casson...	add gram soc example and license and contributors	commit \| commitdiff \| tree
2022-02-09	Luke Kenneth Casson...	empty first commit	commit \| commitdiff \| tree

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