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soc/interconnect/axi: propagate response errors in AXILiteDownConverter
2020-07-16 Jędrzej Boczarsoc/interconnect/axi: propagate response errors in...
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2020-07-16 Jędrzej Boczarsoc/interconnect/axi: implement AXILite down-converter
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2020-07-16 Jędrzej Boczarsoc/integration: revert `bus` argument for add_ram...
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2020-07-15 Jędrzej Boczarsoc/integration: use AXILiteConverter (dummy implementation...
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2020-07-15 Jędrzej Boczarsoc/interconnect/axi: add connect methods for convenience
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2020-07-15 Jędrzej Boczartest/axi: add AXILite2CSR and AXILiteSRAM tests
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2020-07-15 Jędrzej Boczarsoc/interconnect/axi: improve SRAM/CSR access speed
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2020-07-15 Jędrzej Boczarsoc/interconnect: add AXILite SRAM
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2020-07-15 Jędrzej Boczarsoc/interconnect: add AXILite2CSR bridge
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2020-07-14 Jędrzej Boczarsoc/integration: update add_adapter to convert between...
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2020-06-24 Jędrzej Boczarbios: move memtest from liblitedram to libbase
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2020-05-29 Jędrzej Boczarbios/litedram: add option to verify SPD EEPROM memory...
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2020-05-29 Jędrzej Boczarbuild/sim/spdeeprom: use hex format when loading from...
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2020-05-28 Jędrzej Boczarlitex/build/sim: add module for simulating SPD EEPROM
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2020-05-27 Jędrzej Boczarbios: move I2C from liblitedram to libbase
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2020-05-27 Jędrzej Boczarbios/sdram: expose I2C functions
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2020-05-21 Jędrzej Boczarlitex_sim: load SPD data from files in hexdump format...
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2020-05-21 Jędrzej Boczarbios/sdram: add BIOS command for reading SPD
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2020-05-21 Jędrzej Boczarbios/sdram: add firmware for reading SPD EEPROM
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