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power_insn: provide basics for insndb assembly
2023-01-15 Dmitry Selyutinpower_insn: provide basics for insndb assembly
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2023-01-15 Dmitry Selyutinpower_insn: return None for unknown insn names
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2023-01-15 Dmitry Selyutinpower_insn: introduce signed immediate operand class
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2023-01-15 Dmitry Selyutinpower_insn: rename register operand class
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2023-01-15 Dmitry Selyutinpower_insn: clean and simplify EXTS operands
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2023-01-15 Dmitry Selyutinpower_insn: support FPR operands assembly
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2023-01-15 Dmitry Selyutinpower_insn: support GPR operands
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2023-01-15 Dmitry Selyutinpower_insn: support non-zero operands
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2023-01-15 Dmitry Selyutinpower_insn: allow sign only for SignedOperand
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2023-01-15 Dmitry Selyutinpower_insn: add support for a trivial assembly
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2022-11-01 Dmitry Selyutintests/bigint: provide shadd/shadduw tests
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2022-11-01 Dmitry Selyutinselectable_int: support variable concatenation
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2022-11-01 Dmitry Selyutinbitmanip.mdwn: avoid overflow for m variable
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2022-11-01 Dmitry SelyutinRevert "Revert "https://bugs.libre-soc.org/show_bug...
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2022-11-01 Dmitry SelyutinRevert "corrections to shadd/uw after reverting to...
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2022-10-27 Dmitry Selyutinpower_enums: support shadd/shadduw instructions
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2022-10-27 Dmitry Selyutinisa/caller.py: support shadd/shadduw instructions
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2022-10-25 Dmitry Selyutinpysvp64asm: support shadd/shadduw instructions
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2022-10-25 Dmitry Selyutinpysvp64asm: introduce more flexible Z23 wrapper
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2022-10-25 Dmitry Selyutintest_pysvp64dis: test shadd/shadduw instructions
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2022-10-25 Dmitry Selyutinbitmanip.mdwn: support shadd/shadduw instructions
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2022-10-25 Dmitry Selyutinminor_4.csv: support shadd/shadduw instructions
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2022-10-19 Dmitry Selyutinsv_binutils_fptrans: fix registers generation
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2022-10-19 Dmitry Selyutinav.mdwn: fix missing bmask operand
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2022-10-17 Dmitry Selyutinav.mdwn: fix Rc-augmented cprop instruction
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2022-10-14 Dmitry Selyutinsv_binutils_fptrans: fix opcodes mode
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2022-10-14 Dmitry Selyutinpower_insn: really skip sv. entries for PPC database
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2022-10-14 Dmitry Selyutinsv_binutils_fptrans: generate all permutations
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2022-10-14 Dmitry Selyutinpysvp64asm: fix coding style
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2022-10-14 Dmitry Selyutinpower_insn: skip sv. instructions in PPC database
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2022-10-14 Dmitry Selyutinpower_insn: fix AA match
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2022-10-14 Dmitry Selyutinpower_insn: do not allow default records
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2022-09-25 Dmitry Selyutintest_pysvp64dis: sort ld/st idx stride specs
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2022-09-25 Dmitry Selyutinpower_insn: always provide els for ld/st idx stride
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2022-09-25 Dmitry Selyutinpysvp64asm: fix VLi attribute access
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2022-09-25 Dmitry Selyutinpower_insn: fix and unify /vli specifier
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2022-09-24 Dmitry Selyutintest_pysvp64dis: test ld/st idx SEA (simple)
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2022-09-24 Dmitry Selyutinpower_insn: support SEA specifier
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2022-09-24 Dmitry Selyutinpysvp64asm: support /sea specifier
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2022-09-24 Dmitry Selyutinconsts: introduce SEA field
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2022-09-24 Dmitry Selyutinpysvp64asm: fix comment layout
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2022-09-24 Dmitry Selyutinpower_insn: slightly change table checking style
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2022-09-24 Dmitry Selyutinsv_binutils: support RS opindex
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2022-09-24 Dmitry Selyutinpower_insn: reorder mode tables to match the spec
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2022-09-24 Dmitry Selyutinpower_insn: rename smr to mr
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2022-09-24 Dmitry Selyutinsv_binutils: provide Boolean class and Rc field
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2022-09-24 Dmitry Selyutinpower_insn: provide Record.Rc field
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2022-09-24 Dmitry Selyutinpower_insn: simplify rsvd naming; drop unused rsvd
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2022-09-24 Dmitry Selyutinpower_insn: replace Record.function with Record.mode
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2022-09-24 Dmitry Selyutinpysvp64asm: expand vector register macros
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2022-09-24 Dmitry Selyutinsv_binutils: support opcodes offset representation
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2022-09-24 Dmitry Selyutinsv_binutils: fix fields traversal
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2022-09-24 Dmitry Selyutinpower_insn: sort database finally
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2022-09-24 Dmitry Selyutinpower_insn: provide missing cr_in2 properties
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2022-09-24 Dmitry Selyutinsv_binutils: generate svp64_cr_in2 opindices
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2022-09-24 Dmitry Selyutinsv_binutils: generate BA opindex
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2022-09-24 Dmitry Selyutinpower_fields: restore class-oriented traversal
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2022-09-20 Dmitry Selyutinpysvp64asm: fix sz handling
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2022-09-20 Dmitry Selyutinpower_insn: unify predicates
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2022-09-20 Dmitry Selyutintest_pysvp64dis: test vli specifier
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2022-09-20 Dmitry Selyutinpysvp64asm: support vli specifier
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2022-09-20 Dmitry Selyutinpower_insn: support vli specifier
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2022-09-20 Dmitry Selyutinpower_insn: simplify specifiers sorting
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2022-09-20 Dmitry Selyutinpower_insn: custom sz handling for branches
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2022-09-20 Dmitry Selyutinpysvp64asm: update sz upon snz specifier
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2022-09-20 Dmitry Selyutinpower_insn: support vs/vsi/vsb/vsbi/ctr/cti specifiers
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2022-09-20 Dmitry Selyutinpysvp64asm: support branch modes
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2022-09-20 Dmitry Selyutinpower_svp64_rm: sync it with tables
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2022-09-20 Dmitry Selyutinpower_insn: support common branch disassembly
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2022-09-19 Dmitry Selyutinpower_insn: simplify branch table
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2022-09-19 Dmitry Selyutinpower_insn: provide SVL/CTR branch fields
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2022-09-19 Dmitry Selyutintest_pysvp64dis: test els specifier
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2022-09-19 Dmitry Selyutinpower_insn: support els specifier
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2022-09-18 Dmitry Selyutinpower_insn: perform cleanup; turn comments into docstrings
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2022-09-18 Dmitry Selyutinpower_insn: introduce common mr/mrr RM class
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2022-09-18 Dmitry Selyutinpower_insn: support ff/pr predicates
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2022-09-18 Dmitry Selyutinpysvp64asm: restore original BO
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2022-09-18 Dmitry Selyutinpower_insn: fix CR ops classes naming
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2022-09-18 Dmitry Selyutinpower_insn: fix coding style
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2022-09-18 Dmitry Selyutinpower_insn: introduce common dz/sz RM classes
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2022-09-18 Dmitry Selyutinpower_insn: introduce common zz RM class
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2022-09-18 Dmitry Selyutinpower_insn: introduce common Sat RM class
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2022-09-18 Dmitry Selyutinpower_insn: introduce common FFPRRc0 RM class
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2022-09-18 Dmitry Selyutinpower_insn: simplify RM classes naming
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2022-09-18 Dmitry Selyutintest_pysvp64dis: test RC1/~RC1 in ff/pr
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2022-09-18 Dmitry Selyutinpower_insn: fix Rc operand accessor
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2022-09-18 Dmitry Selyutinpower_insn: support RC1/~RC1 in ff/pr
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2022-09-18 Dmitry Selyutinpower_insn: adjust table comments
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2022-09-18 Dmitry Selyutinpower_insn: another minor ld/st imm table cleanup
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2022-09-18 Dmitry Selyutinpysvp64asm: make zz also set src_zero
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2022-09-18 Dmitry Selyutinpower_insn: minor CR cleanup
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2022-09-18 Dmitry Selyutinpower_insn: minor cleanup
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2022-09-18 Dmitry Selyutinpower_insn: support m/sm/dm specifiers
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2022-09-18 Dmitry Selyutinpower_insn: pass record to specifiers
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2022-09-18 Dmitry Selyutintest_pysvp64dis: test mrr/svm specifiers
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2022-09-18 Dmitry Selyutinpower_fields: fix __lt__ operator
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2022-09-18 Dmitry Selyutinpower_insn: support mrr specifier
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2022-09-18 Dmitry Selyutinpower_insn: support svm specifier
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2022-09-18 Dmitry Selyutinpower_insn: sync RM modes
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2022-09-18 Dmitry Selyutinpower_insn: support w/dw/sw specifiers
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