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orangecrab: don't use async. set to 50 mhz.
2022-04-10
Raptor Engineering...
Put sysclk2x back under system reset control
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2022-04-09
Raptor Engineering...
Wire up missing CRG / DDR3 clock control / reset signals
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2022-04-07
Raptor Engineering...
Update coldboot DDR3 init firmware to work with latest...
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2022-04-07
Raptor Engineering...
Add an asm dump with source to the coldboot makefile
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2022-04-07
Raptor Engineering...
Enable DDR3 using a 50MHz clock on Versa 85
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2022-04-07
Raptor Engineering...
Move simulation HyperRAM pins off of DDR3 pins
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2022-04-07
Raptor Engineering...
Fix DRAM simulation commands
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2022-04-04
Raptor Engineering...
Fix SPI device simulation model MISO/MOSI wiring
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2022-04-02
Raptor Engineering...
Add 10/100 MAC pins for Versa boards and enable MAC
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2022-03-31
Raptor Engineering...
Fix Tercel QSPI master connections
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2022-03-29
Raptor Engineering...
Add initial integration for OpenCores 10/100 Ethernet MAC
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2022-03-28
Raptor Engineering...
Fix instructions in comment
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2022-03-16
Raptor Engineering...
Add initial Tercel SPI controller
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