2021-12-04 |
Luke Kenneth Casson... | raise a MemException in ISACaller RADIXMMU
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2021-12-04 |
Luke Kenneth Casson... | enable MMU in SimRunner if requested. now HDL and...
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2021-12-04 |
Luke Kenneth Casson... | test in SimState for access to RADIX memory, bypass...
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2021-12-03 |
Luke Kenneth Casson... | add a namedtuple LDSTExceptionTuple which allows obtaining
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2021-12-03 |
Luke Kenneth Casson... | add link to exceptions in gtkw traces
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2021-12-02 |
Luke Kenneth Casson... | regspec_decode_write now stores the decoded write info...
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2021-12-02 |
Luke Kenneth Casson... | specify length in RegDecodeInfo explicitly so that...
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2021-12-02 |
Luke Kenneth Casson... | use namedtuple in get_rdflags
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2021-12-02 |
Luke Kenneth Casson... | use namedtuple for regspec_decode
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2021-12-02 |
Luke Kenneth Casson... | add module to regspec_decode_* and get_rdflags
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2021-12-01 |
Luke Kenneth Casson... | fix expected state in hazard test
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2021-12-01 |
Luke Kenneth Casson... | fix expected state in hazard case_regression_1
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2021-12-01 |
Luke Kenneth Casson... | add a proper twin addi regression which tests ReservationSta...
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2021-12-01 |
Luke Kenneth Casson... | add regspec_decode which takes readmode arg and returns...
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2021-11-30 |
Luke Kenneth Casson... | add randomised hazard test
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2021-11-30 |
Luke Kenneth Casson... | add two more hazard tests
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2021-11-30 |
Luke Kenneth Casson... | attempting to use PowerDecode2 in non-svp64 mode
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2021-11-27 |
Luke Kenneth Casson... | add extra overlap hazard test
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2021-11-24 |
Luke Kenneth Casson... | corrections to hazard overlap test
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2021-11-24 |
Luke Kenneth Casson... | add extra hazard unit tests
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2021-11-24 |
Luke Kenneth Casson... | tidyup on case_0_adde
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2021-11-24 |
Luke Kenneth Casson... | correct write-after-write hazard test (expected values)
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2021-11-23 |
Luke Kenneth Casson... | add write-after-write hazard test for inorder core
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2021-11-22 |
Luke Kenneth Casson... | add expected version of case_adde_0
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2021-11-22 |
Luke Kenneth Casson... | adding a couple more hazard avoidance cases
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2021-11-21 |
Luke Kenneth Casson... | sigh, for overlap mode there is no safe way to get...
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2021-11-21 |
Luke Kenneth Casson... | move dump state to base class State in test API
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2021-11-17 |
Luke Kenneth Casson... | add allow_overlap argument to TestRunnerBase
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2021-11-17 |
Luke Kenneth Casson... | code-comments
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2021-11-17 |
Luke Kenneth Casson... | XER regspec_decode_write was not sophisticated enough.
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2021-11-17 |
Luke Kenneth Casson... | split up regression cases so that a single Rc=1 add...
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2021-11-16 |
Luke Kenneth Casson... | truncate CR regspec_decode_write reg mask to 8 bit
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2021-11-16 |
Luke Kenneth Casson... | argh, regspec_decode_write is supposed to return single...
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2021-11-16 |
Luke Kenneth Casson... | name of cr reg3 was numbered 2
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2021-11-11 |
Luke Kenneth Casson... | add case-based expected results in addme alu_cases
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2021-11-11 |
Luke Kenneth Casson... | invert speedup (commenting-out) of tests
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2021-11-11 |
Luke Kenneth Casson... | sort out numbering on CRs in SimState
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2021-11-11 |
Luke Kenneth Casson... | whitespace
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2021-11-11 |
Luke Kenneth Casson... | fix test API State.compare which was overwriting intregs...
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2021-11-11 |
Luke Kenneth Casson... | https://bugs.libre-soc.org/show_bug.cgi?id=730#c27
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2021-11-11 |
Luke Kenneth Casson... | add unexpected result to see what happens
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2021-11-11 |
Luke Kenneth Casson... | use append on expected state dump, not ideal but
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2021-11-11 |
Luke Kenneth Casson... | add core state to gtkw
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2021-11-10 |
Luke Kenneth Casson... | attempt to get gtkw simulator signals updated on WB MMU
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2021-11-10 |
Luke Kenneth Casson... | add LDST msr_pr to gtkw debug
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2021-11-10 |
Luke Kenneth Casson... | display 64 bits of msr
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2021-11-10 |
Luke Kenneth Casson... | add MSR to ldst operand debug gtkw
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2021-11-10 |
Luke Kenneth Casson... | add MSR to gtkw file for simulation output
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2021-11-10 |
Luke Kenneth Casson... | add RT as an option for ternary instruction as 3rd...
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2021-11-10 |
Luke Kenneth Casson... | add creation of 8 and 16 DCT butterfly diagrams
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2021-10-10 |
Luke Kenneth Casson... | corrections to EXTSXL 0x000000090000093 table for extsb...
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2021-10-04 |
Luke Kenneth Casson... | corrections to csv files
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2021-10-04 |
Luke Kenneth Casson... | add another extsxl csv file
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2021-10-04 |
Luke Kenneth Casson... | replace f with F in csv files
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2021-10-04 |
Luke Kenneth Casson... | add extsxl csv files
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2021-10-04 |
Luke Kenneth Casson... | test adding extsxl data
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2021-10-04 |
Luke Kenneth Casson... | add blank example file
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2021-10-01 |
Luke Kenneth Casson... | set run_hdl arg to None because it passes in a class now
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2021-10-01 |
Luke Kenneth Casson... | copy over TestRunner class from soc/simple/test/test_runner.py
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2021-09-30 |
Luke Kenneth Casson... | whoops, use cache of pseudocode rather than attempt...
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2021-09-30 |
Luke Kenneth Casson... | reduce PyFnWriter compile time (pywriter) by 75%
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2021-09-28 |
Luke Kenneth Casson... | remove unneeded module import
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2021-09-28 |
Luke Kenneth Casson... | convert svp64 fft test just like the dct one
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2021-09-28 |
Luke Kenneth Casson... | convert test_caller_svp64_dct.py unit test to use new...
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2021-09-28 |
Luke Kenneth Casson... | re-add accidentally-deleted low-level operators eq...
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2021-09-28 |
Luke Kenneth Casson... | move FPDIV, FPMUL (etc) to ISAFPHelpers class
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2021-09-28 |
Luke Kenneth Casson... | add ISACallerFnHelper, remove FPADD32 and other FP...
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2021-09-28 |
Luke Kenneth Casson... | remove type information
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2021-09-28 |
Dmitry Selyutin | pywriter, pyfnwriter, parser: activate helper class
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2021-09-28 |
Dmitry Selyutin | pyfnwriter: write helper class
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2021-09-28 |
Dmitry Selyutin | decoder/parser: generate methods, not functions
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2021-09-28 |
Dmitry Selyutin | fixup! decoder/parser: pass helper argument
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2021-09-28 |
Dmitry Selyutin | decoder/power_pseudo: pass helper argument
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commit | commitdiff | tree |
2021-09-28 |
Dmitry Selyutin | decoder/parser: pass helper argument
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2021-09-25 |
Luke Kenneth Casson... | add name parameter to StateRunner
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2021-09-25 |
Luke Kenneth Casson... | inherit ISACallerHelper in ISACaller
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2021-09-25 |
Dmitry Selyutin | pywriter: redirect helpers into self
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2021-09-25 |
Dmitry Selyutin | decoder/helpers.py: redirect helper class calls
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2021-09-25 |
Dmitry Selyutin | decoder/helpers.py: ISACallerHelper stub class
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2021-09-25 |
Luke Kenneth Casson... | add factory-function for StateRunner
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2021-09-25 |
Luke Kenneth Casson... | convert all SimRunner functions to yield
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2021-09-24 |
Luke Kenneth Casson... | guessing what extra args needed for StateRunner
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2021-09-24 |
Luke Kenneth Casson... | finally sort out the running-out-of-file-handles
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2021-09-24 |
Luke Kenneth Casson... | use with subprocess to get it to close Popen files
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2021-09-24 |
Luke Kenneth Casson... | rename shift tests, move to test cases directory
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2021-09-24 |
Luke Kenneth Casson... | rename files, test_issuer.py is for the TestIssuer,
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2021-09-23 |
Luke Kenneth Casson... | add extra functions for StateRunner
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2021-09-23 |
Luke Kenneth Casson... | create Abstract Base Class StateRunner
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2021-09-23 |
Luke Kenneth Casson... | add stfs unit test
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2021-09-23 |
Luke Kenneth Casson... | add stfx unit test
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2021-09-23 |
Luke Kenneth Casson... | add stfsux and unit test, code was there, needed adding...
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2021-09-23 |
Luke Kenneth Casson... | add load-immediate unit test
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2021-09-23 |
Luke Kenneth Casson... | add fsubs unit test
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2021-09-22 |
Luke Kenneth Casson... | add first "ExpectedState" to HDL-sim ALU test cases
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2021-09-22 |
Luke Kenneth Casson... | and add expected to TestAccumulatorBase
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2021-09-22 |
Luke Kenneth Casson... | add expected argument to TestCase
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2021-09-22 |
Luke Kenneth Casson... | take a copy of SPRs so they are not modified by ISACaller
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2021-09-22 |
Luke Kenneth Casson... | split out function which processes initial test memory...
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2021-09-21 |
Luke Kenneth Casson... | fix borked TestState.get_mem() assumed simmem.depth...
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2021-09-20 |
Luke Kenneth Casson... | syntax error
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