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insndb: rename subnodes into walk
2023-12-22 Dmitry Selyutininsndb: rename subnodes into walk
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2023-12-22 Dmitry Selyutininsndb/core: introduce Records type
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2023-12-22 Dmitry Selyutininsndb/core: switch dataclasses to Dataclass type
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2023-12-22 Dmitry Selyutininsndb/core: introduce Path type
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2023-12-22 Dmitry Selyutininsndb/core: inroduce String type
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2023-12-22 Dmitry Selyutininsndb: decouple visitors and walking
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2023-12-22 Dmitry Selyutininsndb: decouple visitors and walking
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2023-12-22 Dmitry Selyutininsndb: refactor visitors (again)
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2023-12-22 Luke Kenneth Casson... comment out debug log
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2023-12-22 Luke Kenneth Casson... remove print log
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2023-12-22 Dmitry Selyutininsndb: refactor visitors
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2023-12-22 Dmitry Selyutininsn/core: rename extra-related classes
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2023-12-22 Dmitry Selyutinpower_enums: distinguish all reg types
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2023-12-22 Dmitry Selyutininsndb/db: refactor visitors
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2023-12-22 Dmitry Selyutininsn/core: introduce visitable extra
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2023-12-22 Dmitry Selyutininsndb/db: support operand spans
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2023-12-22 Dmitry Selyutininsn/db: restrict extras command with SVP64 instructions
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2023-12-22 Dmitry Selyutinpower_enums: simplify sel type string conversion
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2023-12-22 Dmitry Selyutinpower_enums: simplify extra idx string conversion
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2023-12-22 Dmitry Selyutinpower_enums: align reg pairs
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2023-12-22 Dmitry Selyutinpower_enums: simplify reg string conversion
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2023-12-22 Dmitry Selyutinpower_enums: simplify selectors string conversion
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2023-12-22 Dmitry Selyutininsndb/db: support extras command
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2023-12-22 Dmitry Selyutininsndb/db: change naming a bit
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2023-12-22 Dmitry Selyutininsndb/db: introduce instruction argument type
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2023-12-22 Luke Kenneth Casson... fix (most) unit tests in test_pysvp64dis.py
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2023-12-22 Luke Kenneth Casson... must check *implicit* SelType which comes from the...
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2023-12-22 Luke Kenneth Casson... rename "none" __repr__ to "NONE" in SVExtra and SelType
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2023-12-22 Dmitry Selyutininsndb/db: simplify commands structure
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2023-12-22 Dmitry Selyutininsndb/db: support pcode command
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2023-12-22 Dmitry Selyutininsndb/dis: rename into disasm for no good reason
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2023-12-22 Dmitry Selyutininsndb/db: support log option
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2023-12-22 Luke Kenneth Casson... correct RS/RA/CR0 for rlwinm which is 2P-1S1D
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2023-12-22 Dmitry Selyutininsndb/db: support operands command
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2023-12-22 Dmitry Selyutininsndb/db: refactor classes hierarchy
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2023-12-22 Dmitry Selyutininsndb/db: deindent classes
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2023-12-22 Dmitry Selyutininsndb: rename types into core
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2023-12-22 Dmitry Selyutininsndb: revert recent renaming
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2023-12-22 Luke Kenneth Casson... openpower.insndb.dis renamed to disasm in setup.py
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2023-12-22 Luke Kenneth Casson... using names of modules that are identical to commonly...
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2023-12-22 Luke Kenneth Casson... import dis overloads naming of modules already in python3,
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2023-12-22 Luke Kenneth Casson... continuing the conversion of LDST_IDX to EXTRA332 type
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2023-12-22 Dmitry Selyutininsndb/db: support opcodes command
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2023-12-22 Dmitry Selyutininsndb/db: drop redundant method
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2023-12-22 Dmitry Selyutininsndb: provide pysvp64db script
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2023-12-22 Dmitry Selyutinpysvp64dis: integrate into insndb
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2023-12-22 Dmitry Selyutinpysvp64asm: integrate into insndb
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2023-12-22 Dmitry Selyutinpower_insn: decouple into separate module
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2023-06-02 Dmitry Selyutinpower_insn: disassemble RA0 and RT0 correctly
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2023-06-02 Dmitry Selyutinpower_insn: forbid r0 for RA0 and RT0
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2023-06-02 Dmitry Selyutinpower_enums: introduce Reg pair property
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2023-06-02 Dmitry Selyutinpower_enums: introduce Reg or_zero property
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2023-06-02 Dmitry Selyutinpower_insn: drop unused import
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2023-06-02 Dmitry Selyutinpower_enums: deprecate SVExtraReg
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2023-06-02 Dmitry Selyutinpower_insn: switch to Reg
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2023-06-02 Dmitry Selyutinpower_enums: introduce Reg as alias of SVExtraReg
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2023-06-02 Dmitry Selyutinpower_insn: guess extra from reg instead of sel
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2023-06-02 Dmitry Selyutinpower_enums: provide selector type property
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2023-06-02 Dmitry Selyutinpower_enums: deprecate SVExtraRegType
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2023-06-02 Dmitry Selyutinpower_insn: switch to SelType
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2023-06-02 Dmitry Selyutinpower_enums: introduce SelType as alias of SVExtraRegType
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2023-06-02 Dmitry Selyutinpower_insn: completely refactor extras
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2023-06-02 Dmitry Selyutinpower_enums: introduce register aliases
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2023-06-02 Dmitry Selyutinpower_insn: introduce extras property
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2023-06-02 Dmitry Selyutinpower_enums: change SVExtra representation
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2023-06-02 Luke Kenneth Casson... far too much memory (58 GB) being used by these unit...
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2023-06-02 Luke Kenneth Casson... disable fmv-fcvt tests entirely
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2023-06-02 Luke Kenneth Casson... disable fmv / fcvt unit tests as there are such a vast...
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2023-06-02 Jacob Lifshayadd expected values to source
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2023-06-02 Jacob Lifshayadd worked-out svp64 16-bit maddsubrs test case
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2023-06-02 Jacob Lifshaymake maddsubrs show up in SVP64 generated CSVs
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2023-06-02 Jacob Lifshayraise error on unhandled instruction kind
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2023-06-02 Jacob Lifshaylog no longer raises internal exceptions and has more...
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2023-06-02 Jacob Lifshayformat code
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2023-06-02 Jacob Lifshayincrease ci maxfail to 10
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2023-06-02 Dmitry Selyutintest_pysvp64dis.py: add tests for broken extras
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2023-06-02 Jacob Lifshayfcvtfg works!
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2023-06-02 Jacob Lifshayadd rest of bfp* functions needed for fcvtfg
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2023-06-02 Jacob Lifshayuse raise_syntax_error for `IndentationError`s as well
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2023-06-02 Jacob Lifshayadd support for checking sprs and msr in unit tests
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2023-06-02 Jacob Lifshayuse a different default MSR value for unit tests since...
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2023-06-02 Andrey Miroshnikovinorder.py: Typo fixes.
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2023-06-02 Andrey Miroshnikovinorder.py: Added draft get_input/output_regs functions.
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2023-06-02 Dmitry Selyutinpower_insn: fix broken extra_idx
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2023-06-02 Dmitry Selyutinpower_enums: fix incorrect naming
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2023-06-02 Luke Kenneth Casson... add P2M type - 1P 2P 2PM needed for new LD/ST-Indexed...
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2023-06-02 Luke Kenneth Casson... https://bugs.libre-soc.org/show_bug.cgi?id=1091
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2023-06-02 Luke Kenneth Casson... add .py? gitignore
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2023-06-02 Luke Kenneth Casson... rename sm to SH for shift-and-add instructions
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2023-06-02 Luke Kenneth Casson... note on FP Exception about DDFF VLi=0/1
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2023-06-02 Jacob Lifshaytest fcvttgo. with traps enabled
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2023-06-02 Jacob LifshayISACaller: generate FP trap
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2023-06-02 Jacob Lifshaytest fcvttgo. with VE=1 too
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2023-06-02 Jacob Lifshayfcvttg[s][o][.] needs EXTRA_UNINIT_REGS: RT
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2023-06-02 Jacob Lifshayadd support for adding extra uninit_regs from html...
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2023-06-02 Luke Kenneth Casson... add getopt for test and help to inorder.py
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2023-06-02 Luke Kenneth Casson... comment read_file explaining usage contract
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2023-06-02 Luke Kenneth Casson... yet another namespace hack now that @inject is on
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2023-06-02 Luke Kenneth Casson... make style of consts.py consistent with standard python
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2023-06-02 Luke Kenneth Casson... make style of pysvp64dis.py consistent with standard...
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