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soc/tools/remote/server: add --debug parameter
2015-11-05
Sebastien Bourdeauducq
fhdl/verilog: create clock domains in deterministic...
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2015-11-04
Sebastien Bourdeauducq
libcompiler_rt: add fixunsdfdi
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2015-11-04
Sebastien Bourdeauducq
setup.py: consistent version number
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2015-11-04
Sebastien Bourdeauducq
setup.py: fix version number
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2015-11-04
Sebastien Bourdeauducq
setup.py: consistent version number
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2015-11-04
Sebastien Bourdeauducq
conda: use correct branch
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2015-11-04
Sebastien Bourdeauducq
Merge 'new' branch
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2015-11-04
Sebastien Bourdeauducq
conda: use correct branch
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tree
2015-11-04
Sebastien Bourdeauducq
Merge 'new' branch
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tree
2015-11-04
Sebastien Bourdeauducq
integration/builder: add gateware toolchain path command...
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2015-11-04
Sebastien Bourdeauducq
build: standardize toolchain path setting
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tree
2015-11-04
Sebastien Bourdeauducq
build/ise: make method default args consistent across...
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2015-11-03
Sebastien Bourdeauducq
software/makefiles: remove dependency system, make...
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2015-11-03
Sebastien Bourdeauducq
targets/pipistrello: add argparse functions consistent...
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2015-11-03
Sebastien Bourdeauducq
targets/kc705: export generic argparse code
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tree
2015-11-03
Sebastien Bourdeauducq
targets/kc705: make SDRAM controller type configurable
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tree
2015-11-03
Sebastien Bourdeauducq
interconnect/wishbone: fix CSRBank init
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2015-11-03
Sebastien Bourdeauducq
wishbone: add read/write simulation methods
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2015-11-02
Sebastien Bourdeauducq
Revert "conda: try to hack conda into checking out...
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2015-11-02
Sebastien Bourdeauducq
conda: try to hack conda into checking out new branch...
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tree
2015-11-02
Sebastien Bourdeauducq
travis: add dummy script
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tree
2015-11-02
Sebastien Bourdeauducq
conda: consistent version numbering
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tree
2015-11-02
Sebastien Bourdeauducq
add travis.yml
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tree
2015-11-01
Sebastien Bourdeauducq
add conda build scripts
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tree
2015-11-01
Sebastien Bourdeauducq
cores/dvi_sampler: fix imports
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tree
2015-11-01
Sebastien Bourdeauducq
interconnect/stream: add Converter (needs cleanup)
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2015-10-24
Sebastien Bourdeauducq
compiler_rt: add comparesf2
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2015-10-22
Sebastien Bourdeauducq
fhdl/namer: fix object aliasing bug
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2015-10-22
Sebastien Bourdeauducq
Merge branch 'new' of github.com:m-labs/migen into new
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2015-10-22
Sebastien Bourdeauducq
fhdl/namer: fix object aliasing bug
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2015-10-21
Sebastien Bourdeauducq
travis: workaround for conda noarch bug
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2015-10-20
Sebastien Bourdeauducq
sim: fix case break
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2015-10-20
Sebastien Bourdeauducq
sim: do not use py35 collections.Generator
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2015-10-19
Sebastien Bourdeauducq
travis: workaround for conda noarch bug
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2015-10-19
Sebastien Bourdeauducq
conda: noarch
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tree
2015-10-19
Sebastien Bourdeauducq
sim: truncate case test value
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2015-10-19
Sebastien Bourdeauducq
test: fix divider testbench
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2015-10-19
Sebastien Bourdeauducq
sim: generators are also iterables...
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2015-10-19
Sebastien Bourdeauducq
sim: accept iterables as generator list
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2015-10-19
Sebastien Bourdeauducq
verilog, sim: accept iterables in FHDL statements
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2015-10-19
Sebastien Bourdeauducq
genlib/fsm: fix return value of _get_register_control
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2015-10-19
Sebastien Bourdeauducq
MANIFEST.in: fix lm32 data directory
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2015-10-19
Sebastien Bourdeauducq
Revert "sim/core: fix Cat bitshift"
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2015-10-19
Sebastien Bourdeauducq
sim/core: fix Cat bitshift
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2015-10-19
Sebastien Bourdeauducq
sim/core: truncate evaluated values before test in If
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2015-10-19
Sebastien Bourdeauducq
software: do not build libdyld and libunwind for lm32...
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2015-10-19
Sebastien Bourdeauducq
build/vivado: quote paths in Tcl (prevents problems...
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2015-10-15
Sebastien Bourdeauducq
sim: support execution of nested statement lists (typo)
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2015-10-15
Sebastien Bourdeauducq
sim: support execution of nested statement lists
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tree
2015-10-14
Sebastien Bourdeauducq
integration/builder: escape backslash in makefile defines
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2015-10-14
Sebastien Bourdeauducq
genlib/fifo: width_or_layout -> width
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2015-10-14
Sebastien Bourdeauducq
Merge branch 'new' of github.com:m-labs/misoc into new
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2015-10-14
Sebastien Bourdeauducq
integration/builder: fix building for SoCSDRAM-based...
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2015-10-13
Sebastien Bourdeauducq
test/divider: subtests
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2015-10-05
Sebastien Bourdeauducq
sim: make sure replaced memory signals are always in...
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2015-10-05
Sebastien Bourdeauducq
setup: include software and Verilog files
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2015-10-04
Sebastien Bourdeauducq
setup: add entry points
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2015-10-04
Sebastien Bourdeauducq
setup: fix readme
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tree
2015-10-04
Sebastien Bourdeauducq
travis/conda: build for python 3.5
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2015-10-04
Sebastien Bourdeauducq
travis/conda: build for python 3.5
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2015-10-04
Sebastien Bourdeauducq
travis: activate py35
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2015-10-04
Sebastien Bourdeauducq
travis: activate py35
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tree
2015-10-04
Sebastien Bourdeauducq
travis: python 3.5
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2015-10-04
Sebastien Bourdeauducq
travis: python 3.5
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2015-10-02
Sebastien Bourdeauducq
sdram: cleanup
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tree
2015-09-30
Sebastien Bourdeauducq
liteeth_mini: fix imports, replace Counter and FlipFlop
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2015-09-30
Sebastien Bourdeauducq
interconnect/stream: add multiplexer and demultiplexer
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2015-09-30
Sebastien Bourdeauducq
genlib/fifo: add missing imports
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2015-09-30
Sebastien Bourdeauducq
test/fifo: do not use Record
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2015-09-30
Sebastien Bourdeauducq
interconnect/stream: remove param, do not depend on...
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2015-09-30
Sebastien Bourdeauducq
lasmicon: do not depend on FIFO Record support
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2015-09-30
Sebastien Bourdeauducq
genlib/fifo: remove Record support
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2015-09-29
Sebastien Bourdeauducq
command line options support, CSR CSV, all targets...
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2015-09-29
Sebastien Bourdeauducq
flterm: cleanup
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2015-09-29
Sebastien Bourdeauducq
cores/gpio: fix import
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2015-09-29
Sebastien Bourdeauducq
build: stop at the first failed Quartus command
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2015-09-29
Sebastien Bourdeauducq
build: add missing import for Lattice Diamond
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2015-09-29
Sebastien Bourdeauducq
fhdl/FullMemoryWE: fix clocking
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2015-09-29
Sebastien Bourdeauducq
fhdl: typecheck ClockSignal and ResetSignal arguments
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2015-09-29
Sebastien Bourdeauducq
soc_core: simplify settings (assume CPU and CSR present)
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2015-09-29
Sebastien Bourdeauducq
minor fixes
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2015-09-28
Sebastien Bourdeauducq
Merge branch 'master' of github.com:m-labs/misoc
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2015-09-28
Sebastien Bourdeauducq
Revert "Sort constants in csr generation."
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2015-09-28
Sebastien Bourdeauducq
build: cleanup
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2015-09-28
Sebastien Bourdeauducq
basic out-of-tree build support (OK on PPro)
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2015-09-28
Sebastien Bourdeauducq
move software into misoc
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2015-09-26
Sebastien Bourdeauducq
Revert "Use shutil rather then rm -rf command."
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2015-09-26
Sebastien Bourdeauducq
Revert "Use shutil rather then rm -rf command."
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2015-09-26
Sebastien Bourdeauducq
sdram working on PPro
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2015-09-26
Sebastien Bourdeauducq
fhdl/specials/Tristate: handle i=None
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2015-09-26
Sebastien Bourdeauducq
fhdl/structure: relax type requirements for Array elements
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2015-09-26
Sebastien Bourdeauducq
replace flen with len
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2015-09-26
Sebastien Bourdeauducq
fhdl: replace flen with len
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2015-09-26
Sebastien Bourdeauducq
wrap expressions in Specials
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2015-09-26
Sebastien Bourdeauducq
add stream, fix CPUs and more imports. simple target...
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2015-09-26
Sebastien Bourdeauducq
fhdl: introduce wrap function
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2015-09-26
Sebastien Bourdeauducq
fhdl: export DUID
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2015-09-25
Sebastien Bourdeauducq
fix most imports
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2015-09-24
Sebastien Bourdeauducq
interconnect: add bus/bank components from Migen
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2015-09-24
Sebastien Bourdeauducq
setup: simpler version check, beta status
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