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travis: add conda package generation and upload + build doc
2015-04-23 Yann Sionneautravis: add conda package generation and upload + build doc
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2015-04-23 Yann SionneauAdd conda recipe for Migen
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2015-04-23 Yann Sionneaudoc: fix warnings during doc build
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2015-04-22 Guy Hutchisontravis: install verilator
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2015-04-22 Guy Hutchisontest: add test for asic_syntax
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2015-04-22 Alain Péteutadd Travis CI badge
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2015-04-21 Guy Hutchisonfhdl/verilog: add flag to produce ASIC-friendly output
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2015-04-20 Tim 'mithro' AnsellFixing shadowing of global index function.
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2015-04-20 Sebastien Bourdeauducqmibuild/altera: cleanup
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2015-04-20 Sebastien BourdeauducqRevert "add I/O standard definitions to mibuild/altera"
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2015-04-14 Sebastien Bourdeauducqtravis: disable email notification
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2015-04-14 Sebastien Bourdeauducqtravis: add IRC notification
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2015-04-14 Tim 'mithro' AnsellUsing a newer version of iverilog.
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2015-04-14 Tim 'mithro' AnsellMakefile now uses iverilog-vpi
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2015-04-14 Tim 'mithro' AnsellAdding .egg-info to the .gitignore
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2015-04-14 Tim 'mithro' AnsellAdding simple travis-ci build.
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2015-04-14 Sebastien BourdeauducqREADME: add link to online docs
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2015-04-14 Tim 'mithro' AnsellExpanding the install instructions a little.
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2015-04-12 Sebastien Bourdeauducqsim: fix to support ConvOutput
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2015-04-10 Guy HutchisonAdd example of hamming generator and checker instances
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2015-04-10 Robert Jordensstrace_tailor: make more generic, cleanup
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2015-04-09 Sebastien Bourdeauducqforgot other cordic files
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2015-04-08 Sebastien Bourdeauducqintroduce conversion output object (prevents file IO...
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2015-04-08 Sebastien Bourdeauducqmibuild/tools/write_to_file: use context manager
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2015-04-08 Sebastien Bourdeauducqgenlib: remove cordic (will live in pdq2)
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2015-04-05 Robert Jordensdecorators: remove deprecated semantics
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2015-04-05 Robert Jordensdecorators: fix stacklevel, export in std
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2015-04-05 Robert Jordensdecorators: fix ControlInserter
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2015-04-04 Sebastien Bourdeauducqfhdl/visit: remove TransformModule
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2015-04-04 Robert Jordensdecorators: fix class/instance logic
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2015-04-04 Robert Jordensfhdl/decorators: make the transform logic more idiomatic
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2015-04-04 Robert Jordensvivado: support phys_opt
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2015-04-04 Robert Jordensvivado: add support for pre_synthesis_commands
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2015-04-04 Robert Jordensvivado: make _build_files() a method and rename
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2015-04-04 Sebastien Bourdeauducqmibuild: support multiple specifications of include...
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2015-04-02 Sebastien BourdeauducqMerge branch 'master' of github.com:m-labs/migen
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2015-04-02 Yann Sionneaukc705: fix typo in platform file (LPC definition)
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2015-03-30 Sebastien Bourdeauducqmove xilinx_strace_tailor to tools
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2015-03-30 Sebastien BourdeauducqRevert "migen: create VerilogConvert and EDIFConvert...
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2015-03-30 Sebastien BourdeauducqRevert "migen/fhdl: pass fdict filename --> contents...
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2015-03-30 Sebastien BourdeauducqRevert "migen/fhdl/specials: use fdict to pass memory...
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2015-03-29 Sebastien BourdeauducqMerge branch 'master' of github.com:m-labs/migen
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2015-03-29 Sebastien Bourdeauducqplatforms/lx9_microboard,usrp_b100: fix bitgen opts
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2015-03-29 Florent Kermarrecplatforms/kc705: fix .bin generation with ISE and Vivado
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2015-03-27 Sebastien BourdeauducqMerge branch 'master' of https://github.com/m-labs...
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2015-03-27 Robert Jordensadd tool to build minimal xilinx toolchains
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2015-03-21 Robert Jordenstest_actor: add unittests for SimActor
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2015-03-21 Robert Jordenssim: keep track of unreferenced items
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2015-03-19 Robert Jordenspipistrello: switch is a button
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2015-03-19 Robert Jordenspipistrello: compress and load bitstream at 6MHz
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2015-03-19 Robert Jordenspipistrello: rename sdram->ddram
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2015-03-18 Sebastien Bourdeauducqfhdl/verilog: fix dummy signal initial event
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2015-03-18 Sebastien BourdeauducqRevert "fhdl/verilog: do not use initial begin in _printinit...
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2015-03-14 Sebastien Bourdeauducqmove pytholite to separate repos
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2015-03-14 Sebastien Bourdeauducqfhdl/visit: fix TransformModule
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2015-03-14 Sebastien Bourdeauducqmibuild/xilinx: export special_overrides dictionary
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2015-03-13 Sebastien Bourdeauducqmibuild/xilinx: remove obsolete CRG_DS
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2015-03-13 Sebastien Bourdeauducqmibuild: sanitize default clock management
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2015-03-13 Sebastien Bourdeauducqmibuild: get rid of Platform factory function, cleanup
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2015-03-10 Sebastien Bourdeauducqmibuild/sim/dut_tb: fix permissions
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2015-03-05 Sebastien Bourdeauducqgenlib/cordic: fix typos
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2015-03-03 Sebastien Bourdeauducqxilinx/programmer/vivado: fix Linux support
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2015-03-03 Sebastien Bourdeauducqplatforms/kc705: fix imports
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2015-03-02 Sebastien Bourdeauducqmibuild/sim: style fixes
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2015-02-28 Sebastien Bourdeauducqplatforms/pipistrello: remove unconnected SDRAM pins
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2015-02-28 Robert Jordenspipistrello: fix ddram dqs, cleanup constraints, add...
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2015-02-28 Robert Jordenspipistrello: switch back to xc3sprog and fast (papilio...
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2015-02-27 Robert Jordensxilinx/programmer: fix xc3sprog (GenericProgrammer)
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2015-02-27 Robert Jordenspipistrello: use fpgaprog
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2015-02-27 Robert Jordensadd fpgaprog programmer
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2015-02-27 Robert Jordensadd pipistrello platform
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2015-02-27 Sebastien BourdeauducqMerge branch 'master' of https://github.com/m-labs...
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2015-02-26 Sebastien Bourdeauducqplatforms/kc705: add user SMA clock
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2015-02-26 Yann Sionneaumibuild/kc705: add missing pins on FMC LPC
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2015-02-18 Yann Sionneaumibuild/kc705: add FMC connectors
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2015-02-18 Yann Sionneaumibuild: support pin names in IO extensions
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2015-02-14 Florent Kermarrecendpoints: add param_layout parameter (required to...
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2015-02-14 Florent Kermarrecactorlib/structuring: fix eop generation in Pack
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2015-02-14 Sebastien Bourdeauducqmibuild: make resolve_signals public
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2015-02-14 Florent Kermarrecmibuild: return verilog namespace with build
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2015-02-14 Florent Kermarrecremove crc since each crc is specific. It's probably...
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2015-01-22 Florent Kermarrecgenlib/crc: use OrderedDict
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2015-01-22 Florent Kermarrecfhdl/std: add FinalizeError import
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2014-12-21 Sebastien Bourdeauducqmibuild/xilinx_vivado: fix list aliasing problem
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2014-12-21 Florent Kermarrecxilinx_vivado: add parameters to pass specific commands...
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2014-12-21 Florent Kermarreccrc: modify CRCChecker to remove CRC and clean up
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2014-11-30 Sebastien Bourdeauducqbank: support direct mapping of CSRs on Wishbone
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2014-11-26 Yann SionneauWishbone DownConverter: Fix sel signal
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2014-11-25 Sebastien Bourdeauducqgenlib/fsm: add NextValue to replace reg/reg_next/ce...
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2014-11-21 Sebastien Bourdeauducqfhdl/tools: do not attempt to rename sync clock domain...
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2014-11-21 Sebastien Bourdeauducqflow: endpoint description structure with packetized...
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2014-11-21 Sebastien Bourdeauducqactorlib/fifo: add buffered parameter
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2014-11-20 Florent Kermarrecxilinx_vivado: use REM for comment on Windows
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2014-11-17 Sébastien BourdeauducqMerge pull request #8 from jix/fix-acitorlib-fifo
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2014-11-07 Guy Hutchisonadd hamming-code gen/check lib
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2014-11-05 Sebastien Bourdeauducqmibuild/programmer: add migen folders to flash proxy...
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2014-11-04 Sebastien Bourdeauducqvpi/ipc: fix decoding of index buffer
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2014-11-03 Sebastien Bourdeauducqtest/test_size: fix slice comparison
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2014-11-01 Sebastien Bourdeauducqactorlib/structuring/Pipeline: make 'busy' a signal
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2014-11-01 Florent Kermarrecactorlib/structuring: add Pipeline
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