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doc: multiple clock domains
2013-02-10 Sebastien Bourdeauducqdoc: multiple clock domains
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2013-02-10 Sebastien Bourdeauducqdoc: do not inline examples as this never works with...
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2013-02-10 Sebastien Bourdeauducqdoc: update to new Migen APIs
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2013-01-24 Sebastien Bourdeauducqfhdl/structure: store clock domain name
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2013-01-23 Sebastien Bourdeauducqfhdl/verilog: fix spurious clock/reset signals on multiple...
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2013-01-05 Sebastien Bourdeauducqcorelogic: complex arithmetic support
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2013-01-05 Sebastien Bourdeauducqfhdl: support nested statement lists
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2012-12-19 Sebastien Bourdeauducqpytholite: fix bug with constant assignment to register
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2012-12-19 Sebastien Bourdeauducqpytholite: prune unused registers
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2012-12-18 Sebastien BourdeauducqDo not use super()
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2012-12-16 Sebastien Bourdeauducqexamples/pytholite: fix imports
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2012-12-14 Sebastien Bourdeauducqfhdl/tools: bitreverse
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2012-12-14 Sebastien Bourdeauducqactorlib/sim/SimActor: do not drive busy low when generator...
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2012-12-14 Sebastien BourdeauducqToken: support idle_wait
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2012-12-14 Sebastien BourdeauducqMove Token to migen.flow.transactions
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2012-12-12 Sebastien Bourdeauducqreplace some forgotten is_abstract()
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2012-12-12 Sebastien BourdeauducqRemove ActorNode
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2012-12-06 Sebastien BourdeauducqMerge branch 'master' of github.com:milkymist/migen
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2012-12-06 Sebastien Bourdeauducqfhdl/structure: do not create Signal in Instance when...
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2012-12-06 Sebastien Bourdeauducqelsewhere: do not create interface in default param
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2012-12-06 Sebastien Bourdeauducqmigen/bank: do not create interface in default param
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2012-12-06 Sebastien Bourdeauducqbus/csr: add SRAM
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2012-12-06 Sebastien Bourdeauducqbank/csrgen: interface -> bus
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2012-12-05 Sebastien Bourdeauducqbank/description: define reset value of read signal
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2012-12-05 Sebastien Bourdeauducqactorlib/sim: drive busy high until generator is finished
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2012-12-01 Sebastien Bourdeauducqbus/wishbone/sram: accept memories < 32 bits
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2012-12-01 Sebastien Bourdeauducqbus/wishbone: add SRAM
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2012-11-30 Sebastien Bourdeauducqpytholite: fix bit width of selection signal
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2012-11-30 Sebastien Bourdeauducqpytholite: support signed registers
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2012-11-29 Sebastien Bourdeauducqcorelogic/roundrobin: fix request width (again)
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2012-11-29 Sebastien Bourdeauducqcorelogic/roundrobin: fix request width
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2012-11-29 Sebastien BourdeauducqFix various errors from new bitwidth/signedness system...
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2012-11-29 Sebastien Bourdeauducqfhdl/verilog: make signal behave as integers in arithmetic...
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2012-11-29 Sebastien Bourdeauducqfhdl/structure: add unary minus
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2012-11-29 Sebastien BourdeauducqReplace Signal(bits_for(... with Signal(max=...
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2012-11-29 Sebastien BourdeauducqNew specification for width and signedness
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2012-11-29 Sebastien BourdeauducqRefactor Case
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2012-11-28 Sebastien Bourdeauducqpytholite/reg: use source id in dictionary
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2012-11-28 Sebastien BourdeauducqRemove Constant
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2012-11-28 Sebastien Bourdeauducqexamples/sim/dataflow: update to new APIs
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2012-11-28 Sebastien Bourdeauducqexamples/dataflow/dma: update to new APIs
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2012-11-28 Sebastien Bourdeauducqexamples/basic: remove unroll example
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2012-11-28 Sebastien Bourdeauducqfhdl/structure: improved bits_for function
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2012-11-28 Sebastien Bourdeauducqvisit/NodeTransformer: copy most nodes
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2012-11-28 Sebastien Bourdeauducqfhdl/tools: use NodeTransformer to lower arrays
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2012-11-26 Sebastien Bourdeauducqexamples/basic/arrays: add array assignment to fragment
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2012-11-26 Sebastien Bourdeauducqfhdl/tools: use NodeVisitor
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2012-11-26 Sebastien BourdeauducqRemove unroll
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2012-11-26 Sebastien Bourdeauducqfhdl/structure: remove deprecated MemoryPort
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2012-11-26 Sebastien Bourdeauducqbus/wishbone2asmi: do not use MemoryPort
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2012-11-26 Sebastien Bourdeauducqactorlib/spi: do not use MemoryPort
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2012-11-26 Sebastien Bourdeauducqexamples/sim/memory: do not use MemoryPort
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2012-11-23 Sebastien Bourdeauducqactorlib/sim: Dumper
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2012-11-23 Sebastien Bourdeauducqfhdl/structure: disable we_granularity when larger...
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2012-11-23 Sebastien Bourdeauducqsim/generic/multiread: do not return spurious items
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2012-11-23 Sebastien Bourdeauducqpytholite: fix import of _Slice
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2012-11-23 Sebastien Bourdeauducqpytholite/io: support memory
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2012-11-23 Sebastien Bourdeauducqfhdl/structure/Memory: fix we width
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2012-11-23 Sebastien Bourdeauducqexamples/memory: use new get_port API
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2012-11-23 Sebastien Bourdeauducqfhdl/structure: add Memory.get_port API
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2012-11-23 Sebastien Bourdeauducqfhdl: use object creation counter (HUID) as hash. This...
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2012-11-23 Sebastien Bourdeauducqfhdl/structure: use sets for memories and instance...
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2012-11-23 Sebastien Bourdeauducqexamples/pytholite/uio: demonstrate memories
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2012-11-23 Sebastien Bourdeauducquio: support memories
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2012-11-23 Sebastien Bourdeauducqbus: memory initiator
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2012-11-23 Sebastien Bourdeauducqpytholite/io: fix Wishbone writes + support sel attribute
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2012-11-23 Sebastien Bourdeauducqexamples/pytholite/uio: simulate and convert Pytholite
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2012-11-23 Sebastien Bourdeauducqpytholite/io: support Wishbone reads
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2012-11-23 Sebastien Bourdeauducqpytholite/io: support Wishbone writes
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2012-11-23 Sebastien Bourdeauducqpytholite/compiler: pass keyword arguments to gen_io
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2012-11-18 Sebastien Bourdeauducqfhdl/verilog: remove empty cases
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2012-11-17 Sebastien Bourdeauducqsim/ipc/Message: convert values
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2012-11-17 Sebastien Bourdeauducqpytholite/transel: use python3-compatible comparison...
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2012-11-17 Sebastien Bourdeauducqexamples/pytholite: add uio example
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2012-11-17 Sebastien Bourdeauducquio/ioo: fix UnifiedIOSimulation
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2012-11-17 Sebastien Bourdeauducquio: support generator trampolining in simulation
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2012-11-17 Sebastien Bourdeauducquio: add simulation I/O object
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2012-11-17 Sebastien Bourdeauducquio: unified I/O object
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2012-11-17 Sebastien Bourdeauducqactorlib/sim: swap TokenExchanger parameters
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2012-11-17 Sebastien Bourdeauducqbus/csr: allow specifying existing interface
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2012-11-17 Sebastien Bourdeauducqbus/asmibus: swap port position to be consistent with...
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2012-11-17 Sebastien Bourdeauducqbus/wishbone: allow specifying existing interface
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2012-11-17 Sebastien Bourdeauducqbus/transactions: add busname parameter
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2012-11-17 Sebastien Bourdeauducqactorlib/sim: split TokenExchanger
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2012-11-16 Sebastien Bourdeauducqpytholite/io: support token pull
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2012-11-16 Sebastien Bourdeauducqexamples/pytholite/basic: demonstrate conversion to...
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2012-11-16 Sebastien Bourdeauducqexamples: basic Pytholite demo
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2012-11-16 Sebastien Bourdeauducqpytholite/io: support token push
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2012-11-11 Sebastien Bourdeauducqpytholite: move expression and register handling to...
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2012-11-11 Sebastien Bourdeauducqpytholite/compiler: recognize composite I/O pattern
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2012-11-11 Sebastien Bourdeauducqpytholite/compiler: visit_assign_special
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2012-11-11 Sebastien Bourdeauducqpytholite: move FSM management to separate module
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2012-11-11 Sebastien Bourdeauducqpytholite/compiler: refactor visit_block
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2012-11-10 Sebastien Bourdeauducqpytholite/compiler: clean up visit_statement
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2012-11-10 Sebastien Bourdeauducqpytholite: forward 'yield call' statements to io module
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2012-11-10 Sebastien Bourdeauducqpytholite: introduce io module
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2012-11-10 Sebastien Bourdeauducqpytholite/compiler: support bitslice
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2012-11-10 Sebastien Bourdeauducqpytholite/compiler: support range(constants) in for...
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2012-11-10 Sebastien Bourdeauducqpytholite/compiler: cleanup print statements
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2012-11-10 Sebastien Bourdeauducqpytholite/compiler: support for loops (iterating on...
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