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sv_binutils: provide Boolean class and Rc field
2022-09-24 Dmitry Selyutinsv_binutils: provide Boolean class and Rc field
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2022-09-24 Dmitry Selyutinpower_insn: provide Record.Rc field
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2022-09-24 Dmitry Selyutinpower_insn: simplify rsvd naming; drop unused rsvd
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2022-09-24 Dmitry Selyutinpower_insn: replace Record.function with Record.mode
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2022-09-24 Dmitry Selyutinpysvp64asm: expand vector register macros
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2022-09-24 Dmitry Selyutinsv_binutils: support opcodes offset representation
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2022-09-24 Dmitry Selyutinsv_binutils: fix fields traversal
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2022-09-24 Dmitry Selyutinpower_insn: sort database finally
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2022-09-24 Dmitry Selyutinpower_insn: provide missing cr_in2 properties
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2022-09-24 Dmitry Selyutinsv_binutils: generate svp64_cr_in2 opindices
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2022-09-24 Dmitry Selyutinsv_binutils: generate BA opindex
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2022-09-24 Dmitry Selyutinpower_fields: restore class-oriented traversal
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2022-09-20 Dmitry Selyutinpysvp64asm: fix sz handling
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2022-09-20 Dmitry Selyutinpower_insn: unify predicates
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2022-09-20 Dmitry Selyutintest_pysvp64dis: test vli specifier
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2022-09-20 Dmitry Selyutinpysvp64asm: support vli specifier
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2022-09-20 Dmitry Selyutinpower_insn: support vli specifier
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2022-09-20 Dmitry Selyutinpower_insn: simplify specifiers sorting
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2022-09-20 Dmitry Selyutinpower_insn: custom sz handling for branches
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2022-09-20 Dmitry Selyutinpysvp64asm: update sz upon snz specifier
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2022-09-20 Dmitry Selyutinpower_insn: support vs/vsi/vsb/vsbi/ctr/cti specifiers
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2022-09-20 Dmitry Selyutinpysvp64asm: support branch modes
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2022-09-20 Dmitry Selyutinpower_svp64_rm: sync it with tables
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2022-09-20 Dmitry Selyutinpower_insn: support common branch disassembly
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2022-09-19 Dmitry Selyutinpower_insn: simplify branch table
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2022-09-19 Dmitry Selyutinpower_insn: provide SVL/CTR branch fields
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2022-09-19 Dmitry Selyutintest_pysvp64dis: test els specifier
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2022-09-19 Dmitry Selyutinpower_insn: support els specifier
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2022-09-18 Dmitry Selyutinpower_insn: perform cleanup; turn comments into docstrings
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2022-09-18 Dmitry Selyutinpower_insn: introduce common mr/mrr RM class
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2022-09-18 Dmitry Selyutinpower_insn: support ff/pr predicates
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2022-09-18 Dmitry Selyutinpysvp64asm: restore original BO
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2022-09-18 Dmitry Selyutinpower_insn: fix CR ops classes naming
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2022-09-18 Dmitry Selyutinpower_insn: fix coding style
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2022-09-18 Dmitry Selyutinpower_insn: introduce common dz/sz RM classes
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2022-09-18 Dmitry Selyutinpower_insn: introduce common zz RM class
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2022-09-18 Dmitry Selyutinpower_insn: introduce common Sat RM class
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2022-09-18 Dmitry Selyutinpower_insn: introduce common FFPRRc0 RM class
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2022-09-18 Dmitry Selyutinpower_insn: simplify RM classes naming
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2022-09-18 Dmitry Selyutintest_pysvp64dis: test RC1/~RC1 in ff/pr
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2022-09-18 Dmitry Selyutinpower_insn: fix Rc operand accessor
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2022-09-18 Dmitry Selyutinpower_insn: support RC1/~RC1 in ff/pr
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2022-09-18 Dmitry Selyutinpower_insn: adjust table comments
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2022-09-18 Dmitry Selyutinpower_insn: another minor ld/st imm table cleanup
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2022-09-18 Dmitry Selyutinpysvp64asm: make zz also set src_zero
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2022-09-18 Dmitry Selyutinpower_insn: minor CR cleanup
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2022-09-18 Dmitry Selyutinpower_insn: minor cleanup
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2022-09-18 Dmitry Selyutinpower_insn: support m/sm/dm specifiers
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2022-09-18 Dmitry Selyutinpower_insn: pass record to specifiers
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2022-09-18 Dmitry Selyutintest_pysvp64dis: test mrr/svm specifiers
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2022-09-18 Dmitry Selyutinpower_fields: fix __lt__ operator
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2022-09-18 Dmitry Selyutinpower_insn: support mrr specifier
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2022-09-18 Dmitry Selyutinpower_insn: support svm specifier
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2022-09-18 Dmitry Selyutinpower_insn: sync RM modes
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2022-09-18 Dmitry Selyutinpower_insn: support w/dw/sw specifiers
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2022-09-18 Dmitry Selyutinpower_insn: decouple branch modes
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2022-09-18 Dmitry Selyutinpower_insn: decouple cr_op modes
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2022-09-18 Dmitry Selyutintest_pysvp64dis: test sw specifier
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2022-09-18 Dmitry Selyutinpower_insn: support sw specifier
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2022-09-18 Dmitry Selyutinpower_insn: decouple common normal and ld/st RM
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2022-09-18 Dmitry Selyutinpower_insn: support ew specifier
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2022-09-18 Dmitry Selyutinpower_insn: simplify subvl disassembly
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2022-09-17 Dmitry Selyutinpower_insn: fix sat checks
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2022-09-17 Dmitry Selyutinpysvp64asm: SVP64 instruction debug logs
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2022-09-17 Dmitry Selyutinpower_fields: fix mapping class accessor
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2022-09-17 Dmitry Selyutinpower_fields: support boolean checks
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2022-09-17 Dmitry Selyutinpower_insn: fix zz specifiers
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2022-09-17 Dmitry Selyutinpower_insn: drop field length method again
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2022-09-17 Dmitry Selyutinpower_insn: decouple base ld/st idx RM
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2022-09-17 Dmitry Selyutinpower_insn: decouple base ld/st imm RM
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2022-09-17 Dmitry Selyutinpower_insn: decouple base normal RM
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2022-09-17 Dmitry Selyutinpower_insn: support saturation mode
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2022-09-17 Dmitry Selyutinpower_insn: support dz/sz specifiers
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2022-09-17 Dmitry Selyutinselectable_int: drop redundant operators
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2022-09-17 Dmitry Selyutinpower_insn: support vec2/vec3/vec4
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2022-09-17 Dmitry Selyutinpower_insn: support specifiers
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2022-09-17 Dmitry Selyutinpower_fields: fix comparison operators
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2022-09-17 Dmitry Selyutinpower_insn: refactor and fix RM mappings
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2022-09-17 Dmitry Selyutinpower_fields: fix field slicing
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2022-09-17 Dmitry Selyutinpower_insn: fix mapping bits accessors
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2022-09-17 Dmitry Selyutinpower_fields: support traversing over instances
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2022-09-17 Dmitry Selyutinpower_insn: drop redundant table
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2022-09-17 Dmitry Selyutinpower_fields: inherit docstrings upon remap
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2022-09-16 Dmitry Selyutintest_power_decoder: mark minor_19.csv as opint
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2022-09-16 Dmitry Selyutintest_pysvp64dis: test fptrans
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2022-09-16 Dmitry Selyutinselectable_int: replace bit_count with bit_length
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2022-09-16 Dmitry Selyutinsv_binutils_fptrans: adopt script for reuse
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2022-09-16 Dmitry Selyutinpower_insn: postpone updating per-instruction operands
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2022-09-15 Dmitry Selyutinpower_insn: perform faster PPC database lookups
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2022-09-15 Dmitry Selyutinsv_binutils_fptrans: fix disassembly
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2022-09-15 Dmitry Selyutinsv_binutils_fptrans: fptrans binutils generator
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2022-09-15 Dmitry Selyutinpower_insn: support instruction bytes conversion
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2022-09-15 Dmitry Selyutinselectable_int: allow setting multiple bit
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2022-09-15 Dmitry Selyutinpower_insn: allow accessing instruction bits
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2022-09-13 Dmitry Selyutinpower_insn: support signed operands
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2022-09-13 Dmitry Selyutinpower_insn: support branch RM
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2022-09-13 Dmitry Selyutinpower_insn: support CR RM
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2022-09-13 Dmitry Selyutinpower_enums: convert SVExtra to RegType
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2022-09-13 Dmitry Selyutinpower_insn: refactor RM mapping
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2022-09-13 Dmitry Selyutinsv_binutils: support multiple opcodes; minor fixes
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