2023-06-02 |
Dmitry Selyutin | sv_binutils: fix broken script
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2023-06-02 |
Luke Kenneth Casson... | add power_decode_svp64_rm.py capability for new LD...
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2023-06-02 |
Luke Kenneth Casson... | add quick test_pysvp64dis.py of LD/ST data-dependent...
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2023-06-02 |
Luke Kenneth Casson... | https://bugs.libre-soc.org/show_bug.cgi?id=1047
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2023-06-02 |
Luke Kenneth Casson... | whitespace cleanup (80 char per line hard limit)
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2023-06-02 |
Luke Kenneth Casson... | comment about massive unnecessary code-duplication...
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2023-06-02 |
Luke Kenneth Casson... | fix setvl unit test which happened to use deprecated
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2023-06-02 |
Jacob Lifshay | fix add-like CA/OV outputs
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2023-06-02 |
Jacob Lifshay | fix broken test case
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2023-06-02 |
Jacob Lifshay | add addex to simulator
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2023-06-02 |
Jacob Lifshay | fix typo when getting pseudo-code output variables
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2023-06-02 |
Jacob Lifshay | switch to testing Rc=1 variants
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2023-06-02 |
Jacob Lifshay | fix `neg[o].` causing the simulator to raise TypeError
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2023-06-02 |
Jacob Lifshay | add case_nego_
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2023-06-02 |
Jacob Lifshay | rename le -> lt since CR bits are lt, gt, eq, and so...
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2023-06-02 |
Luke Kenneth Casson... | remove DCT/iDCT redundant modes which require less...
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2023-06-02 |
Jacob Lifshay | add test cases for ca/ov outputs of a bunch of add...
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2023-06-02 |
Jacob Lifshay | add check against PIA's output downloaded from ftp...
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2023-06-02 |
Luke Kenneth Casson... | all whitespace. reduce to under 80 chars
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2023-06-02 |
Luke Kenneth Casson... | update comments on svstep returning pack/unpack state
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2023-06-02 |
Konstantinos Margaritis | fix docs to align with recent change in setvl syntax...
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2023-06-02 |
Luke Kenneth Casson... | whitespace - 80 char limit
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2023-06-02 |
Luke Kenneth Casson... | in xchacha20 svp64 assembler remove r22 from setvl and
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2023-06-02 |
Luke Kenneth Casson... | updated simplev setvl specification pseudocode: MAJOR...
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2023-06-02 |
Luke Kenneth Casson... | whitespace
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2023-06-02 |
Luke Kenneth Casson... | whoops added "CRB-Form" format not "CRB"
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2023-06-02 |
Konstantinos Margaritis | add .bin files to target
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2023-06-02 |
Konstantinos Margaritis | fix typo
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2023-06-02 |
Konstantinos Margaritis | and *.elf files
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2023-06-02 |
Konstantinos Margaritis | also clean *.bin files
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2023-06-02 |
Konstantinos Margaritis | Enable compilation and execution on x86 as well
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2023-06-02 |
Konstantinos Margaritis | Pass object code filename instead of actual data
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2023-06-02 |
Luke Kenneth Casson... | brief explanation of Vertical-First
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2023-06-02 |
Luke Kenneth Casson... | spelling
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2023-06-02 |
Luke Kenneth Casson... | whitespace cleanup
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2023-06-02 |
Konstantinos Margaritis | Documentation about SVP64 implementation of XChacha20
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2023-06-02 |
Konstantinos Margaritis | fix tabs
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2023-06-02 |
Konstantinos Margaritis | final working version
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2023-06-02 |
Konstantinos Margaritis | add for syntax highlighting
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2023-06-02 |
Konstantinos Margaritis | comment some prints, use correct boundaries when copying...
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2023-06-02 |
Konstantinos Margaritis | use svp64 version
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2023-06-02 |
Konstantinos Margaritis | print correct/svp64 cipher text
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2023-06-02 |
Konstantinos Margaritis | Add xchacha_encrypt_bytes_svp64
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2023-06-02 |
Konstantinos Margaritis | call xchacha_encrypt_bytes_svp64
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2023-06-02 |
Konstantinos Margaritis | rewrite loop
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2023-06-02 |
Konstantinos Margaritis | Refactor code, add quarterround macros
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2023-06-02 |
Konstantinos Margaritis | Add xchacha_encrypt_bytes_svp64 wrapper function
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2023-06-02 |
Luke Kenneth Casson... | add CRB-Form fields for crternlogi and crbinlog, they...
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2023-06-02 |
Konstantinos Margaritis | First working version of SVP64 arm xchacha_hchacha20...
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2023-06-02 |
Luke Kenneth Casson... | set MAXVL=VL=32 first, then set vertical-first separately
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2023-06-02 |
Konstantinos Margaritis | used same input data as the actual C test
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2023-06-02 |
Konstantinos Margaritis | WIP: fixed some registers, wrong VL
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2023-06-02 |
Konstantinos Margaritis | uncomment loop
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2023-06-02 |
Luke Kenneth Casson... | change target registers in test_caller_svp64_chacha20...
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2023-06-02 |
Luke Kenneth Casson... | whoops use same temp reg for ctr
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2023-06-02 |
Luke Kenneth Casson... | parameterise svstep RT (set to 16 in chacha20 test)
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2023-06-02 |
Luke Kenneth Casson... | parameterising VL and SHAPE0-2 in chacha20 test
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2023-06-02 |
Luke Kenneth Casson... | parameterise the target block in chacha20 test,
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2023-06-02 |
Luke Kenneth Casson... | add print-out for chacha20 schedule
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2023-06-02 |
Konstantinos Margaritis | fix tabs
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2023-06-02 |
Konstantinos Margaritis | [WIP] xchacha20 SVP64 implementation using pypowersim...
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2023-06-02 |
Konstantinos Margaritis | use absolute path
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2023-06-02 |
Luke Kenneth Casson... | update pseudocode for dsld/dsrd to note that only when...
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2023-06-02 |
Luke Kenneth Casson... | after move data to new directory, update runner-script...
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2023-06-02 |
Dmitry Selyutin | power_enums: enable Rc-aware dsld/dsrd
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2023-06-02 |
Dmitry Selyutin | fields.text: fix TLI XO format
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2023-06-02 |
Dmitry Selyutin | bitmanip.mdwn: add missing Rc static operand
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2023-06-02 |
Dmitry Selyutin | svp64_utf_8_validation.py: convert labels to addresses
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2023-06-02 |
Dmitry Selyutin | power_insn: fix dst/src duplication detection
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commit | commitdiff | tree |
2023-06-02 |
Dmitry Selyutin | power_insn: canonicalize SVP64 insn name
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commit | commitdiff | tree |
2023-06-02 |
Dmitry Selyutin | power_insn: hack CR assembly
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commit | commitdiff | tree |
2023-06-02 |
Dmitry Selyutin | power_insn: override bogus FMA instructions
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commit | commitdiff | tree |
2023-06-02 |
Dmitry Selyutin | power_insn: refactor operands; simplify lookups
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commit | commitdiff | tree |
2023-06-02 |
Dmitry Selyutin | pysvp64asm: drop obsolete code
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commit | commitdiff | tree |
2023-06-02 |
Dmitry Selyutin | power_insn: fix paired registers disassembly
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commit | commitdiff | tree |
2023-06-02 |
Dmitry Selyutin | power_insn: support legacy style
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commit | commitdiff | tree |
2023-06-02 |
Dmitry Selyutin | power_insn: major refactoring and cleanup
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commit | commitdiff | tree |
2023-06-02 |
Dmitry Selyutin | pysvp64dis: do not create temporary bytes upon load
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2023-06-02 |
Dmitry Selyutin | power_enums: support paired registers
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2023-06-02 |
Dmitry Selyutin | power_fields: support assignment to same class instance
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2023-06-02 |
Dmitry Selyutin | power_enums: fix CR register types
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2023-06-02 |
Dmitry Selyutin | power_enums: fix RC1 predicates conversion
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2023-06-02 |
Dmitry Selyutin | pysvp64asm: avoid empty fields
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2023-06-02 |
Dmitry Selyutin | isatables: split dsld/dsrd Rc versions
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commit | commitdiff | tree |
2023-06-02 |
Dmitry Selyutin | power_insn: fix signed operands assembly
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commit | commitdiff | tree |
2023-06-02 |
Dmitry Selyutin | power_insn: fix arguments conversion
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commit | commitdiff | tree |
2023-06-02 |
Dmitry Selyutin | power_insn: fix specifiers errors
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commit | commitdiff | tree |
2023-06-02 |
Dmitry Selyutin | power_insn: common records lookup
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commit | commitdiff | tree |
2023-06-02 |
Dmitry Selyutin | power_insn: consider EXTS operand as signed
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2023-06-02 |
Dmitry Selyutin | power_insn: discard SVP64 record for word instructions
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2023-06-02 |
Dmitry Selyutin | power_insn: support pi/lf specifiers
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2023-06-02 |
Dmitry Selyutin | power_insn: support ctr/cti specifiers
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2023-06-02 |
Dmitry Selyutin | power_insn: support vs/vsi/vsb/vsbi specifiers
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2023-06-02 |
Dmitry Selyutin | power_insn: support lru specifier
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2023-06-02 |
Dmitry Selyutin | power_insn: support slu specifier
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2023-06-02 |
Dmitry Selyutin | power_insn: support sl specifier
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2023-06-02 |
Dmitry Selyutin | power_insn: support snz specifier
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2023-06-02 |
Dmitry Selyutin | power_insn: support all specifier
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commit | commitdiff | tree |
2023-06-02 |
Dmitry Selyutin | power_insn: support crm specifier
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2023-06-02 |
Dmitry Selyutin | power_insn: support mr/mrr specifiers
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