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platforms/nexys4ddr: add sdcard pins
2020-01-03
Gabriel Somlo
interconnect/csr_bus/SRAM: allow 64-bit alignment ...
Signed-off-by:
Gabriel Somlo
<gsomlo@gmail.com>
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2019-12-21
Gabriel Somlo
cpu/rocket: variants with double (128b) and quad (256b...
Signed-off-by:
Gabriel Somlo
<gsomlo@gmail.com>
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2019-12-21
Gabriel Somlo
soc_core: csr_alignment assertions
Signed-off-by:
Gabriel Somlo
<gsomlo@gmail.com>
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2019-12-21
Gabriel Somlo
cpu/rocket: access PLIC registers via pointer dereference
Signed-off-by:
Gabriel Somlo
<gsomlo@gmail.com>
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2019-12-12
Gabriel Somlo
soc_core: additional CSR safety assertions
Signed-off-by:
Gabriel Somlo
<gsomlo@gmail.com>
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2019-11-18
Gabriel Somlo
soc_sdram, bios/sdram: support sdram init for csr_data_width...
Signed-off-by:
Gabriel Somlo
<gsomlo@gmail.com>
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2019-11-01
Gabriel Somlo
cpu/rocket: parameterize axi interface data width
Signed-off-by:
Gabriel Somlo
<gsomlo@gmail.com>
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2019-11-01
Gabriel Somlo
soc_sdram: remove upper limit on usable main RAM
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2019-11-01
Gabriel Somlo
cpu/rocket, soc_sdram: Connect mem_axi to LiteDRAM...
Signed-off-by:
Gabriel Somlo
<gsomlo@gmail.com>
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2019-10-24
Gabriel Somlo
build/lattice/trellis: optionally allow failure if...
Signed-off-by:
Gabriel Somlo
<gsomlo@gmail.com>
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2019-10-09
Gabriel Somlo
cpu/rocket: swap main_mem and io regions
Signed-off-by:
Gabriel Somlo
<gsomlo@gmail.com>
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2019-10-08
Gabriel Somlo
builder: use the SoC's existing shadow base with get_csr_hea...
Signed-off-by:
Gabriel Somlo
<somlo@cmu.edu>
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2019-10-01
Gabriel Somlo
soc/integration: ensure CSR constants are in uppercase
Signed-off-by:
Gabriel Somlo
<gsomlo@gmail.com>
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