riscv-tests.git
2013-09-11 Andrew WatermanAdd AMOXOR test
2013-08-25 Andrew WatermanDon't build vector benchmarks for now
2013-08-25 Andrew Watermandon't emit vvcfg for now
2013-08-24 Andrew WatermanAdd autoconf-generated configure
2013-08-24 Andrew WatermanReflect changes to ISA
2013-08-24 Sebastien MiroloMerge pull request #1 from smirolo/configure
2013-08-12 Sebastien MiroloMerge branch 'master' of git://github.com/ucb-bar/riscv...
2013-07-26 Andrew WatermanRemove JALR static hints
2013-07-24 Sebastien Mirolofeature: add autoconf
2013-06-14 Henry Cookremoved bad mt test
2013-06-13 Henry Cookmultithreading tests from 152 lab 5
2013-06-10 Andrew WatermanDon't disassemble zeros
2013-05-16 Yunsup Leeadd failing multiply test
2013-05-14 Yunsup Leechange riscv-isa-run to spike
2013-05-02 Andrew Watermanuse RVTEST_RV64UF macro for FPU tests
2013-05-02 Andrew Watermanpass all FP tests if FPU not present
2013-04-30 Andrew Watermanadd first RV32 tests
2013-04-30 Yunsup Leeadd benchmarks gitignore
2013-04-30 Yunsup Leebenchmarks initial commit
2013-04-24 Yunsup Leeadd gitignore
2013-04-24 Yunsup Leecleanup Makefiles in isa
2013-04-24 Yunsup Leeadd missing RVTEST_CODE_END macros
2013-04-24 Yunsup Leeadd more header information to test_macros
2013-04-24 Yunsup Leechange label names to avoid conflicts with test code
2013-04-22 Yunsup Leeget rid of RVTEST_PASS_NOFP
2013-04-22 Yunsup Leeinitial commit