riscv-tests.git
2017-09-01 Tim NewsomeAdd some infrastructure for multicore tests.
2017-09-01 Tim NewsomeUse 32-bit link script for 32-bit target.
2017-08-28 Tim NewsomeThis file isn't ready yet.
2017-08-28 Tim NewsomeForgot to add this file.
2017-08-28 Tim NewsomeIncrease remotetimeout for spike targets.
2017-08-28 Tim NewsomeFix rebase bug.
2017-08-28 Tim NewsomeMake MemTestBlock output a more descriptive error.
2017-08-28 Tim NewsomeFix MemTest* after sloppy rebase.
2017-08-28 Tim NewsomeRename test to MulticoreRunHaltStepiTest.
2017-08-28 Tim NewsomeMake pylint happy.
2017-08-28 Tim NewsomeWIP multicore testing.
2017-08-28 Tim NewsomeWIP towards multiple gdb instances.
2017-08-28 Tim NewsomeMake the debug tests aware of multicore.
2017-08-28 Tim NewsomeIncrease delay in UserInterrupt.
2017-08-16 Palmer DabbeltMerge pull request #67 from riscv/sfence_vma
2017-08-16 Palmer DabbeltInform GCC that "sfence.vma" clobbers memory
2017-08-14 Tim NewsomePut logfile code back so everything works again.
2017-08-14 Megan WachsMerge pull request #66 from riscv/debug_user_niceness
2017-08-14 Megan Wachsdebug: clean up Temporary Log File messages
2017-08-14 Megan Wachsdebug: Avoid None type error
2017-08-14 Megan Wachsdebug: Revert change to print backtrace, as that is...
2017-08-14 Megan Wachsdebug: Allow OpenOCD startup timeout to be specified...
2017-08-14 Megan WachsWhen a test fails with exception, actually print out...
2017-08-13 Tim NewsomeMake MemTest* catch reading too many words.
2017-08-11 Tim NewsomeShow the OpenOCD log in all(?) failure cases.
2017-08-11 Tim NewsomePrint out name of logfile when debug test is run.
2017-08-11 Tim NewsomeWhen make fails to run a test, print out the log.
2017-08-11 Tim NewsomeDon't use `set pipefail` which is a bashism.
2017-08-11 Tim NewsomeDon't eat errors in debug Makefile.
2017-08-10 Tim NewsomeDon't run debug tests as part of build.
2017-08-10 Tim NewsomePylint target files as well.
2017-08-10 Tim NewsomeGive these sim targets a chance of passing.
2017-08-08 Palmer DabbeltMerge pull request #62 from richardxia/only-emit-f...
2017-08-07 Richard Xiarv64[ms]i-csr: Only emit F instructions when compiled...
2017-08-04 Andrew WatermanRV32 div tests should use -2^31 for min value, not...
2017-08-04 Andrew WatermanImprove RVC test
2017-07-31 Tim NewsomeFix the end of MulticoreTest.
2017-07-27 Tim NewsomeMake pylint happy.
2017-07-26 Tim NewsomeUse new OpenOCD messages to determine gdb port.
2017-07-21 Tim NewsomeOnly clean up logfiles that we know we created.
2017-07-21 Tim NewsomeAdd back code to clean up triggers in entry.S
2017-07-18 Tim NewsomeCheck all PCs after reset.
2017-07-13 Tim NewsomePrint out logs in more failure cases.
2017-07-06 Tim NewsomeMerge pull request #58 from riscv/fpga_reset_halt
2017-07-06 mwachs5debug: Make the 'out of reset' tests actually apply...
2017-07-03 Tim NewsomeAdd gdb_setup to target for arbitrary gdb commands
2017-07-03 Tim NewsomeDon't clear triggers during execution.
2017-06-27 Tim NewsomeTolerate missing misa register.
2017-06-27 Tim NewsomeMerge pull request #55 from riscv/debug
2017-06-27 Tim NewsomeMerge pull request #56 from riscv/config
2017-06-26 Tim NewsomeMove target definition into individual files.
2017-06-23 Tim NewsomeTest gdb/OpenOCD during regular test run.
2017-06-23 Tim NewsomeAdd basic multicore test.
2017-06-20 Tim NewsomeSmoketest multicore.
2017-06-19 Tim NewsomeWrite OpenOCD log when it crashes early.
2017-06-16 Tim NewsomeStore logs for all tests in logs/
2017-06-15 Tim NewsomeTest 64-bit addressing.
2017-06-09 Tim NewsomeAdd final echo to E300/U500 OpenOCD scripts
2017-06-09 Tim NewsomeMake HiFive1 testing (mostly) work again
2017-06-09 Tim NewsomeFix using defaults for --server_cmd and --sim_cmd
2017-06-09 Tim NewsomeDefault to openocd, not riscv-openocd
2017-06-05 Tim NewsomeMake pylint happy.
2017-05-25 Palmer DabbeltMerge pull request #53 from richardxia/fail-if-simulato...
2017-05-23 Richard XiaFail if simulator exits early.
2017-05-22 Andrew WatermanminNum -> minimumNumber
2017-05-18 Megan WachsMerge pull request #52 from riscv/vcs_sim_cmd
2017-05-18 Megan Wachsdebug: Correct the calling for a 32-bit simulation...
2017-05-17 Andrew WatermanManually assemble bad shift amount, since assembler...
2017-05-17 Palmer DabbeltShorten the debug tests
2017-05-17 Palmer DabbeltMerge pull request #49 from riscv/no_examine_target
2017-05-17 Palmer DabbeltShow the debug logs to stdout, to avoid travis timeouts
2017-05-16 Megan Wachsdebug: remove unused auto_int function
2017-05-16 Megan Wachsdebug: Allow skipping the ExamineTarget task.
2017-05-16 Megan Wachsdebug: Allow skipping the ExamineTarget step by specify...
2017-05-16 Palmer DabbeltMerge pull request #47 from riscv/debug-0.13
2017-05-16 Palmer DabbeltChange Spike's RAM location to match the linker script
2017-05-16 Palmer DabbeltLink the infinate loop at 0x10000000
2017-05-16 Palmer DabbeltLink in encoding.h instead of providing a path to it
2017-05-16 Megan Wachsdebug: Update OpenOCD configs.
2017-05-16 Palmer DabbeltCopy debug/programs to the build dir, so debug-check...
2017-05-16 Palmer DabbeltMerge pull request #48 from riscv/tests
2017-05-15 Palmer DabbeltDisable another PRIV mention, for now
2017-05-15 Palmer DabbeltDisable the tests that touch PRIV, it's not implemented yet
2017-05-15 Palmer DabbeltHave the openocd invocation match the spike invocation
2017-05-15 Palmer DabbeltDisable some failing tests for now
2017-05-15 Palmer DabbeltDon't rely on Spike's default ISA
2017-05-15 Palmer DabbeltDon't use the RTOS, and do "reset halt"
2017-05-15 Palmer DabbeltLet Spike have the default amount of RAM
2017-05-15 Palmer DabbeltDon't build openocd here, it's in riscv-tools now
2017-05-15 Megan Wachsdebug: fix the make target for debug-check
2017-05-15 Megan Wachsdebug: Use consistent 'sim_cmd' argument.
2017-05-15 Megan WachsMerge remote-tracking branch 'origin/priv-1.10' into...
2017-05-05 Andrew WatermanCheck UXL in sstatus
2017-05-05 Andrew WatermanTest that superpage PTEs trap when PPN LSBs are set
2017-05-05 Andrew WatermanRegularize control flow in dirty-bit test
2017-05-01 Andrew WatermanSet ELF entry point correctly
2017-04-26 Palmer DabbeltSet FS before reading F registers
2017-04-26 Andrew WatermanAdd abort() for benefit of benchmark code
2017-04-19 Megan Wachsbump OpenOCD version
2017-04-18 Megan Wachsdebug: Don't halt out of reset. It's unrealistic. Use...
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