git.libre-soc.org Git - riscv-tests.git/summary

2018-09-24	Andrew Waterman	bump env master	commit \| commitdiff \| tree
2018-09-13	Tim Newsome	Assert if HiFive1 program is too large.	commit \| commitdiff \| tree
2018-09-13	Tim Newsome	Put debug test stack in data instead of text	commit \| commitdiff \| tree
2018-09-08	Andrew Waterman	Merge branch 'tommythorn-master'	commit \| commitdiff \| tree
2018-09-08	Tommy Thorn	RV64 s{ll,ra,rl}w tests with non-canonical values	commit \| commitdiff \| tree
2018-09-07	Andrew Waterman	Revert "breakpoint.S: Don't assume trigger is hardwired...	commit \| commitdiff \| tree
2018-09-06	Tommy Thorn	breakpoint.S: Don't assume trigger is hardwired to...	commit \| commitdiff \| tree
2018-09-03	Tim Newsome	Merge pull request #156 from riscv/PrivChange	commit \| commitdiff \| tree
2018-08-31	Tim Newsome	Fix CustomRegisterTest.	commit \| commitdiff \| tree
2018-08-29	Tim Newsome	Add test case for `riscv expose_custom`.	commit \| commitdiff \| tree
2018-08-28	Tim Newsome	Reset address translation/perms before PrivChange	commit \| commitdiff \| tree
2018-08-28	Tim Newsome	Neuter TriggerStoreAddressInstant	commit \| commitdiff \| tree
2018-08-27	Tim Newsome	Make pylint happy.	commit \| commitdiff \| tree
2018-08-25	Andrew Waterman	Temporarily disabling PrivChange test	commit \| commitdiff \| tree
2018-08-24	Tim Newsome	Make pylint happy with change d1d2d953b5016b465.	commit \| commitdiff \| tree
2018-08-24	Tim Newsome	Get all of the log into the final log file	commit \| commitdiff \| tree
...

5 years ago	sv	shortlog \| log \| tree
6 years ago	master	shortlog \| log \| tree