test/nmigen/gen/controller/top.v

   1 /* Generated by Yosys 0.9+932 (git sha1 ff8529a, gcc 4.8.5 -fPIC -Os) */
   2
   3 (* generator = "nMigen" *)
   4 (* \nmigen.hierarchy  = "top._fsm" *)
   5 module _fsm(tap_fsm_isdr, jtag_clk, tap_bus__tck, tap_bus__tms, tap_fsm_capture, tap_fsm_shift, tap_fsm_update, jtag_rst, tap_fsm_isir);
   6   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:359" *)
   7   output jtag_clk;
   8   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:359" *)
   9   output jtag_rst;
  10   (* src = "./generate.py:16" *)
  11   input tap_bus__tck;
  12   (* src = "./generate.py:16" *)
  13   input tap_bus__tms;
  14   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:25" *)
  15   output tap_fsm_capture;
  16   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:24" *)
  17   output tap_fsm_isdr;
  18   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:23" *)
  19   output tap_fsm_isir;
  20   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:26" *)
  21   output tap_fsm_shift;
  22   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:27" *)
  23   output tap_fsm_update;
  24   c4m_jtag_tap_fsm inst (
  25     .capture(tap_fsm_capture),
  26     .isdr(tap_fsm_isdr),
  27     .isir(tap_fsm_isir),
  28     .reset(jtag_rst),
  29     .shift(tap_fsm_shift),
  30     .tck(tap_bus__tck),
  31     .tms(tap_bus__tms),
  32     .trst_n(1'h1),
  33     .update(tap_fsm_update)
  34   );
  35   assign jtag_clk = tap_bus__tck;
  36 endmodule
  37
  38 (* generator = "nMigen" *)
  39 (* \nmigen.hierarchy  = "top._idblock" *)
  40 module _idblock(ir, tap_id_tdo, jtag_clk, tap_fsm_capture, tap_fsm_shift, tap_bus__tdi, jtag_rst, tap_fsm_isdr);
  41   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:375" *)
  42   wire \$1 ;
  43   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:380" *)
  44   wire \$11 ;
  45   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:114" *)
  46   wire [31:0] \$13 ;
  47   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:375" *)
  48   wire \$3 ;
  49   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:379" *)
  50   wire \$5 ;
  51   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:375" *)
  52   wire \$7 ;
  53   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:375" *)
  54   wire \$9 ;
  55   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:60" *)
  56   input [1:0] ir;
  57   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:359" *)
  58   input jtag_clk;
  59   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:359" *)
  60   input jtag_rst;
  61   (* src = "./generate.py:16" *)
  62   input tap_bus__tdi;
  63   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:25" *)
  64   input tap_fsm_capture;
  65   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:24" *)
  66   input tap_fsm_isdr;
  67   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:26" *)
  68   input tap_fsm_shift;
  69   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:107" *)
  70   reg [31:0] tap_id_sr = 32'd0;
  71   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:107" *)
  72   reg [31:0] \tap_id_sr$next ;
  73   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:97" *)
  74   output tap_id_tdo;
  75   assign \$9  = tap_fsm_isdr & (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:375" *) \$7 ;
  76   assign \$11  = \$9  & (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:380" *) tap_fsm_shift;
  77   assign \$13  = + (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:114" *) { tap_bus__tdi, tap_id_sr[31:2] };
  78   assign \$1  = ir == (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:375" *) 1'h1;
  79   assign \$3  = tap_fsm_isdr & (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:375" *) \$1 ;
  80   assign \$5  = \$3  & (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:379" *) tap_fsm_capture;
  81   assign \$7  = ir == (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:375" *) 1'h1;
  82   always @(posedge jtag_clk)
  83       tap_id_sr <= \tap_id_sr$next ;
  84   always @* begin
  85     \tap_id_sr$next  = tap_id_sr;
  86     (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:111" *)
  87     casez ({ \$11 , \$5  })
  88       /* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:111" */
  89       2'b?1:
  90           \tap_id_sr$next  = 32'd6399;
  91       /* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:113" */
  92       2'b1?:
  93           \tap_id_sr$next  = \$13 ;
  94     endcase
  95   end
  96   assign tap_id_tdo = tap_id_sr[0];
  97 endmodule
  98
  99 (* generator = "nMigen" *)
 100 (* \nmigen.hierarchy  = "top._ioblock" *)
 101 module _ioblock(tap_io_tdo, tap_fsm_capture, tap_fsm_shift, tap_fsm_update, tap_bus__tdi, clk, tap_coreio0__o, tap_coreio1__o, tap_coreio0__oe, tap_coreio1__oe, tap_padio0__i, tap_padio1__i, ir);
 102   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ir.py:538" *)
 103   input clk;
 104   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:60" *)
 105   input [1:0] ir;
 106   (* src = "./generate.py:16" *)
 107   input tap_bus__tdi;
 108   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 109   wire tap_coreio0__i;
 110   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 111   input tap_coreio0__o;
 112   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 113   input tap_coreio0__oe;
 114   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 115   wire tap_coreio1__i;
 116   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 117   input tap_coreio1__o;
 118   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 119   input tap_coreio1__oe;
 120   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:25" *)
 121   input tap_fsm_capture;
 122   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:26" *)
 123   input tap_fsm_shift;
 124   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:27" *)
 125   input tap_fsm_update;
 126   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:194" *)
 127   output tap_io_tdo;
 128   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 129   input tap_padio0__i;
 130   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 131   wire tap_padio0__o;
 132   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 133   wire tap_padio0__oe;
 134   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 135   input tap_padio1__i;
 136   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 137   wire tap_padio1__o;
 138   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 139   wire tap_padio1__oe;
 140   jtag_ioblock_2_2 inst (
 141     .capture(tap_fsm_capture),
 142     .core_en({ tap_coreio1__oe, tap_coreio0__oe }),
 143     .core_in({ tap_coreio1__i, tap_coreio0__i }),
 144     .core_out({ tap_coreio1__o, tap_coreio0__o }),
 145     .ir(ir),
 146     .pad_en({ tap_padio1__oe, tap_padio0__oe }),
 147     .pad_in({ tap_padio1__i, tap_padio0__i }),
 148     .pad_out({ tap_padio1__o, tap_padio0__o }),
 149     .shift(tap_fsm_shift),
 150     .tck(clk),
 151     .tdi(tap_bus__tdi),
 152     .tdo(tap_io_tdo),
 153     .update(tap_fsm_update)
 154   );
 155 endmodule
 156
 157 (* generator = "nMigen" *)
 158 (* \nmigen.hierarchy  = "top._irblock" *)
 159 module _irblock(ir, tdo, jtag_clk, tap_fsm_capture, tap_fsm_shift, tap_fsm_update, tap_bus__tdi, jtag_rst, tap_fsm_isir);
 160   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:368" *)
 161   wire \$1 ;
 162   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:369" *)
 163   wire \$11 ;
 164   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:370" *)
 165   wire \$13 ;
 166   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:369" *)
 167   wire \$3 ;
 168   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:370" *)
 169   wire \$5 ;
 170   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:77" *)
 171   wire [1:0] \$7 ;
 172   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:368" *)
 173   wire \$9 ;
 174   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:60" *)
 175   output [1:0] ir;
 176   reg [1:0] ir = 2'h1;
 177   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:60" *)
 178   reg [1:0] \ir$next ;
 179   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:359" *)
 180   input jtag_clk;
 181   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:359" *)
 182   input jtag_rst;
 183   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:71" *)
 184   reg [1:0] shift_ir = 2'h0;
 185   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:71" *)
 186   reg [1:0] \shift_ir$next ;
 187   (* src = "./generate.py:16" *)
 188   input tap_bus__tdi;
 189   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:25" *)
 190   input tap_fsm_capture;
 191   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:23" *)
 192   input tap_fsm_isir;
 193   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:26" *)
 194   input tap_fsm_shift;
 195   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:27" *)
 196   input tap_fsm_update;
 197   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:61" *)
 198   output tdo;
 199   assign \$9  = tap_fsm_isir & (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:368" *) tap_fsm_capture;
 200   assign \$11  = tap_fsm_isir & (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:369" *) tap_fsm_shift;
 201   assign \$13  = tap_fsm_isir & (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:370" *) tap_fsm_update;
 202   assign \$1  = tap_fsm_isir & (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:368" *) tap_fsm_capture;
 203   assign \$3  = tap_fsm_isir & (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:369" *) tap_fsm_shift;
 204   assign \$5  = tap_fsm_isir & (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:370" *) tap_fsm_update;
 205   assign \$7  = + (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:77" *) tap_bus__tdi;
 206   always @(posedge jtag_clk)
 207       ir <= \ir$next ;
 208   always @(posedge jtag_clk)
 209       shift_ir <= \shift_ir$next ;
 210   always @* begin
 211     \shift_ir$next  = shift_ir;
 212     (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:74" *)
 213     casez ({ \$5 , \$3 , \$1  })
 214       /* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:74" */
 215       3'b??1:
 216           \shift_ir$next  = ir;
 217       /* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:76" */
 218       3'b?1?:
 219           \shift_ir$next  = \$7 ;
 220     endcase
 221   end
 222   always @* begin
 223     \ir$next  = ir;
 224     (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:74" *)
 225     casez ({ \$13 , \$11 , \$9  })
 226       /* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:74" */
 227       3'b??1:
 228           /* empty */;
 229       /* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:76" */
 230       3'b?1?:
 231           /* empty */;
 232       /* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:78" */
 233       3'b1??:
 234           \ir$next  = shift_ir;
 235     endcase
 236     (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/xfrm.py:528" *)
 237     casez (jtag_rst)
 238       1'h1:
 239           \ir$next  = 2'h1;
 240     endcase
 241   end
 242   assign tdo = ir[0];
 243 endmodule
 244
 245 (* generator = "nMigen" *)
 246 (* top =  1  *)
 247 (* \nmigen.hierarchy  = "top" *)
 248 module top(tap_bus__tms, tap_bus__tdi, clk, tap_coreio0__o, tap_coreio1__o, tap_coreio0__oe, tap_coreio1__oe, tap_padio0__i, tap_padio1__i, tap_bus__tck);
 249   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:375" *)
 250   wire \$1 ;
 251   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:388" *)
 252   wire \$11 ;
 253   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:388" *)
 254   wire \$13 ;
 255   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:388" *)
 256   wire \$15 ;
 257   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:375" *)
 258   wire \$3 ;
 259   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:388" *)
 260   wire \$5 ;
 261   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:388" *)
 262   wire \$7 ;
 263   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:388" *)
 264   wire \$9 ;
 265   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:359" *)
 266   wire _fsm_jtag_clk;
 267   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:359" *)
 268   wire _fsm_jtag_rst;
 269   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:25" *)
 270   wire _fsm_tap_fsm_capture;
 271   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:24" *)
 272   wire _fsm_tap_fsm_isdr;
 273   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:23" *)
 274   wire _fsm_tap_fsm_isir;
 275   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:26" *)
 276   wire _fsm_tap_fsm_shift;
 277   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:27" *)
 278   wire _fsm_tap_fsm_update;
 279   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:97" *)
 280   wire _idblock_tap_id_tdo;
 281   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:194" *)
 282   wire _ioblock_tap_io_tdo;
 283   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:60" *)
 284   wire [1:0] _irblock_ir;
 285   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:61" *)
 286   wire _irblock_tdo;
 287   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ir.py:538" *)
 288   input clk;
 289   (* src = "./generate.py:16" *)
 290   input tap_bus__tck;
 291   (* src = "./generate.py:16" *)
 292   input tap_bus__tdi;
 293   (* src = "./generate.py:16" *)
 294   wire tap_bus__tdo;
 295   (* src = "./generate.py:16" *)
 296   input tap_bus__tms;
 297   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 298   input tap_coreio0__o;
 299   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 300   input tap_coreio0__oe;
 301   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 302   input tap_coreio1__o;
 303   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 304   input tap_coreio1__oe;
 305   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 306   input tap_padio0__i;
 307   (* src = "/home/verhaegs/anaconda2/envs/nmigen/lib/python3.7/site-packages/nmigen/hdl/ast.py:1075" *)
 308   input tap_padio1__i;
 309   (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:397" *)
 310   reg tap_tdo;
 311   assign \$9  = \$5  | (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:388" *) \$7 ;
 312   assign \$11  = _irblock_ir == (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:388" *) 2'h2;
 313   assign \$13  = \$9  | (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:388" *) \$11 ;
 314   assign \$15  = _fsm_tap_fsm_isdr & (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:388" *) \$13 ;
 315   assign \$1  = _irblock_ir == (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:375" *) 1'h1;
 316   assign \$3  = _fsm_tap_fsm_isdr & (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:375" *) \$1 ;
 317   assign \$5  = _irblock_ir == (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:388" *) 1'h0;
 318   assign \$7  = _irblock_ir == (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:388" *) 2'h2;
 319   _fsm _fsm (
 320     .jtag_clk(_fsm_jtag_clk),
 321     .jtag_rst(_fsm_jtag_rst),
 322     .tap_bus__tck(tap_bus__tck),
 323     .tap_bus__tms(tap_bus__tms),
 324     .tap_fsm_capture(_fsm_tap_fsm_capture),
 325     .tap_fsm_isdr(_fsm_tap_fsm_isdr),
 326     .tap_fsm_isir(_fsm_tap_fsm_isir),
 327     .tap_fsm_shift(_fsm_tap_fsm_shift),
 328     .tap_fsm_update(_fsm_tap_fsm_update)
 329   );
 330   _idblock _idblock (
 331     .ir(_irblock_ir),
 332     .jtag_clk(_fsm_jtag_clk),
 333     .jtag_rst(_fsm_jtag_rst),
 334     .tap_bus__tdi(tap_bus__tdi),
 335     .tap_fsm_capture(_fsm_tap_fsm_capture),
 336     .tap_fsm_isdr(_fsm_tap_fsm_isdr),
 337     .tap_fsm_shift(_fsm_tap_fsm_shift),
 338     .tap_id_tdo(_idblock_tap_id_tdo)
 339   );
 340   _ioblock _ioblock (
 341     .clk(clk),
 342     .ir(_irblock_ir),
 343     .tap_bus__tdi(tap_bus__tdi),
 344     .tap_coreio0__o(tap_coreio0__o),
 345     .tap_coreio0__oe(tap_coreio0__oe),
 346     .tap_coreio1__o(tap_coreio1__o),
 347     .tap_coreio1__oe(tap_coreio1__oe),
 348     .tap_fsm_capture(_fsm_tap_fsm_capture),
 349     .tap_fsm_shift(_fsm_tap_fsm_shift),
 350     .tap_fsm_update(_fsm_tap_fsm_update),
 351     .tap_io_tdo(_ioblock_tap_io_tdo),
 352     .tap_padio0__i(tap_padio0__i),
 353     .tap_padio1__i(tap_padio1__i)
 354   );
 355   _irblock _irblock (
 356     .ir(_irblock_ir),
 357     .jtag_clk(_fsm_jtag_clk),
 358     .jtag_rst(_fsm_jtag_rst),
 359     .tap_bus__tdi(tap_bus__tdi),
 360     .tap_fsm_capture(_fsm_tap_fsm_capture),
 361     .tap_fsm_isir(_fsm_tap_fsm_isir),
 362     .tap_fsm_shift(_fsm_tap_fsm_shift),
 363     .tap_fsm_update(_fsm_tap_fsm_update),
 364     .tdo(_irblock_tdo)
 365   );
 366   always @* begin
 367     tap_tdo = 1'h0;
 368     (* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:398" *)
 369     casez ({ \$15 , \$3 , _fsm_tap_fsm_isir })
 370       /* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:398" */
 371       3'b??1:
 372           tap_tdo = _irblock_tdo;
 373       /* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:400" */
 374       3'b?1?:
 375           tap_tdo = _idblock_tap_id_tdo;
 376       /* src = "/home/verhaegs/eda/code/c4m_jtag/c4m/nmigen/jtag/tap.py:402" */
 377       3'b1??:
 378           tap_tdo = _ioblock_tap_io_tdo;
 379     endcase
 380   end
 381   assign tap_bus__tdo = tap_tdo;
 382 endmodule