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arch: Resurrect the NOISA build target and rename it NULL
2013-09-04
Andreas Hansson
arch: Resurrect the NOISA build target and rename it...
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2013-09-04
Andreas Hansson
cpu: Move the branch predictor out of the BaseCPU
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2013-09-04
Andreas Hansson
arch: Header clean up for NOISA resurrection
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2013-09-04
Andreas Hansson
alpha: Move system virtProxy to Alpha only
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2013-09-04
Andreas Hansson
scons: Enable build on OSX
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2013-08-20
Andreas Hansson
cpu: Fix timing CPU isDrained comment formatting
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2013-08-20
Andreas Hansson
base: Fix VectorPrint initialisation
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2013-08-19
Andreas Hansson
stats: Cumulative stats update
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2013-08-19
Andreas Hansson
config: Command line support for multi-channel memory
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2013-08-19
Andreas Hansson
mem: Change AbstractMemory defaults to match the common...
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2013-08-19
Andreas Hansson
mem: Use STL deque in favour of list for DRAM queues
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2013-08-19
Andreas Hansson
mem: Perform write merging in the DRAM write queue
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2013-08-19
Andreas Hansson
cpu: Fix timing CPU drain check
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2013-08-19
Andreas Hansson
alpha: Check interrupts before quiesce
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2013-08-19
Andreas Hansson
config: Move the memory instantiation outside FSConfig
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2013-08-19
Andreas Hansson
mem: Warn instead of panic for tXAW violation
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2013-08-19
Andreas Hansson
mem: Allow disabling of tXAW through a 0 activation...
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2013-08-19
Andreas Hansson
mem: Add an internal packet queue in SimpleMemory
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2013-08-19
Andreas Hansson
cpu: Fix a bug in the O3 CPU introduced by the cache...
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2013-07-18
Andreas Hansson
config: Update script to set cache line size on system
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2013-07-18
Andreas Hansson
mem: Set the cache line size on a system level
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2013-07-18
Andreas Hansson
scons: Use python-config instead of distutils
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2013-07-18
Andreas Hansson
sim: Make MaxTick in Python match the one in C++
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2013-06-27
Andreas Hansson
stats: Update stats for monitor, cache and bus changes
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2013-06-27
Andreas Hansson
mem: Remove the cache builder
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2013-06-27
Andreas Hansson
config: Remove Clock parameter multiplication
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2013-06-27
Andreas Hansson
config: Add a BaseSESystem builder for re-use in regressions
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2013-06-27
Andreas Hansson
tests: Prune 00.gzip from the regressions
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2013-06-27
Andreas Hansson
mem: Tidy up the bridge with const and additional checks
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2013-06-27
Andreas Hansson
mem: Fix CommMonitor style and response check
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2013-06-27
Andreas Hansson
mem: Align cache timing to clock edges
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2013-06-27
Andreas Hansson
cpu: Consider instructions waiting for FU completion...
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2013-06-27
Andreas Hansson
mem: Cycles converted to Ticks in atomic cache accesses
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2013-06-27
Andreas Hansson
scons: Identify runs that fail and runs with stats...
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2013-06-27
Andreas Hansson
base: Fix address range granularity calculation
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2013-06-27
Andreas Hansson
mem: Remove a redundant heap allocation for a snoop...
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2013-06-27
Andreas Hansson
mem: Remove CoherentBus snoop port unused private member
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2013-06-24
Andreas Hansson
stats: Bump x86 stats
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2013-05-30
Andreas Hansson
stats: Update the stats to reflect bus and memory changes
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2013-05-30
Andreas Hansson
mem: More descriptive DRAM config names
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2013-05-30
Andreas Hansson
mem: Add bytes per activate DRAM controller stat
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2013-05-30
Andreas Hansson
mem: Add static latency to the DRAM controller
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2013-05-30
Andreas Hansson
mem: Spring cleaning of MSHR and MSHRQueue
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2013-05-30
Andreas Hansson
mem: Fix MSHR print format
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2013-05-30
Andreas Hansson
cpu: Prune the stale TraceCPU
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2013-05-30
Andreas Hansson
cpu: Add request elasticity to the traffic generator
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2013-05-30
Andreas Hansson
cpu: Block traffic generator when requests have to...
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2013-05-30
Andreas Hansson
cpu: Move traffic generator sending out of generator...
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2013-05-30
Andreas Hansson
cpu: Fold together the StateGraph and the TrafficGen
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2013-05-30
Andreas Hansson
mem: Make returning snoop responses occupy response...
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2013-05-30
Andreas Hansson
mem: Make the buses multi layered
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2013-05-30
Andreas Hansson
mem: Separate the two snoop response cases in the bus
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2013-05-30
Andreas Hansson
mem: Tidy up a few variables in the bus
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2013-05-30
Andreas Hansson
mem: Use unordered set in bus request tracking
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2013-05-30
Andreas Hansson
mem: Check for waiting state in bus draining
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2013-05-30
Andreas Hansson
mem: Add a LPDDR3-1600 configuration
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2013-05-30
Andreas Hansson
mem: Adapt the LPDDR2 to match a single x32 channel
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2013-05-30
Andreas Hansson
mem: Avoid explicitly zeroing the memory backing store
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2013-05-30
Andreas Hansson
util: Auto generate the packet proto definitions
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2013-05-30
Andreas Hansson
base: Avoid size limitation on protobuf coded streams
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2013-05-30
Andreas Hansson
cpu: Make hash struct instead of class to please clang
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2013-04-28
Andreas Hansson
config: Added memory type to t1000 regression
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2013-04-23
Andreas Hansson
cpu: Fix TraceGen flag initalisation
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2013-04-22
Andreas Hansson
mem: Address mapping with fine-grained channel interleaving
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2013-04-22
Andreas Hansson
mem: More descriptive enum names for address mapping
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2013-04-22
Andreas Hansson
cpu: Use request flags in trace playback
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2013-04-22
Andreas Hansson
cpu: Make the generators usable outside the TrafficGen...
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2013-04-22
Andreas Hansson
config: Add a mem-type config option to se/fs scripts
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2013-04-22
Andreas Hansson
mem: Add a WideIO DRAM configuration
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2013-04-22
Andreas Hansson
mem: Replace check with panic where inhibited should...
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2013-04-19
Andreas Hansson
stats: Update stats for ldr_ret_uop (changeset 35198406dd72)
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2013-04-17
Andreas Hansson
dev: Fix a bug in the use of seekp/seekg
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2013-04-16
Andreas Hansson
stats: Bump the vortex stats to match latest behaviour
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2013-03-26
Andreas Hansson
util: Add a utility script for decoding packet traces
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2013-03-26
Andreas Hansson
util: Add a utility script for encoding packet traces
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2013-03-26
Andreas Hansson
stats: Update stats for cache retry event check
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2013-03-26
Andreas Hansson
stats: Update stats to reflect bus retry changes
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2013-03-26
Andreas Hansson
mem: Separate waiting for the bus and waiting for a...
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2013-03-26
Andreas Hansson
mem: Introduce a variable for the retrying port
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2013-03-26
Andreas Hansson
mem: Add a generic id field to the packet trace
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2013-03-26
Andreas Hansson
mem: Add optional request flags to the packet trace
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2013-03-26
Andreas Hansson
cpu: Remove CpuPort and use MasterPort in the CPU classes
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2013-03-20
Andreas Hansson
cpu: Avoid including inorder TLBUnit to avoid gcc LTO bug
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2013-03-18
Andreas Hansson
mem: Fix missing delete of packet in DRAM access
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2013-03-07
Andreas Hansson
base: Fix address range granularity calculations
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2013-03-07
Andreas Hansson
ruby: Fix gcc 4.8 maybe-uninitialized compilation error
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2013-03-07
Andreas Hansson
x86: Make the table walker reset the packet delay
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2013-03-01
Andreas Hansson
mem: Add check if SimpleDRAM nextReqEvent is scheduled
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2013-03-01
Andreas Hansson
mem: Add a method to build multi-channel DRAM configurations
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2013-03-01
Andreas Hansson
stats: Update stats to reflect SimpleDRAM changes
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2013-03-01
Andreas Hansson
mem: SimpleDRAM variable naming and whitespace fixes
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2013-03-01
Andreas Hansson
mem: Add support for multi-channel DRAM configurations
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2013-03-01
Andreas Hansson
mem: Merge interleaved ranges when creating backing...
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2013-03-01
Andreas Hansson
mem: Merge ranges in bus before passing them on
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2013-02-19
Andreas Hansson
mem: Fix sender state bug and delay popping
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2013-02-19
Andreas Hansson
scons: Fix warnings issued by clang 3.2svn (XCode 4.6)
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2013-02-19
Andreas Hansson
scons: Unify the flags shared by gcc and clang
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2013-02-19
Andreas Hansson
scons: Add warning delete with non-virtual destructor
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2013-02-19
Andreas Hansson
scons: Add warning for missing declarations
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2013-02-19
Andreas Hansson
scons: Add warning for overloaded virtual functions
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