38d5421d51f4a15a0ffd6a42b7c3783219de2312
[ls2.git] / coldboot / head.S
1 /* Copyright 2013-2014 IBM Corp.
2 *
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
12 * implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #define FIXUP_ENDIAN \
18 tdi 0,0,0x48; /* Reverse endian of b . + 8 */ \
19 b 191f; /* Skip trampoline if endian is good */ \
20 .long 0xa600607d; /* mfmsr r11 */ \
21 .long 0x01006b69; /* xori r11,r11,1 */ \
22 .long 0x05009f42; /* bcl 20,31,$+4 */ \
23 .long 0xa602487d; /* mflr r10 */ \
24 .long 0x14004a39; /* addi r10,r10,20 */ \
25 .long 0xa64b5a7d; /* mthsrr0 r10 */ \
26 .long 0xa64b7b7d; /* mthsrr1 r11 */ \
27 .long 0x2402004c; /* hrfid */ \
28 191:
29
30
31 /* Load an immediate 64-bit value into a register */
32 #define LOAD_IMM64(r, e) \
33 lis r,(e)@highest; \
34 ori r,r,(e)@higher; \
35 rldicr r,r, 32, 31; \
36 oris r,r, (e)@h; \
37 ori r,r, (e)@l;
38
39 .section ".head","ax"
40
41 /*
42 * Microwatt currently enters in LE mode at 0x0, so we don't need to
43 * do any endian fix ups>
44 */
45 . = 0
46 .global _start
47 _start:
48 b boot_entry
49
50 /* QEMU enters at 0x10 */
51 . = 0x10
52 FIXUP_ENDIAN
53 b boot_entry
54
55 . = 0x100
56 FIXUP_ENDIAN
57 b boot_entry
58
59 .global boot_entry
60 boot_entry:
61 /* setup stack */
62 LOAD_IMM64(%r1, __stack_top)
63 LOAD_IMM64(%r12, main)
64 mtctr %r12,
65 bctrl
66 b .
67
68 #define EXCEPTION(nr) \
69 .= nr ;\
70 b .
71
72 /* More exception stubs */
73 EXCEPTION(0x300)
74 EXCEPTION(0x380)
75 EXCEPTION(0x400)
76 EXCEPTION(0x480)
77 EXCEPTION(0x500)
78 EXCEPTION(0x600)
79 EXCEPTION(0x700)
80 EXCEPTION(0x800)
81 EXCEPTION(0x900)
82 EXCEPTION(0x980)
83 EXCEPTION(0xa00)
84 EXCEPTION(0xb00)
85 EXCEPTION(0xc00)
86 EXCEPTION(0xd00)
87 EXCEPTION(0xe00)
88 EXCEPTION(0xe20)
89 EXCEPTION(0xe40)
90 EXCEPTION(0xe60)
91 EXCEPTION(0xe80)
92 EXCEPTION(0xf00)
93 EXCEPTION(0xf20)
94 EXCEPTION(0xf40)
95 EXCEPTION(0xf60)
96 EXCEPTION(0xf80)
97 #if 0
98 EXCEPTION(0x1000)
99 EXCEPTION(0x1100)
100 EXCEPTION(0x1200)
101 EXCEPTION(0x1300)
102 EXCEPTION(0x1400)
103 EXCEPTION(0x1500)
104 EXCEPTION(0x1600)
105 #endif