2 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Rob Clark <robclark@freedesktop.org>
32 #define PTRID(x) ((unsigned long)(x))
34 /* ansi escape sequences: */
35 #define RESET "\x1b[0m"
36 #define RED "\x1b[0;31m"
37 #define GREEN "\x1b[0;32m"
38 #define BLUE "\x1b[0;34m"
39 #define MAGENTA "\x1b[0;35m"
41 /* syntax coloring, mostly to make it easier to see different sorts of
42 * srcs (immediate, constant, ssa, array, ...)
44 #define SYN_REG(x) RED x RESET
45 #define SYN_IMMED(x) GREEN x RESET
46 #define SYN_CONST(x) GREEN x RESET
47 #define SYN_SSA(x) BLUE x RESET
48 #define SYN_ARRAY(x) MAGENTA x RESET
51 type_name(type_t type
)
53 static const char *type_names
[] = {
63 return type_names
[type
];
66 static void print_instr_name(struct ir3_instruction
*instr
, bool flags
)
71 printf("%04u:", instr
->serialno
);
73 printf("%04u:", instr
->name
);
74 printf("%04u:", instr
->ip
);
75 printf("%03d:", instr
->depth
);
76 printf("%03u: ", instr
->use_count
);
80 if (instr
->flags
& IR3_INSTR_SY
)
82 if (instr
->flags
& IR3_INSTR_SS
)
84 if (instr
->flags
& IR3_INSTR_JP
)
87 printf("(rpt%d)", instr
->repeat
);
89 printf("(nop%d)", instr
->nop
);
90 if (instr
->flags
& IR3_INSTR_UL
)
98 case OPC_META_INPUT
: printf("_meta:in"); break;
99 case OPC_META_SPLIT
: printf("_meta:split"); break;
100 case OPC_META_COLLECT
: printf("_meta:collect"); break;
101 case OPC_META_TEX_PREFETCH
: printf("_meta:tex_prefetch"); break;
103 /* shouldn't hit here.. just for debugging: */
104 default: printf("_meta:%d", instr
->opc
); break;
106 } else if (instr
->opc
== OPC_MOV
) {
107 if (instr
->cat1
.src_type
== instr
->cat1
.dst_type
)
111 printf(".%s%s", type_name(instr
->cat1
.src_type
),
112 type_name(instr
->cat1
.dst_type
));
114 printf("%s", ir3_instr_name(instr
));
115 if (instr
->flags
& IR3_INSTR_3D
)
117 if (instr
->flags
& IR3_INSTR_A
)
119 if (instr
->flags
& IR3_INSTR_O
)
121 if (instr
->flags
& IR3_INSTR_P
)
123 if (instr
->flags
& IR3_INSTR_S
)
125 if (instr
->flags
& IR3_INSTR_A1EN
)
127 if (instr
->flags
& IR3_INSTR_B
) {
129 is_tex(instr
) ? instr
->cat5
.tex_base
: instr
->cat6
.base
);
131 if (instr
->flags
& IR3_INSTR_S2EN
)
136 static void print_reg_name(struct ir3_register
*reg
)
138 if ((reg
->flags
& (IR3_REG_FABS
| IR3_REG_SABS
)) &&
139 (reg
->flags
& (IR3_REG_FNEG
| IR3_REG_SNEG
| IR3_REG_BNOT
)))
141 else if (reg
->flags
& (IR3_REG_FNEG
| IR3_REG_SNEG
| IR3_REG_BNOT
))
143 else if (reg
->flags
& (IR3_REG_FABS
| IR3_REG_SABS
))
146 if (reg
->flags
& IR3_REG_HIGH
)
148 if (reg
->flags
& IR3_REG_HALF
)
151 if (reg
->flags
& IR3_REG_IMMED
) {
152 printf(SYN_IMMED("imm[%f,%d,0x%x]"), reg
->fim_val
, reg
->iim_val
, reg
->iim_val
);
153 } else if (reg
->flags
& IR3_REG_ARRAY
) {
154 printf(SYN_ARRAY("arr[id=%u, offset=%d, size=%u"), reg
->array
.id
,
155 reg
->array
.offset
, reg
->size
);
156 /* for ARRAY we could have null src, for example first write
160 printf(SYN_ARRAY(", "));
161 printf(SYN_SSA("_["));
162 print_instr_name(reg
->instr
, false);
163 printf(SYN_SSA("]"));
165 printf(SYN_ARRAY("]"));
166 } else if (reg
->flags
& IR3_REG_SSA
) {
167 printf(SYN_SSA("_["));
168 print_instr_name(reg
->instr
, false);
169 printf(SYN_SSA("]"));
170 } else if (reg
->flags
& IR3_REG_RELATIV
) {
171 if (reg
->flags
& IR3_REG_CONST
)
172 printf(SYN_CONST("c<a0.x + %d>"), reg
->array
.offset
);
174 printf(SYN_REG("r<a0.x + %d>")" (%u)", reg
->array
.offset
, reg
->size
);
176 if (reg
->flags
& IR3_REG_CONST
)
177 printf(SYN_CONST("c%u.%c"), reg_num(reg
), "xyzw"[reg_comp(reg
)]);
179 printf(SYN_REG("r%u.%c"), reg_num(reg
), "xyzw"[reg_comp(reg
)]);
182 if (reg
->wrmask
> 0x1)
183 printf(" (wrmask=0x%x)", reg
->wrmask
);
189 for (int i
= 0; i
< lvl
; i
++)
194 print_instr(struct ir3_instruction
*instr
, int lvl
)
200 print_instr_name(instr
, true);
203 printf(" (%s)(", type_name(instr
->cat5
.type
));
204 for (i
= 0; i
< 4; i
++)
205 if (instr
->regs
[0]->wrmask
& (1 << i
))
206 printf("%c", "xyzw"[i
]);
208 } else if (instr
->regs_count
> 0) {
212 for (i
= 0; i
< instr
->regs_count
; i
++) {
213 struct ir3_register
*reg
= instr
->regs
[i
];
215 printf(i
? ", " : "");
219 if (is_tex(instr
) && !(instr
->flags
& IR3_INSTR_S2EN
)) {
220 if (!!(instr
->flags
& IR3_INSTR_B
)) {
221 if (!!(instr
->flags
& IR3_INSTR_A1EN
)) {
222 printf(", s#%d", instr
->cat5
.samp
);
224 printf(", s#%d, t#%d", instr
->cat5
.samp
& 0xf,
225 instr
->cat5
.samp
>> 4);
228 printf(", s#%d, t#%d", instr
->cat5
.samp
, instr
->cat5
.tex
);
232 if (instr
->address
) {
233 printf(", address=_");
235 print_instr_name(instr
->address
, false);
239 if (instr
->cp
.left
) {
242 print_instr_name(instr
->cp
.left
, false);
246 if (instr
->cp
.right
) {
249 print_instr_name(instr
->cp
.right
, false);
253 if (instr
->opc
== OPC_META_SPLIT
) {
254 printf(", off=%d", instr
->split
.off
);
255 } else if (instr
->opc
== OPC_META_TEX_PREFETCH
) {
256 printf(", tex=%d, samp=%d, input_offset=%d", instr
->prefetch
.tex
,
257 instr
->prefetch
.samp
, instr
->prefetch
.input_offset
);
260 if (is_flow(instr
) && instr
->cat0
.target
) {
261 /* the predicate register src is implied: */
262 if (instr
->opc
== OPC_BR
) {
263 printf(" %sp0.x", instr
->cat0
.inv
? "!" : "");
265 printf(", target=block%u", block_id(instr
->cat0
.target
));
268 if (instr
->deps_count
) {
269 printf(", false-deps:");
270 for (unsigned i
= 0; i
< instr
->deps_count
; i
++) {
274 print_instr_name(instr
->deps
[i
], false);
282 void ir3_print_instr(struct ir3_instruction
*instr
)
284 print_instr(instr
, 0);
288 print_block(struct ir3_block
*block
, int lvl
)
290 tab(lvl
); printf("block%u {\n", block_id(block
));
292 /* computerator (ir3 assembler) doesn't really use blocks for flow
293 * control, so block->predecessors will be null.
295 if (block
->predecessors
&& block
->predecessors
->entries
> 0) {
299 set_foreach(block
->predecessors
, entry
) {
300 struct ir3_block
*pred
= (struct ir3_block
*)entry
->key
;
303 printf("block%u", block_id(pred
));
308 foreach_instr (instr
, &block
->instr_list
) {
309 print_instr(instr
, lvl
+1);
312 tab(lvl
+1); printf("/* keeps:\n");
313 for (unsigned i
= 0; i
< block
->keeps_count
; i
++) {
314 print_instr(block
->keeps
[i
], lvl
+2);
316 tab(lvl
+1); printf(" */\n");
318 if (block
->successors
[1]) {
319 /* leading into if/else: */
321 printf("/* succs: if _[");
322 print_instr_name(block
->condition
, false);
323 printf("] block%u; else block%u; */\n",
324 block_id(block
->successors
[0]),
325 block_id(block
->successors
[1]));
326 } else if (block
->successors
[0]) {
328 printf("/* succs: block%u; */\n",
329 block_id(block
->successors
[0]));
331 tab(lvl
); printf("}\n");
335 ir3_print(struct ir3
*ir
)
337 foreach_block (block
, &ir
->block_list
)
338 print_block(block
, 0);
340 struct ir3_instruction
*out
;
341 foreach_output_n (out
, i
, ir
) {
342 printf("out%d: ", i
);