2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
29 #include "broadcom/common/v3d_macros.h"
34 #include "pipe/p_context.h"
35 #include "pipe/p_state.h"
36 #include "util/bitset.h"
37 #include "util/slab.h"
40 #include "v3d_screen.h"
44 void v3d_job_add_bo(struct v3d_job
*job
, struct v3d_bo
*bo
);
46 #include "v3d_bufmgr.h"
47 #include "v3d_resource.h"
50 #ifdef USE_V3D_SIMULATOR
51 #define using_v3d_simulator true
53 #define using_v3d_simulator false
56 #define VC5_DIRTY_BLEND (1 << 0)
57 #define VC5_DIRTY_RASTERIZER (1 << 1)
58 #define VC5_DIRTY_ZSA (1 << 2)
59 #define VC5_DIRTY_FRAGTEX (1 << 3)
60 #define VC5_DIRTY_VERTTEX (1 << 4)
62 #define VC5_DIRTY_BLEND_COLOR (1 << 7)
63 #define VC5_DIRTY_STENCIL_REF (1 << 8)
64 #define VC5_DIRTY_SAMPLE_STATE (1 << 9)
65 #define VC5_DIRTY_FRAMEBUFFER (1 << 10)
66 #define VC5_DIRTY_STIPPLE (1 << 11)
67 #define VC5_DIRTY_VIEWPORT (1 << 12)
68 #define VC5_DIRTY_CONSTBUF (1 << 13)
69 #define VC5_DIRTY_VTXSTATE (1 << 14)
70 #define VC5_DIRTY_VTXBUF (1 << 15)
71 #define VC5_DIRTY_SCISSOR (1 << 17)
72 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
73 #define VC5_DIRTY_PRIM_MODE (1 << 19)
74 #define VC5_DIRTY_CLIP (1 << 20)
75 #define VC5_DIRTY_UNCOMPILED_VS (1 << 21)
76 #define VC5_DIRTY_UNCOMPILED_FS (1 << 22)
77 #define VC5_DIRTY_COMPILED_CS (1 << 23)
78 #define VC5_DIRTY_COMPILED_VS (1 << 24)
79 #define VC5_DIRTY_COMPILED_FS (1 << 25)
80 #define VC5_DIRTY_FS_INPUTS (1 << 26)
81 #define VC5_DIRTY_STREAMOUT (1 << 27)
82 #define VC5_DIRTY_OQ (1 << 28)
83 #define VC5_DIRTY_CENTROID_FLAGS (1 << 29)
84 #define VC5_DIRTY_NOPERSPECTIVE_FLAGS (1 << 30)
86 #define VC5_MAX_FS_INPUTS 64
88 struct v3d_sampler_view
{
89 struct pipe_sampler_view base
;
92 /* Precomputed swizzles to pass in to the shader key. */
95 uint8_t texture_shader_state
[32];
96 /* V3D 4.x: Texture state struct. */
100 struct v3d_sampler_state
{
101 struct pipe_sampler_state base
;
105 /* V3D 3.x: Packed texture state. */
106 uint8_t texture_shader_state
[32];
107 /* V3D 4.x: Sampler state struct. */
111 struct v3d_texture_stateobj
{
112 struct pipe_sampler_view
*textures
[PIPE_MAX_SAMPLERS
];
113 unsigned num_textures
;
114 struct pipe_sampler_state
*samplers
[PIPE_MAX_SAMPLERS
];
115 unsigned num_samplers
;
116 struct v3d_cl_reloc texture_state
[PIPE_MAX_SAMPLERS
];
119 struct v3d_shader_uniform_info
{
120 enum quniform_contents
*contents
;
125 struct v3d_uncompiled_shader
{
126 /** A name for this program, so you can track it in shader-db output. */
128 /** How many variants of this program were compiled, for shader-db. */
129 uint32_t compiled_variant_count
;
130 struct pipe_shader_state base
;
131 uint32_t num_tf_outputs
;
132 struct v3d_varying_slot
*tf_outputs
;
133 uint16_t tf_specs
[16];
134 uint16_t tf_specs_psiz
[16];
135 uint32_t num_tf_specs
;
138 * Flag for if the NIR in this shader originally came from TGSI. If
139 * so, we need to do some fixups at compile time, due to missing
140 * information in TGSI that exists in NIR.
145 struct v3d_compiled_shader
{
146 struct pipe_resource
*resource
;
150 struct v3d_prog_data
*base
;
151 struct v3d_vs_prog_data
*vs
;
152 struct v3d_fs_prog_data
*fs
;
156 * VC5_DIRTY_* flags that, when set in v3d->dirty, mean that the
157 * uniforms have to be rewritten (and therefore the shader state
160 uint32_t uniform_dirty_bits
;
163 struct v3d_program_stateobj
{
164 struct v3d_uncompiled_shader
*bind_vs
, *bind_fs
;
165 struct v3d_compiled_shader
*cs
, *vs
, *fs
;
167 struct v3d_bo
*spill_bo
;
168 int spill_size_per_thread
;
171 struct v3d_constbuf_stateobj
{
172 struct pipe_constant_buffer cb
[PIPE_MAX_CONSTANT_BUFFERS
];
173 uint32_t enabled_mask
;
177 struct v3d_vertexbuf_stateobj
{
178 struct pipe_vertex_buffer vb
[PIPE_MAX_ATTRIBS
];
180 uint32_t enabled_mask
;
184 struct v3d_vertex_stateobj
{
185 struct pipe_vertex_element pipe
[VC5_MAX_ATTRIBUTES
];
186 unsigned num_elements
;
188 uint8_t attrs
[16 * VC5_MAX_ATTRIBUTES
];
189 struct pipe_resource
*defaults
;
190 uint32_t defaults_offset
;
193 struct v3d_streamout_stateobj
{
194 struct pipe_stream_output_target
*targets
[PIPE_MAX_SO_BUFFERS
];
195 /* Number of vertices we've written into the buffer so far. */
196 uint32_t offsets
[PIPE_MAX_SO_BUFFERS
];
197 unsigned num_targets
;
200 /* Hash table key for v3d->jobs */
202 struct pipe_surface
*cbufs
[4];
203 struct pipe_surface
*zsbuf
;
207 VC5_EZ_UNDECIDED
= 0,
214 * A complete bin/render job.
216 * This is all of the state necessary to submit a bin/render to the kernel.
217 * We want to be able to have multiple in progress at a time, so that we don't
218 * need to flush an existing CL just to switch to rendering to a new render
219 * target (which would mean reading back from the old render target when
220 * starting to render to it again).
223 struct v3d_context
*v3d
;
226 struct v3d_cl indirect
;
227 struct v3d_bo
*tile_alloc
;
228 struct v3d_bo
*tile_state
;
229 uint32_t shader_rec_count
;
231 struct drm_v3d_submit_cl submit
;
234 * Set of all BOs referenced by the job. This will be used for making
235 * the list of BOs that the kernel will need to have paged in to
240 /** Sum of the sizes of the BOs referenced by the job. */
241 uint32_t referenced_size
;
243 struct set
*write_prscs
;
245 /* Size of the submit.bo_handles array. */
246 uint32_t bo_handles_size
;
248 /** @{ Surfaces to submit rendering for. */
249 struct pipe_surface
*cbufs
[4];
250 struct pipe_surface
*zsbuf
;
253 * Bounding box of the scissor across all queued drawing.
255 * Note that the max values are exclusive.
263 * Width/height of the color framebuffer being rendered to,
264 * for VC5_TILE_RENDERING_MODE_CONFIG.
267 uint32_t draw_height
;
269 /** @{ Tile information, depending on MSAA and float color buffer. */
270 uint32_t draw_tiles_x
; /** @< Number of tiles wide for framebuffer. */
271 uint32_t draw_tiles_y
; /** @< Number of tiles high for framebuffer. */
273 uint32_t tile_width
; /** @< Width of a tile. */
274 uint32_t tile_height
; /** @< Height of a tile. */
275 /** maximum internal_bpp of all color render targets. */
276 uint32_t internal_bpp
;
278 /** Whether the current rendering is in a 4X MSAA tile buffer. */
282 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
286 /* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw
287 * call without having been cleared first.
290 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
291 * (either clears or draws) and should be stored.
294 uint32_t clear_color
[4][4];
299 * Set if some drawing (triangles, blits, or just a glClear()) has
300 * been done to the FBO, meaning that we need to
301 * DRM_IOCTL_VC5_SUBMIT_CL.
306 * Set if a packet enabling TF has been emitted in the job (V3D 4.x).
311 * Current EZ state for drawing. Updated at the start of draw after
312 * we've decided on the shader being rendered.
314 enum v3d_ez_state ez_state
;
316 * The first EZ state that was used for drawing with a decided EZ
317 * direction (so either UNDECIDED, GT, or LT).
319 enum v3d_ez_state first_ez_state
;
322 * Number of draw calls (not counting full buffer clears) queued in
325 uint32_t draw_calls_queued
;
327 struct v3d_job_key key
;
331 struct pipe_context base
;
334 struct v3d_screen
*screen
;
336 /** The 3D rendering job for the currently bound FBO. */
339 /* Map from struct v3d_job_key to the job for that FBO.
341 struct hash_table
*jobs
;
344 * Map from v3d_resource to a job writing to that resource.
346 * Primarily for flushing jobs rendering to textures that are now
349 struct hash_table
*write_jobs
;
351 struct slab_child_pool transfer_pool
;
352 struct blitter_context
*blitter
;
354 /** bitfield of VC5_DIRTY_* */
357 struct primconvert_context
*primconvert
;
359 struct hash_table
*fs_cache
, *vs_cache
;
360 uint32_t next_uncompiled_program_id
;
361 uint64_t next_compiled_program_id
;
363 struct v3d_compiler_state
*compiler_state
;
367 /** Maximum index buffer valid for the current shader_rec. */
370 /** Sync object that our RCL or TFU job will update as its out_sync. */
373 /* Stream uploader used by gallium internals. This could also be used
374 * by driver internals, but we tend to use the v3d_cl.h interfaces
377 struct u_upload_mgr
*uploader
;
378 /* State uploader used inside the driver. This is for packing bits of
379 * long-term state inside buffers, since the kernel interfaces
380 * allocate a page at a time.
382 struct u_upload_mgr
*state_uploader
;
384 /** @{ Current pipeline state objects */
385 struct pipe_scissor_state scissor
;
386 struct v3d_blend_state
*blend
;
387 struct v3d_rasterizer_state
*rasterizer
;
388 struct v3d_depth_stencil_alpha_state
*zsa
;
390 struct v3d_program_stateobj prog
;
392 struct v3d_vertex_stateobj
*vtx
;
395 struct pipe_blend_color f
;
398 struct pipe_stencil_ref stencil_ref
;
399 unsigned sample_mask
;
400 struct pipe_framebuffer_state framebuffer
;
402 /* Per render target, whether we should swap the R and B fields in the
403 * shader's color output and in blending. If render targets disagree
404 * on the R/B swap and use the constant color, then we would need to
405 * fall back to in-shader blending.
407 uint8_t swap_color_rb
;
409 /* Per render target, whether we should treat the dst alpha values as
412 * For RGBX formats, the tile buffer's alpha channel will be
415 uint8_t blend_dst_alpha_one
;
419 uint32_t tf_prims_generated
;
420 uint32_t prims_generated
;
422 struct pipe_poly_stipple stipple
;
423 struct pipe_clip_state clip
;
424 struct pipe_viewport_state viewport
;
425 struct v3d_constbuf_stateobj constbuf
[PIPE_SHADER_TYPES
];
426 struct v3d_texture_stateobj tex
[PIPE_SHADER_TYPES
];
427 struct v3d_vertexbuf_stateobj vertexbuf
;
428 struct v3d_streamout_stateobj streamout
;
429 struct v3d_bo
*current_oq
;
433 struct v3d_rasterizer_state
{
434 struct pipe_rasterizer_state base
;
438 uint8_t depth_offset
[9];
439 uint8_t depth_offset_z16
[9];
442 struct v3d_depth_stencil_alpha_state
{
443 struct pipe_depth_stencil_alpha_state base
;
445 enum v3d_ez_state ez_state
;
447 uint8_t stencil_front
[6];
448 uint8_t stencil_back
[6];
451 struct v3d_blend_state
{
452 struct pipe_blend_state base
;
454 /* Per-RT mask of whether blending is enabled. */
455 uint8_t blend_enables
;
458 #define perf_debug(...) do { \
459 if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \
460 fprintf(stderr, __VA_ARGS__); \
463 #define foreach_bit(b, mask) \
464 for (uint32_t _m = (mask), b; _m && ({(b) = u_bit_scan(&_m); 1;});)
466 static inline struct v3d_context
*
467 v3d_context(struct pipe_context
*pcontext
)
469 return (struct v3d_context
*)pcontext
;
472 static inline struct v3d_sampler_view
*
473 v3d_sampler_view(struct pipe_sampler_view
*psview
)
475 return (struct v3d_sampler_view
*)psview
;
478 static inline struct v3d_sampler_state
*
479 v3d_sampler_state(struct pipe_sampler_state
*psampler
)
481 return (struct v3d_sampler_state
*)psampler
;
484 struct pipe_context
*v3d_context_create(struct pipe_screen
*pscreen
,
485 void *priv
, unsigned flags
);
486 void v3d_program_init(struct pipe_context
*pctx
);
487 void v3d_program_fini(struct pipe_context
*pctx
);
488 void v3d_query_init(struct pipe_context
*pctx
);
490 void v3d_simulator_init(struct v3d_screen
*screen
);
491 void v3d_simulator_destroy(struct v3d_screen
*screen
);
492 int v3d_simulator_ioctl(int fd
, unsigned long request
, void *arg
);
493 void v3d_simulator_open_from_handle(int fd
, int handle
, uint32_t size
);
496 v3d_ioctl(int fd
, unsigned long request
, void *arg
)
498 if (using_v3d_simulator
)
499 return v3d_simulator_ioctl(fd
, request
, arg
);
501 return drmIoctl(fd
, request
, arg
);
504 void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader
*shader
);
505 struct v3d_cl_reloc
v3d_write_uniforms(struct v3d_context
*v3d
,
506 struct v3d_compiled_shader
*shader
,
507 enum pipe_shader_type stage
);
509 void v3d_flush(struct pipe_context
*pctx
);
510 void v3d_job_init(struct v3d_context
*v3d
);
511 struct v3d_job
*v3d_get_job(struct v3d_context
*v3d
,
512 struct pipe_surface
**cbufs
,
513 struct pipe_surface
*zsbuf
);
514 struct v3d_job
*v3d_get_job_for_fbo(struct v3d_context
*v3d
);
515 void v3d_job_add_bo(struct v3d_job
*job
, struct v3d_bo
*bo
);
516 void v3d_job_add_write_resource(struct v3d_job
*job
, struct pipe_resource
*prsc
);
517 void v3d_job_submit(struct v3d_context
*v3d
, struct v3d_job
*job
);
518 void v3d_flush_jobs_writing_resource(struct v3d_context
*v3d
,
519 struct pipe_resource
*prsc
);
520 void v3d_flush_jobs_reading_resource(struct v3d_context
*v3d
,
521 struct pipe_resource
*prsc
);
522 void v3d_update_compiled_shaders(struct v3d_context
*v3d
, uint8_t prim_mode
);
524 bool v3d_rt_format_supported(const struct v3d_device_info
*devinfo
,
526 bool v3d_tex_format_supported(const struct v3d_device_info
*devinfo
,
528 uint8_t v3d_get_rt_format(const struct v3d_device_info
*devinfo
, enum pipe_format f
);
529 uint8_t v3d_get_tex_format(const struct v3d_device_info
*devinfo
, enum pipe_format f
);
530 uint8_t v3d_get_tex_return_size(const struct v3d_device_info
*devinfo
,
532 enum pipe_tex_compare compare
);
533 uint8_t v3d_get_tex_return_channels(const struct v3d_device_info
*devinfo
,
535 const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info
*devinfo
,
537 void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info
*devinfo
,
541 bool v3d_tfu_supports_tex_format(const struct v3d_device_info
*devinfo
,
542 uint32_t tex_format
);
544 void v3d_init_query_functions(struct v3d_context
*v3d
);
545 void v3d_blit(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
);
546 void v3d_blitter_save(struct v3d_context
*v3d
);
547 boolean
v3d_generate_mipmap(struct pipe_context
*pctx
,
548 struct pipe_resource
*prsc
,
549 enum pipe_format format
,
550 unsigned int base_level
,
551 unsigned int last_level
,
552 unsigned int first_layer
,
553 unsigned int last_layer
);
555 struct v3d_fence
*v3d_fence_create(struct v3d_context
*v3d
);
558 # include "v3dx_context.h"
560 # define v3dX(x) v3d33_##x
561 # include "v3dx_context.h"
564 # define v3dX(x) v3d41_##x
565 # include "v3dx_context.h"
569 #endif /* VC5_CONTEXT_H */