shader-packing
[mesa.git] / src / gallium / drivers / v3d / v3d_context.h
1 /*
2 * Copyright © 2014-2017 Broadcom
3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 */
24
25 #ifndef VC5_CONTEXT_H
26 #define VC5_CONTEXT_H
27
28 #ifdef V3D_VERSION
29 #include "broadcom/common/v3d_macros.h"
30 #endif
31
32 #include <stdio.h>
33
34 #include "pipe/p_context.h"
35 #include "pipe/p_state.h"
36 #include "util/bitset.h"
37 #include "util/slab.h"
38 #include "xf86drm.h"
39 #include "v3d_drm.h"
40 #include "v3d_screen.h"
41
42 struct v3d_job;
43 struct v3d_bo;
44 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
45
46 #include "v3d_bufmgr.h"
47 #include "v3d_resource.h"
48 #include "v3d_cl.h"
49
50 #ifdef USE_V3D_SIMULATOR
51 #define using_v3d_simulator true
52 #else
53 #define using_v3d_simulator false
54 #endif
55
56 #define VC5_DIRTY_BLEND (1 << 0)
57 #define VC5_DIRTY_RASTERIZER (1 << 1)
58 #define VC5_DIRTY_ZSA (1 << 2)
59 #define VC5_DIRTY_FRAGTEX (1 << 3)
60 #define VC5_DIRTY_VERTTEX (1 << 4)
61
62 #define VC5_DIRTY_BLEND_COLOR (1 << 7)
63 #define VC5_DIRTY_STENCIL_REF (1 << 8)
64 #define VC5_DIRTY_SAMPLE_STATE (1 << 9)
65 #define VC5_DIRTY_FRAMEBUFFER (1 << 10)
66 #define VC5_DIRTY_STIPPLE (1 << 11)
67 #define VC5_DIRTY_VIEWPORT (1 << 12)
68 #define VC5_DIRTY_CONSTBUF (1 << 13)
69 #define VC5_DIRTY_VTXSTATE (1 << 14)
70 #define VC5_DIRTY_VTXBUF (1 << 15)
71 #define VC5_DIRTY_SCISSOR (1 << 17)
72 #define VC5_DIRTY_FLAT_SHADE_FLAGS (1 << 18)
73 #define VC5_DIRTY_PRIM_MODE (1 << 19)
74 #define VC5_DIRTY_CLIP (1 << 20)
75 #define VC5_DIRTY_UNCOMPILED_VS (1 << 21)
76 #define VC5_DIRTY_UNCOMPILED_FS (1 << 22)
77 #define VC5_DIRTY_COMPILED_CS (1 << 23)
78 #define VC5_DIRTY_COMPILED_VS (1 << 24)
79 #define VC5_DIRTY_COMPILED_FS (1 << 25)
80 #define VC5_DIRTY_FS_INPUTS (1 << 26)
81 #define VC5_DIRTY_STREAMOUT (1 << 27)
82 #define VC5_DIRTY_OQ (1 << 28)
83 #define VC5_DIRTY_CENTROID_FLAGS (1 << 29)
84 #define VC5_DIRTY_NOPERSPECTIVE_FLAGS (1 << 30)
85
86 #define VC5_MAX_FS_INPUTS 64
87
88 struct v3d_sampler_view {
89 struct pipe_sampler_view base;
90 uint32_t p0;
91 uint32_t p1;
92 /* Precomputed swizzles to pass in to the shader key. */
93 uint8_t swizzle[4];
94
95 uint8_t texture_shader_state[32];
96 /* V3D 4.x: Texture state struct. */
97 struct v3d_bo *bo;
98 };
99
100 struct v3d_sampler_state {
101 struct pipe_sampler_state base;
102 uint32_t p0;
103 uint32_t p1;
104
105 /* V3D 3.x: Packed texture state. */
106 uint8_t texture_shader_state[32];
107 /* V3D 4.x: Sampler state struct. */
108 struct v3d_bo *bo;
109 };
110
111 struct v3d_texture_stateobj {
112 struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
113 unsigned num_textures;
114 struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
115 unsigned num_samplers;
116 struct v3d_cl_reloc texture_state[PIPE_MAX_SAMPLERS];
117 };
118
119 struct v3d_shader_uniform_info {
120 enum quniform_contents *contents;
121 uint32_t *data;
122 uint32_t count;
123 };
124
125 struct v3d_uncompiled_shader {
126 /** A name for this program, so you can track it in shader-db output. */
127 uint32_t program_id;
128 /** How many variants of this program were compiled, for shader-db. */
129 uint32_t compiled_variant_count;
130 struct pipe_shader_state base;
131 uint32_t num_tf_outputs;
132 struct v3d_varying_slot *tf_outputs;
133 uint16_t tf_specs[16];
134 uint16_t tf_specs_psiz[16];
135 uint32_t num_tf_specs;
136
137 /**
138 * Flag for if the NIR in this shader originally came from TGSI. If
139 * so, we need to do some fixups at compile time, due to missing
140 * information in TGSI that exists in NIR.
141 */
142 bool was_tgsi;
143 };
144
145 struct v3d_compiled_shader {
146 struct pipe_resource *resource;
147 uint32_t offset;
148
149 union {
150 struct v3d_prog_data *base;
151 struct v3d_vs_prog_data *vs;
152 struct v3d_fs_prog_data *fs;
153 } prog_data;
154
155 /**
156 * VC5_DIRTY_* flags that, when set in v3d->dirty, mean that the
157 * uniforms have to be rewritten (and therefore the shader state
158 * reemitted).
159 */
160 uint32_t uniform_dirty_bits;
161 };
162
163 struct v3d_program_stateobj {
164 struct v3d_uncompiled_shader *bind_vs, *bind_fs;
165 struct v3d_compiled_shader *cs, *vs, *fs;
166
167 struct v3d_bo *spill_bo;
168 int spill_size_per_thread;
169 };
170
171 struct v3d_constbuf_stateobj {
172 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
173 uint32_t enabled_mask;
174 uint32_t dirty_mask;
175 };
176
177 struct v3d_vertexbuf_stateobj {
178 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
179 unsigned count;
180 uint32_t enabled_mask;
181 uint32_t dirty_mask;
182 };
183
184 struct v3d_vertex_stateobj {
185 struct pipe_vertex_element pipe[VC5_MAX_ATTRIBUTES];
186 unsigned num_elements;
187
188 uint8_t attrs[16 * VC5_MAX_ATTRIBUTES];
189 struct pipe_resource *defaults;
190 uint32_t defaults_offset;
191 };
192
193 struct v3d_streamout_stateobj {
194 struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];
195 /* Number of vertices we've written into the buffer so far. */
196 uint32_t offsets[PIPE_MAX_SO_BUFFERS];
197 unsigned num_targets;
198 };
199
200 /* Hash table key for v3d->jobs */
201 struct v3d_job_key {
202 struct pipe_surface *cbufs[4];
203 struct pipe_surface *zsbuf;
204 };
205
206 enum v3d_ez_state {
207 VC5_EZ_UNDECIDED = 0,
208 VC5_EZ_GT_GE,
209 VC5_EZ_LT_LE,
210 VC5_EZ_DISABLED,
211 };
212
213 /**
214 * A complete bin/render job.
215 *
216 * This is all of the state necessary to submit a bin/render to the kernel.
217 * We want to be able to have multiple in progress at a time, so that we don't
218 * need to flush an existing CL just to switch to rendering to a new render
219 * target (which would mean reading back from the old render target when
220 * starting to render to it again).
221 */
222 struct v3d_job {
223 struct v3d_context *v3d;
224 struct v3d_cl bcl;
225 struct v3d_cl rcl;
226 struct v3d_cl indirect;
227 struct v3d_bo *tile_alloc;
228 struct v3d_bo *tile_state;
229 uint32_t shader_rec_count;
230
231 struct drm_v3d_submit_cl submit;
232
233 /**
234 * Set of all BOs referenced by the job. This will be used for making
235 * the list of BOs that the kernel will need to have paged in to
236 * execute our job.
237 */
238 struct set *bos;
239
240 /** Sum of the sizes of the BOs referenced by the job. */
241 uint32_t referenced_size;
242
243 struct set *write_prscs;
244
245 /* Size of the submit.bo_handles array. */
246 uint32_t bo_handles_size;
247
248 /** @{ Surfaces to submit rendering for. */
249 struct pipe_surface *cbufs[4];
250 struct pipe_surface *zsbuf;
251 /** @} */
252 /** @{
253 * Bounding box of the scissor across all queued drawing.
254 *
255 * Note that the max values are exclusive.
256 */
257 uint32_t draw_min_x;
258 uint32_t draw_min_y;
259 uint32_t draw_max_x;
260 uint32_t draw_max_y;
261 /** @} */
262 /** @{
263 * Width/height of the color framebuffer being rendered to,
264 * for VC5_TILE_RENDERING_MODE_CONFIG.
265 */
266 uint32_t draw_width;
267 uint32_t draw_height;
268 /** @} */
269 /** @{ Tile information, depending on MSAA and float color buffer. */
270 uint32_t draw_tiles_x; /** @< Number of tiles wide for framebuffer. */
271 uint32_t draw_tiles_y; /** @< Number of tiles high for framebuffer. */
272
273 uint32_t tile_width; /** @< Width of a tile. */
274 uint32_t tile_height; /** @< Height of a tile. */
275 /** maximum internal_bpp of all color render targets. */
276 uint32_t internal_bpp;
277
278 /** Whether the current rendering is in a 4X MSAA tile buffer. */
279 bool msaa;
280 /** @} */
281
282 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the
283 * first rendering.
284 */
285 uint32_t clear;
286 /* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw
287 * call without having been cleared first.
288 */
289 uint32_t load;
290 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to
291 * (either clears or draws) and should be stored.
292 */
293 uint32_t store;
294 uint32_t clear_color[4][4];
295 float clear_z;
296 uint8_t clear_s;
297
298 /**
299 * Set if some drawing (triangles, blits, or just a glClear()) has
300 * been done to the FBO, meaning that we need to
301 * DRM_IOCTL_VC5_SUBMIT_CL.
302 */
303 bool needs_flush;
304
305 /**
306 * Set if a packet enabling TF has been emitted in the job (V3D 4.x).
307 */
308 bool tf_enabled;
309
310 /**
311 * Current EZ state for drawing. Updated at the start of draw after
312 * we've decided on the shader being rendered.
313 */
314 enum v3d_ez_state ez_state;
315 /**
316 * The first EZ state that was used for drawing with a decided EZ
317 * direction (so either UNDECIDED, GT, or LT).
318 */
319 enum v3d_ez_state first_ez_state;
320
321 /**
322 * Number of draw calls (not counting full buffer clears) queued in
323 * the current job.
324 */
325 uint32_t draw_calls_queued;
326
327 struct v3d_job_key key;
328 };
329
330 struct v3d_context {
331 struct pipe_context base;
332
333 int fd;
334 struct v3d_screen *screen;
335
336 /** The 3D rendering job for the currently bound FBO. */
337 struct v3d_job *job;
338
339 /* Map from struct v3d_job_key to the job for that FBO.
340 */
341 struct hash_table *jobs;
342
343 /**
344 * Map from v3d_resource to a job writing to that resource.
345 *
346 * Primarily for flushing jobs rendering to textures that are now
347 * being read from.
348 */
349 struct hash_table *write_jobs;
350
351 struct slab_child_pool transfer_pool;
352 struct blitter_context *blitter;
353
354 /** bitfield of VC5_DIRTY_* */
355 uint32_t dirty;
356
357 struct primconvert_context *primconvert;
358
359 struct hash_table *fs_cache, *vs_cache;
360 uint32_t next_uncompiled_program_id;
361 uint64_t next_compiled_program_id;
362
363 struct v3d_compiler_state *compiler_state;
364
365 uint8_t prim_mode;
366
367 /** Maximum index buffer valid for the current shader_rec. */
368 uint32_t max_index;
369
370 /** Sync object that our RCL or TFU job will update as its out_sync. */
371 uint32_t out_sync;
372
373 /* Stream uploader used by gallium internals. This could also be used
374 * by driver internals, but we tend to use the v3d_cl.h interfaces
375 * instead.
376 */
377 struct u_upload_mgr *uploader;
378 /* State uploader used inside the driver. This is for packing bits of
379 * long-term state inside buffers, since the kernel interfaces
380 * allocate a page at a time.
381 */
382 struct u_upload_mgr *state_uploader;
383
384 /** @{ Current pipeline state objects */
385 struct pipe_scissor_state scissor;
386 struct v3d_blend_state *blend;
387 struct v3d_rasterizer_state *rasterizer;
388 struct v3d_depth_stencil_alpha_state *zsa;
389
390 struct v3d_program_stateobj prog;
391
392 struct v3d_vertex_stateobj *vtx;
393
394 struct {
395 struct pipe_blend_color f;
396 uint16_t hf[4];
397 } blend_color;
398 struct pipe_stencil_ref stencil_ref;
399 unsigned sample_mask;
400 struct pipe_framebuffer_state framebuffer;
401
402 /* Per render target, whether we should swap the R and B fields in the
403 * shader's color output and in blending. If render targets disagree
404 * on the R/B swap and use the constant color, then we would need to
405 * fall back to in-shader blending.
406 */
407 uint8_t swap_color_rb;
408
409 /* Per render target, whether we should treat the dst alpha values as
410 * one in blending.
411 *
412 * For RGBX formats, the tile buffer's alpha channel will be
413 * undefined.
414 */
415 uint8_t blend_dst_alpha_one;
416
417 bool active_queries;
418
419 uint32_t tf_prims_generated;
420 uint32_t prims_generated;
421
422 struct pipe_poly_stipple stipple;
423 struct pipe_clip_state clip;
424 struct pipe_viewport_state viewport;
425 struct v3d_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
426 struct v3d_texture_stateobj tex[PIPE_SHADER_TYPES];
427 struct v3d_vertexbuf_stateobj vertexbuf;
428 struct v3d_streamout_stateobj streamout;
429 struct v3d_bo *current_oq;
430 /** @} */
431 };
432
433 struct v3d_rasterizer_state {
434 struct pipe_rasterizer_state base;
435
436 float point_size;
437
438 uint8_t depth_offset[9];
439 uint8_t depth_offset_z16[9];
440 };
441
442 struct v3d_depth_stencil_alpha_state {
443 struct pipe_depth_stencil_alpha_state base;
444
445 enum v3d_ez_state ez_state;
446
447 uint8_t stencil_front[6];
448 uint8_t stencil_back[6];
449 };
450
451 struct v3d_blend_state {
452 struct pipe_blend_state base;
453
454 /* Per-RT mask of whether blending is enabled. */
455 uint8_t blend_enables;
456 };
457
458 #define perf_debug(...) do { \
459 if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \
460 fprintf(stderr, __VA_ARGS__); \
461 } while (0)
462
463 #define foreach_bit(b, mask) \
464 for (uint32_t _m = (mask), b; _m && ({(b) = u_bit_scan(&_m); 1;});)
465
466 static inline struct v3d_context *
467 v3d_context(struct pipe_context *pcontext)
468 {
469 return (struct v3d_context *)pcontext;
470 }
471
472 static inline struct v3d_sampler_view *
473 v3d_sampler_view(struct pipe_sampler_view *psview)
474 {
475 return (struct v3d_sampler_view *)psview;
476 }
477
478 static inline struct v3d_sampler_state *
479 v3d_sampler_state(struct pipe_sampler_state *psampler)
480 {
481 return (struct v3d_sampler_state *)psampler;
482 }
483
484 struct pipe_context *v3d_context_create(struct pipe_screen *pscreen,
485 void *priv, unsigned flags);
486 void v3d_program_init(struct pipe_context *pctx);
487 void v3d_program_fini(struct pipe_context *pctx);
488 void v3d_query_init(struct pipe_context *pctx);
489
490 void v3d_simulator_init(struct v3d_screen *screen);
491 void v3d_simulator_destroy(struct v3d_screen *screen);
492 int v3d_simulator_ioctl(int fd, unsigned long request, void *arg);
493 void v3d_simulator_open_from_handle(int fd, int handle, uint32_t size);
494
495 static inline int
496 v3d_ioctl(int fd, unsigned long request, void *arg)
497 {
498 if (using_v3d_simulator)
499 return v3d_simulator_ioctl(fd, request, arg);
500 else
501 return drmIoctl(fd, request, arg);
502 }
503
504 void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader *shader);
505 struct v3d_cl_reloc v3d_write_uniforms(struct v3d_context *v3d,
506 struct v3d_compiled_shader *shader,
507 enum pipe_shader_type stage);
508
509 void v3d_flush(struct pipe_context *pctx);
510 void v3d_job_init(struct v3d_context *v3d);
511 struct v3d_job *v3d_get_job(struct v3d_context *v3d,
512 struct pipe_surface **cbufs,
513 struct pipe_surface *zsbuf);
514 struct v3d_job *v3d_get_job_for_fbo(struct v3d_context *v3d);
515 void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo);
516 void v3d_job_add_write_resource(struct v3d_job *job, struct pipe_resource *prsc);
517 void v3d_job_submit(struct v3d_context *v3d, struct v3d_job *job);
518 void v3d_flush_jobs_writing_resource(struct v3d_context *v3d,
519 struct pipe_resource *prsc);
520 void v3d_flush_jobs_reading_resource(struct v3d_context *v3d,
521 struct pipe_resource *prsc);
522 void v3d_update_compiled_shaders(struct v3d_context *v3d, uint8_t prim_mode);
523
524 bool v3d_rt_format_supported(const struct v3d_device_info *devinfo,
525 enum pipe_format f);
526 bool v3d_tex_format_supported(const struct v3d_device_info *devinfo,
527 enum pipe_format f);
528 uint8_t v3d_get_rt_format(const struct v3d_device_info *devinfo, enum pipe_format f);
529 uint8_t v3d_get_tex_format(const struct v3d_device_info *devinfo, enum pipe_format f);
530 uint8_t v3d_get_tex_return_size(const struct v3d_device_info *devinfo,
531 enum pipe_format f,
532 enum pipe_tex_compare compare);
533 uint8_t v3d_get_tex_return_channels(const struct v3d_device_info *devinfo,
534 enum pipe_format f);
535 const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info *devinfo,
536 enum pipe_format f);
537 void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info *devinfo,
538 uint32_t format,
539 uint32_t *type,
540 uint32_t *bpp);
541 bool v3d_tfu_supports_tex_format(const struct v3d_device_info *devinfo,
542 uint32_t tex_format);
543
544 void v3d_init_query_functions(struct v3d_context *v3d);
545 void v3d_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info);
546 void v3d_blitter_save(struct v3d_context *v3d);
547 boolean v3d_generate_mipmap(struct pipe_context *pctx,
548 struct pipe_resource *prsc,
549 enum pipe_format format,
550 unsigned int base_level,
551 unsigned int last_level,
552 unsigned int first_layer,
553 unsigned int last_layer);
554
555 struct v3d_fence *v3d_fence_create(struct v3d_context *v3d);
556
557 #ifdef v3dX
558 # include "v3dx_context.h"
559 #else
560 # define v3dX(x) v3d33_##x
561 # include "v3dx_context.h"
562 # undef v3dX
563
564 # define v3dX(x) v3d41_##x
565 # include "v3dx_context.h"
566 # undef v3dX
567 #endif
568
569 #endif /* VC5_CONTEXT_H */