radeonsi: move some global shader cache flags to per-binary flags

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index ac4a7aa3135a601f5b4804a8c1cc53757ca82e39..f534b5c2e5e9431a83b29565c8c7ed19814a841b 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -147,7 +147,7 @@ static void si_create_compute_state_async(void *job, int thread_index)
        program->num_cs_user_data_dwords =
                sel->info.properties[TGSI_PROPERTY_CS_USER_DATA_COMPONENTS_AMD];
 
-       void *ir_binary = si_get_ir_binary(sel, false);
+       void *ir_binary = si_get_ir_binary(sel, false, false);
 
        /* Try to load the shader from the shader cache. */
        mtx_lock(&sscreen->shader_cache_mutex);

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index fef44836ea2a361182addefdb077d16f6654f135..514ed9a0324dcd9ca24a3ba56671e5e8690af5a9 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -871,22 +871,9 @@ static void si_disk_cache_create(struct si_screen *sscreen)
        disk_cache_format_hex_id(cache_id, sha1, 20 * 2);
 
        /* These flags affect shader compilation. */
-       #define ALL_FLAGS (DBG(FS_CORRECT_DERIVS_AFTER_KILL) |  \
-                          DBG(SI_SCHED) |                      \
-                          DBG(GISEL) |                         \
-                          DBG(W32_GE) |                        \
-                          DBG(W32_PS) |                        \
-                          DBG(W32_CS) |                        \
-                          DBG(W64_GE) |                        \
-                          DBG(W64_PS) |                        \
-                          DBG(W64_CS))
+       #define ALL_FLAGS (DBG(SI_SCHED) | DBG(GISEL))
        uint64_t shader_debug_flags = sscreen->debug_flags & ALL_FLAGS;
 
-       if (sscreen->options.enable_nir) {
-               STATIC_ASSERT((ALL_FLAGS & (1u << 31)) == 0);
-               shader_debug_flags |= 1u << 31;
-       }
-
        /* Add the high bits of 32-bit addresses, which affects
         * how 32-bit addresses are expanded to 64 bits.
         */

diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index 323313764d8b7d7f7c9a6cb6c6e187d400ea638e..11c7224b1d825e54730216cb4a4e4339302e4bd8 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -573,7 +573,7 @@ si_compute_fast_udiv_info32(uint32_t D, unsigned num_bits);
 void si_emit_dpbb_state(struct si_context *sctx);
 
 /* si_state_shaders.c */
-void *si_get_ir_binary(struct si_shader_selector *sel, bool as_ngg);
+void *si_get_ir_binary(struct si_shader_selector *sel, bool ngg, bool es);
 bool si_shader_cache_load_shader(struct si_screen *sscreen, void *ir_binary,
                                 struct si_shader *shader);
 bool si_shader_cache_insert_shader(struct si_screen *sscreen, void *ir_binary,

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 63014c9687c45dc948bd9cd86be169416513ab33..c9800c00b258e5796c43606373cb9e1293d15e2a 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -45,7 +45,7 @@
  * Return the IR binary in a buffer. For TGSI the first 4 bytes contain its
  * size as integer.
  */
-void *si_get_ir_binary(struct si_shader_selector *sel, bool as_ngg)
+void *si_get_ir_binary(struct si_shader_selector *sel, bool ngg, bool es)
 {
        struct blob blob;
        unsigned ir_size;
@@ -64,13 +64,27 @@ void *si_get_ir_binary(struct si_shader_selector *sel, bool as_ngg)
                ir_size = blob.size;
        }
 
+       /* These settings affect the compilation, but they are not derived
+        * from the input shader IR.
+        */
+       unsigned shader_variant_flags = 0;
+
+       if (ngg)
+               shader_variant_flags |= 1 << 0;
+       if (sel->nir)
+               shader_variant_flags |= 1 << 1;
+       if (si_get_wave_size(sel->screen, sel->type, ngg, es) == 32)
+               shader_variant_flags |= 1 << 2;
+       if (sel->force_correct_derivs_after_kill)
+               shader_variant_flags |= 1 << 3;
+
        unsigned size = 4 + 4 + ir_size + sizeof(sel->so);
        char *result = (char*)MALLOC(size);
        if (!result)
                return NULL;
 
        ((uint32_t*)result)[0] = size;
-       ((uint32_t*)result)[1] = as_ngg;
+       ((uint32_t*)result)[1] = shader_variant_flags;
        memcpy(result + 8, ir_binary, ir_size);
        memcpy(result + 8 + ir_size, &sel->so, sizeof(sel->so));
 
@@ -2462,8 +2476,10 @@ static void si_init_shader_selector_async(void *job, int thread_index)
                     sel->type == PIPE_SHADER_GEOMETRY))
                        shader->key.as_ngg = 1;
 
-               if (sel->tokens || sel->nir)
-                       ir_binary = si_get_ir_binary(sel, shader->key.as_ngg);
+               if (sel->tokens || sel->nir) {
+                       ir_binary = si_get_ir_binary(sel, shader->key.as_ngg,
+                                                    shader->key.as_es);
+               }
 
                /* Try to load the shader from the shader cache. */
                mtx_lock(&sscreen->shader_cache_mutex);