mesa.git
6 years agoglsl_types: vec8/vec16 support
Rob Clark [Mon, 12 Mar 2018 19:00:31 +0000 (15:00 -0400)]
glsl_types: vec8/vec16 support

Not used in GL but 8 and 16 component vectors exist in OpenCL.

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
6 years agoglsl_types: refactor/prep for vec8/vec16
Rob Clark [Mon, 12 Mar 2018 18:54:56 +0000 (14:54 -0400)]
glsl_types: refactor/prep for vec8/vec16

Refactor things so there isn't so much typing involved to add new
things.

Also drops a pointless conditional (out of bounds rows or columns
already returns error_type in all paths.. might as well drop it
rather than make the check more convoluted in the next patch by
adding the vec8/vec16 case).

Signed-off-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
6 years agoanv: Set genX_table for gen11
Jordan Justen [Fri, 23 Mar 2018 21:55:52 +0000 (14:55 -0700)]
anv: Set genX_table for gen11

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
6 years agoanv: Add gen11 to anv_genX_call
Jordan Justen [Thu, 22 Mar 2018 19:04:12 +0000 (12:04 -0700)]
anv: Add gen11 to anv_genX_call

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
6 years agovbo: Make sure the internal VAO's stay within limits.
Mathias Fröhlich [Thu, 22 Mar 2018 04:34:09 +0000 (05:34 +0100)]
vbo: Make sure the internal VAO's stay within limits.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agomesa: Flag early if we modify a SharedAndImmutable VAO.
Mathias Fröhlich [Thu, 22 Mar 2018 04:34:09 +0000 (05:34 +0100)]
mesa: Flag early if we modify a SharedAndImmutable VAO.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agomesa: When copying a VAO also copy the vertex attribute mode.
Mathias Fröhlich [Thu, 22 Mar 2018 04:34:09 +0000 (05:34 +0100)]
mesa: When copying a VAO also copy the vertex attribute mode.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agoconfigure: use AC_CHECK_HEADERS to check for endian.h
Emil Velikov [Fri, 23 Mar 2018 17:37:39 +0000 (17:37 +0000)]
configure: use AC_CHECK_HEADERS to check for endian.h

The currently we use the singular CHECK_HEADER combined with explicit
append to the DEFINES variable. That is a legacy misnomer, since it
requires us to add $DEFINES to every piece that we build.

Using the plural version of the helper sets the HAVE_ macro for us, plus
ensures it's passed to the compiler - if config.h is available in there
(not in the case of mesa) otherwise on the command line.

In hindsight, we should replace all the AC_CHECK_{FUNC,HEADER} instances
with the plural version (or even the _ONCE suffixed version) and drop
the DEFINES hacks.

Fixes: cbee1bfb342 ("meson/configure: detect endian.h instead of trying
to guess when it's available")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105717
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Tested-by: Clayton Craft <clayton.a.craft@intel.com>
6 years agoandroid: Use local i915_drm.h rather than the system one.
Kenneth Graunke [Fri, 23 Mar 2018 16:37:43 +0000 (09:37 -0700)]
android: Use local i915_drm.h rather than the system one.

Fixes: 2d26c9993389a8eb8f712 (intel: devinfo: meson: include drm uapi)
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Clayton Craft <clayton.a.craft@intel.com>
6 years agost/mesa: s/unsigned/enum pipe_shader_type/ for st_bind_ubos()
Brian Paul [Thu, 15 Mar 2018 14:25:43 +0000 (08:25 -0600)]
st/mesa: s/unsigned/enum pipe_shader_type/ for st_bind_ubos()

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
6 years agost/mesa: whitespace/formatting fixes in st_atom_constbuf.c
Brian Paul [Thu, 15 Mar 2018 14:23:13 +0000 (08:23 -0600)]
st/mesa: whitespace/formatting fixes in st_atom_constbuf.c

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
6 years agost/mesa: s/unsigned/enum pipe_shader_type/
Brian Paul [Thu, 15 Mar 2018 14:22:55 +0000 (08:22 -0600)]
st/mesa: s/unsigned/enum pipe_shader_type/

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
6 years agosvga: simplify uses_flat_interp expression in emit_input_declarations()
Brian Paul [Tue, 6 Mar 2018 16:29:21 +0000 (09:29 -0700)]
svga: simplify uses_flat_interp expression in emit_input_declarations()

Reviewed-by: Neha Bhende <bhenden@vmware.com>
6 years agosvga: replace unsigned with proper enum names
Brian Paul [Mon, 5 Mar 2018 17:48:46 +0000 (10:48 -0700)]
svga: replace unsigned with proper enum names

Reviewed-by: Neha Bhende <bhenden@vmware.com>
6 years agotgsi,softpipe: use enum tgsi_opcode
Brian Paul [Mon, 5 Mar 2018 17:28:03 +0000 (10:28 -0700)]
tgsi,softpipe: use enum tgsi_opcode

Reviewed-by: Eric Anholt <eric@anholt.net>
6 years agost/mesa,tgsi: use enum tgsi_opcode
Brian Paul [Mon, 5 Mar 2018 17:20:32 +0000 (10:20 -0700)]
st/mesa,tgsi: use enum tgsi_opcode

Need to update the tgsi code and st_glsl_to_tgsi code at the same time
to prevent compile break since C++ is much pickier about implicit
enum/unsigned casting.

Bump size of glsl_to_tgsi_instruction::op to 10 bits to be sure to
avoid MSVC signed enum overflow issue.  No change in class size.

Reviewed-by: Eric Anholt <eric@anholt.net>
6 years agotgsi/nir: use enum tgsi_opcode
Brian Paul [Mon, 5 Mar 2018 17:20:01 +0000 (10:20 -0700)]
tgsi/nir: use enum tgsi_opcode

Reviewed-by: Eric Anholt <eric@anholt.net>
6 years agotgsi: use enum tgsi_opcode
Brian Paul [Mon, 5 Mar 2018 17:16:01 +0000 (10:16 -0700)]
tgsi: use enum tgsi_opcode

Reviewed-by: Eric Anholt <eric@anholt.net>
6 years agogallivm: use enum tgis_opcode
Brian Paul [Mon, 5 Mar 2018 17:07:03 +0000 (10:07 -0700)]
gallivm: use enum tgis_opcode

Reviewed-by: Eric Anholt <eric@anholt.net>
6 years agosvga: use enum tgsi_opcode
Brian Paul [Mon, 5 Mar 2018 17:05:52 +0000 (10:05 -0700)]
svga: use enum tgsi_opcode

Reviewed-by: Eric Anholt <eric@anholt.net>
6 years agotgsi: convert opcode macros to enums
Brian Paul [Mon, 5 Mar 2018 17:04:30 +0000 (10:04 -0700)]
tgsi: convert opcode macros to enums

Enums are nicer in gdb.

Reviewed-by: Eric Anholt <eric@anholt.net>
6 years agocompiler: glsl: silence valgrind warning on write cache
Lionel Landwerlin [Fri, 23 Mar 2018 10:40:02 +0000 (10:40 +0000)]
compiler: glsl: silence valgrind warning on write cache

I don't think it actually fixes anything, but that's nice not to have valgrind warnings.
It manifests itself when running the piglit test : glsl-fs-raytrace-bug27060

==2058== Uninitialised byte(s) found during client check request
==2058==    at 0xC5BB040: blob_write_bytes (blob.c:152)
==2058==    by 0xC595359: write_variable (nir_serialize.c:144)
==2058==    by 0xC59560C: write_var_list (nir_serialize.c:192)
==2058==    by 0xC5982E4: nir_serialize (nir_serialize.c:1124)
==2058==    by 0xC0B729D: brw_program_serialize_nir (brw_program.c:835)
==2058==    by 0xC0AB2D6: brw_link_shader (brw_link.cpp:358)
==2058==    by 0xC32FE3F: _mesa_glsl_link_shader (ir_to_mesa.cpp:3169)
==2058==    by 0xC36C7ED: create_new_program(gl_context*, state_key*) (ff_fragment_shader.cpp:1127)
==2058==    by 0xC36C8A6: _mesa_get_fixed_func_fragment_program (ff_fragment_shader.cpp:1157)
==2058==    by 0xC1B50AF: update_program (state.c:134)
==2058==    by 0xC1B56DF: _mesa_update_state_locked (state.c:352)
==2058==    by 0xC1B579A: _mesa_update_state (state.c:386)
==2058==  Address 0xf1eab8a is 58 bytes inside a block of size 96 alloc'd
==2058==    at 0x4C2CB8F: malloc (vg_replace_malloc.c:299)
==2058==    by 0xC0FD306: ralloc_size (ralloc.c:121)
==2058==    by 0xC0FD5B1: ralloc_array_size (ralloc.c:208)
==2058==    by 0xC452B3B: (anonymous namespace)::nir_visitor::visit(ir_variable*) (glsl_to_nir.cpp:448)
==2058==    by 0xC45CE8B: ir_variable::accept(ir_visitor*) (ir.h:428)
==2058==    by 0xC46D0B5: visit_exec_list(exec_list*, ir_visitor*) (ir.cpp:1898)
==2058==    by 0xC451D2F: glsl_to_nir (glsl_to_nir.cpp:162)
==2058==    by 0xC0B5223: brw_create_nir (brw_program.c:79)
==2058==    by 0xC0AAB67: brw_link_shader (brw_link.cpp:257)
==2058==    by 0xC32FE3F: _mesa_glsl_link_shader (ir_to_mesa.cpp:3169)
==2058==    by 0xC36C7ED: create_new_program(gl_context*, state_key*) (ff_fragment_shader.cpp:1127)
==2058==    by 0xC36C8A6: _mesa_get_fixed_func_fragment_program (ff_fragment_shader.cpp:1157)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
6 years agomeson/configure: detect endian.h instead of trying to guess when it's available
Eric Engestrom [Wed, 21 Mar 2018 17:04:06 +0000 (17:04 +0000)]
meson/configure: detect endian.h instead of trying to guess when it's available

Cc: Maxin B. John <maxin.john@gmail.com>
Cc: Khem Raj <raj.khem@gmail.com>
Cc: Rob Herring <robh@kernel.org>
Suggested-by: Jon Turney <jon.turney@dronecode.org.uk>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Cc: <mesa-stable@lists.freedesktop.org>
6 years agowayland-drm: do not distribute generated sources
Juan A. Suarez Romero [Fri, 23 Mar 2018 10:24:42 +0000 (11:24 +0100)]
wayland-drm: do not distribute generated sources

Instead we will re-generate them again on building.

v2: get rid of BUILT_SOURCES (Daniel, Emil)
v3: keep BUILT_SOURCES for egl/Makefile.am (Emil)

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoradv: enable TC-compat HTILE for 16-bit depth surfaces on GFX8
Samuel Pitoiset [Wed, 21 Mar 2018 20:30:42 +0000 (21:30 +0100)]
radv: enable TC-compat HTILE for 16-bit depth surfaces on GFX8

The hardware only supports 32-bit depth surfaces, but we can
enable TC-compat HTILE for 16-bit depth surfaces if no Z planes
are compressed.

The main benefit is to reduce the number of depth decompression
passes. Also, we don't need to implement DB->CB copies which is
fine.

This improves Serious Sam 2017 by +4%. Talos and F12017 are also
affected but I don't see a performance difference.

This also improves the shadowmapping Vulkan demo by 10-15%
(FPS is now similar to AMDVLK).

No CTS regressions on Polaris10.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoradv: add radv_calc_decompress_on_z_planes() helper
Samuel Pitoiset [Wed, 21 Mar 2018 20:30:41 +0000 (21:30 +0100)]
radv: add radv_calc_decompress_on_z_planes() helper

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoradv: add radv_image_is_tc_compat_htile() helper
Samuel Pitoiset [Wed, 21 Mar 2018 20:30:40 +0000 (21:30 +0100)]
radv: add radv_image_is_tc_compat_htile() helper

Instead of that huge conditional that's going to be crazy.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agonir: Rename image intrinsics to image_var
Jason Ekstrand [Mon, 19 Mar 2018 18:48:11 +0000 (11:48 -0700)]
nir: Rename image intrinsics to image_var

Generated with

git grep -l nir_intrinsic_image | xargs \
sed -i 's/nir_intrinsic_image/nir_intrinsic_image_var/g'

and some manual fixing in nir_intrinsics.h

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
6 years agovirgl: add ARB_cull_distance support.
Dave Airlie [Tue, 13 Mar 2018 05:37:36 +0000 (15:37 +1000)]
virgl: add ARB_cull_distance support.

This just allows the properties through to the host if we have
cull dist support.

Signed-off-by: Dave Airlie <airlied@redhat.com>
6 years agobroadcom/vc5: Account for InstanceID/VertexID in VPM segment size.
Eric Anholt [Thu, 22 Mar 2018 20:52:11 +0000 (13:52 -0700)]
broadcom/vc5: Account for InstanceID/VertexID in VPM segment size.

Fixes failure in
GTF-GLES3.gtf.GL3Tests.draw_instanced.draw_instanced_attrib_size

6 years agobroadcom/vc5: Allow FBOs with mixed color formats.
Eric Anholt [Thu, 22 Mar 2018 20:45:17 +0000 (13:45 -0700)]
broadcom/vc5: Allow FBOs with mixed color formats.

This is required by GLES3, fixing
GTF-GLES3.gtf.GL3Tests.framebuffer_srgb.framebuffer_srgb_draw

6 years agobroadcom/vc5: Add missing support for 2101010_REV vertex attributes.
Eric Anholt [Wed, 21 Mar 2018 21:44:04 +0000 (14:44 -0700)]
broadcom/vc5: Add missing support for 2101010_REV vertex attributes.

Fixes
GTF-GLES3.gtf.GL3Tests.vertex_type_2_10_10_10_rev.vertex_type_2_10_10_10_rev_invalid2,
where we hadn't thrown a GL error as needed in the extension-disabled
case.  We want to be exposing the extension anyway.

6 years agobroadcom/vc5: Set up a vertex position if the shader doesn't.
Eric Anholt [Wed, 21 Mar 2018 21:18:08 +0000 (14:18 -0700)]
broadcom/vc5: Set up a vertex position if the shader doesn't.

Our backend needs some sort of vertex position value to emit the scaled
viewport values and such.  Fixes potential segfaults in
KHR-GLES3.copy_tex_image_conversions.required.cubemap_negx_cubemap_negx

6 years agoi965: add performance query support on CNL
Lionel Landwerlin [Thu, 22 Feb 2018 17:12:42 +0000 (17:12 +0000)]
i965: add performance query support on CNL

v2: Add brw_oa_cnl.xml to EXTRA_DIST (Emil)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agoi965: perf: add support for new equation operators
Lionel Landwerlin [Thu, 22 Feb 2018 17:17:40 +0000 (17:17 +0000)]
i965: perf: add support for new equation operators

Some equations of the CNL metrics started to use operators we haven't
defined yet, just add those.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agoi965: perf: query topology
Lionel Landwerlin [Wed, 21 Feb 2018 19:15:46 +0000 (19:15 +0000)]
i965: perf: query topology

With the introduction of asymmetric slices in CNL, we cannot rely on
the previous SUBSLICE_MASK getparam to tell userspace what subslices
are available.

We introduce a new uAPI in the kernel driver to report exactly what
part of the GPU are fused and require this to be available on Gen10+.

Prior generations can continue to rely on GETPARAM on older kernels.

This patch is quite a lot of code because we have to support lots of
different kernel versions, ranging from not providing any information
(for Haswell on 4.13 through 4.17), to being able to query through
GETPARAM (for gen8/9 on 4.13 through 4.17), to finally requiring 4.17
for Gen10+.

This change stores topology information in a unified way on
brw_context.topology from the various kernel APIs. And then generates
the appropriate values for the equations from that unified topology.

v2: Move slice/subslice masks fields to gen_device_info (Rafael)

v3: Add a gen_device_info_subslice_available() helper (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agointel: devinfo: add helper functions to fill fusing masks values
Lionel Landwerlin [Wed, 14 Mar 2018 15:44:56 +0000 (15:44 +0000)]
intel: devinfo: add helper functions to fill fusing masks values

There are a couple of ways we can get the fusing information from the
kernel :

  - Through DRM_I915_GETPARAM with the SLICE_MASK/SUBSLICE_MASK
    parameters

  - Through the new DRM_IOCTL_I915_QUERY by requesting the
    DRM_I915_QUERY_TOPOLOGY_INFO

The second method is more accurate and also gives us the EUs fusing
masks. It's also a requirement for CNL as this platform has asymetric
subslices and the first method SUBSLICE_MASK value is assumed uniform
across slices.

v2: Change gen_device_info_update_from_masks() to generate topology
    and call into gen_device_info_update_from_topology (Lionel/Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agointel: devinfo: meson: include drm uapi
Lionel Landwerlin [Wed, 14 Mar 2018 15:43:57 +0000 (15:43 +0000)]
intel: devinfo: meson: include drm uapi

Already available with the autotools build.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agodrm-uapi: bump headers
Lionel Landwerlin [Wed, 21 Feb 2018 14:21:08 +0000 (14:21 +0000)]
drm-uapi: bump headers

Required updates from drm-next for changes in i965.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org
6 years agointel: devinfo: store slice/subslice/eu masks
Lionel Landwerlin [Wed, 14 Mar 2018 13:16:01 +0000 (13:16 +0000)]
intel: devinfo: store slice/subslice/eu masks

We want to store values coming from the kernel but as a first step, we
can generate mask values out the numbers already stored in the
gen_device_info masks.

v2: Add a helper to set EU masks (Lionel/Ken)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agointel: devinfo: store number of EUs per subslice
Lionel Landwerlin [Wed, 14 Mar 2018 13:15:12 +0000 (13:15 +0000)]
intel: devinfo: store number of EUs per subslice

This will be reused to store values reported by the kernel. The main
use case will be for use as the input values of the metric sets
equations for the INTEL_performance_queries extension. By storing this
information in the gen_device_info we make this non GL specific so
this can be reused by Vulkan if we ever have an equivalent extension.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agoRevert "meson: merge C and C++ compiler arguments check"
Dylan Baker [Thu, 22 Mar 2018 18:35:08 +0000 (11:35 -0700)]
Revert "meson: merge C and C++ compiler arguments check"

This reverts commit cb2ddcefa5196fdfeff76f405175c7a6c110eae4.

This causes clang to error out building C++ code. The plan is to fix the
build to work with clang, but in the mean time we'll just revert this

Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Acked-by: Eric Engestrom <eric@engestrom.ch>
6 years agoi965/perf: fix config registration when uploading to kernel
Lionel Landwerlin [Thu, 22 Mar 2018 16:02:11 +0000 (16:02 +0000)]
i965/perf: fix config registration when uploading to kernel

When registring configurations to the kernel for the first time, we
run into an issue where the id number is not properly set (we're using
the wrong variable). As a result when trying to use that id later on,
we get an error.

This issue manifest itself the first time you use frameretrace after
reboot, subsequent runs are fine.

Fixes: 27ee83eaf7e9 ("i965: perf: add support for userspace configurations")
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agogallium/winsys/kms: Add support for multi-planes
Lepton Wu [Mon, 19 Mar 2018 22:01:31 +0000 (15:01 -0700)]
gallium/winsys/kms: Add support for multi-planes

Add a new struct kms_sw_plane which delegate a plane and use it
in place of sw_displaytarget. Multiple planes share same underlying
kms_sw_displaytarget.

v2:
 - add more check for plane size (Tomasz)
v3:
 - split from larger patch (Emil)
v4:
 - no change from v3
v5:
 - remove mapped field (Tomasz)
v6:
 - remove change-id in commit message (Tomasz)
v7:
 - add revision history in commit message (Emil)

Reviewed-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Lepton Wu <lepton@chromium.org>
6 years agogallium/winsys/kms: Fix possible leak in map/unmap.
Lepton Wu [Mon, 19 Mar 2018 22:01:30 +0000 (15:01 -0700)]
gallium/winsys/kms: Fix possible leak in map/unmap.

If user calls map twice for kms_sw_displaytarget, the first mapped
buffer could get leaked. Instead of calling mmap every time, just
reuse previous mapping. Since user could map same displaytarget with
different flags, we have to keep two different pointers, one for rw
mapping and one for ro mapping. Also introduce reference count for
mapped buffer so we can unmap them at right time.

v2:
 - avoid duplicated mapping and leaked mapping (Tomasz)
v3:
 - split from larger patch (Emil)
v4:
 - remove munmap from dt_destory (Emil)
v5:
 - introduce reference count for mapping (Tomasz)
 - add back munmap in dt_destory
v6:
 - remove change-id in commit message (Tomasz)
v7:
 - remove munmap from dt_destory again (Emil)
 - add revision history in commit message (Emil)

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Lepton Wu <lepton@chromium.org>
6 years agobroadcom/vc4: add path to nir_builder.h
Juan A. Suarez Romero [Tue, 20 Mar 2018 10:21:37 +0000 (11:21 +0100)]
broadcom/vc4: add path to nir_builder.h

As the other VC4 files do. Otherwise, it won't find nir_builder.h

v2: add path in source code rather changing autotools (Emil)

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoautotools: add tegra header files
Juan A. Suarez Romero [Mon, 19 Mar 2018 13:17:22 +0000 (14:17 +0100)]
autotools: add tegra header files

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoswr/rast: autotools: add events_private.proto in dist tarball.
Juan A. Suarez Romero [Mon, 19 Mar 2018 13:06:57 +0000 (14:06 +0100)]
swr/rast: autotools: add events_private.proto in dist tarball.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoradv: autotools: add radv_extensions.h in the generated VULKAN list
Juan A. Suarez Romero [Mon, 19 Mar 2018 12:28:09 +0000 (13:28 +0100)]
radv: autotools: add radv_extensions.h in the generated VULKAN list

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agoanv/radv: autotools: include vulkan_*.h headers
Juan A. Suarez Romero [Mon, 19 Mar 2018 12:17:41 +0000 (13:17 +0100)]
anv/radv: autotools: include vulkan_*.h headers

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agonir: autotools, meson: add GLSL.ext.AMD.h in the files list
Juan A. Suarez Romero [Mon, 19 Mar 2018 12:08:32 +0000 (13:08 +0100)]
nir: autotools, meson: add GLSL.ext.AMD.h in the files list

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agointel/compiler: Readd ICL to test_eu_validate.cpp
Matt Turner [Fri, 16 Mar 2018 18:00:50 +0000 (11:00 -0700)]
intel/compiler: Readd ICL to test_eu_validate.cpp

Now that the PCI IDs are upstream, this can be readded.

6 years agointel/compiler: Skip 64-bit type tests when types not available
Matt Turner [Fri, 16 Mar 2018 18:15:26 +0000 (11:15 -0700)]
intel/compiler: Skip 64-bit type tests when types not available

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agointel: Add a Ice Lake PCI IDs
Anuj Phogat [Tue, 14 Mar 2017 21:43:34 +0000 (14:43 -0700)]
intel: Add a Ice Lake PCI IDs

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
6 years agointel: Disable fast color clear on icl
Anuj Phogat [Tue, 21 Nov 2017 21:46:25 +0000 (13:46 -0800)]
intel: Disable fast color clear on icl

Disabling fast color clear makes fbo-clearmipmap test render correct
texture in base miplevel. Fast color clear is anyways disabled for
non-base miplevels.

Acked-by: Matt Turner <mattst88@gmail.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agointel/compiler/icl: Clear "null render target" bit in extended message descriptor
Jason Ekstrand [Mon, 18 Dec 2017 19:29:14 +0000 (11:29 -0800)]
intel/compiler/icl: Clear "null render target" bit in extended message descriptor

Otherwise all our render target writes go no where.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agointel/compiler/icl: Update the assert in brw_stage_has_packed_dispatch()
Anuj Phogat [Thu, 20 Jul 2017 23:20:33 +0000 (16:20 -0700)]
intel/compiler/icl: Update the assert in brw_stage_has_packed_dispatch()

Rafael ran piglit with the test code enabled and saw no additional GPU
hangs.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agointel/common/icl: Disable hiz surface sampling
Anuj Phogat [Fri, 16 Feb 2018 21:44:10 +0000 (13:44 -0800)]
intel/common/icl: Disable hiz surface sampling

On gen11+ AUX_HIZ is not a supported value for surfaces being
sampled by the 3D sampler.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agointel/common/icl: Add L3 config
Anuj Phogat [Thu, 20 Jul 2017 23:23:24 +0000 (16:23 -0700)]
intel/common/icl: Add L3 config

ICL uses the same L3 configs as CNL, just leaving the SLM configs out.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agointel/tools/aubinator: Drop platform list from print_help()
Matt Turner [Wed, 21 Mar 2018 21:05:09 +0000 (14:05 -0700)]
intel/tools/aubinator: Drop platform list from print_help()

We all know the platform names, and I don't want to update this list
continually.

Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
6 years agoegl/wayland: Make swrast display_sync the correct queue
Derek Foreman [Thu, 22 Mar 2018 15:20:43 +0000 (10:20 -0500)]
egl/wayland: Make swrast display_sync the correct queue

commit 03dd9a88b0be17ff0ce91e92f6902a9a85ba584a introduced per surface
queues, but the display_sync for swrast_commit_backbuffer remained on
the old queue.  This is likely to break when dispatching the correct
queue at the top of function (which can't dispatch the sync callback
we're waiting for).

The easiest known reproduction case is running weston-subsurfaces under
weston --use-pixman

Signed-off-by: Derek Foreman <derekf@osg.samsung.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
6 years agoradv: remove unused radv_pipeline::needs_data_cache variable
Samuel Pitoiset [Thu, 22 Mar 2018 13:30:37 +0000 (14:30 +0100)]
radv: remove unused radv_pipeline::needs_data_cache variable

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
6 years agomeson: merge C and C++ compiler arguments check
Eric Engestrom [Mon, 12 Mar 2018 14:54:50 +0000 (14:54 +0000)]
meson: merge C and C++ compiler arguments check

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agoomx: always define ENABLE_ST_OMX_{BELLAGIO,TIZONIA}
Mathias Fröhlich [Fri, 16 Mar 2018 05:34:35 +0000 (06:34 +0100)]
omx: always define ENABLE_ST_OMX_{BELLAGIO,TIZONIA}

We're trying to be -Wundef clean so that we can turn it on (and
eventually make it an error).

Note that the OMX code already used `#if ENABLE_ST_OMX_BELLAGIO` instead
of #ifdef; I could've changed these, but the point of -Wundef is to
catch typos, so we might as well make the change the right way.

Fixes: 83d4a5d5aea5a8a05be2 "st/omx/tizonia: Add H.264 decoder"
Fixes: b2f2236dc565dd1460f0 "st/omx/tizonia: Add H.264 encoder"
Fixes: c62cf1f165919bc74296 "st/omx/tizonia/h264d: Add EGLImage support"
Cc: Gurkirpal Singh <gurkirpal204@gmail.com>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agomeson: simplify omx logic
Mathias Fröhlich [Fri, 16 Mar 2018 05:34:35 +0000 (06:34 +0100)]
meson: simplify omx logic

and let's make sure `with_gallium_omx` is never 'auto' and can only be
one of [bellagio, tizonia, disabled].

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
6 years agovbo: Remove now duplicate _DrawVAO notification.
Mathias Fröhlich [Fri, 16 Mar 2018 05:34:35 +0000 (06:34 +0100)]
vbo: Remove now duplicate _DrawVAO notification.

The DriverFlags.NewArray bit is already set to NewDriverState in
_mesa_set_draw_vao since we have actually just above changed the VAOs
content. So this can be removed.
The _vbo_update_inputs is called by the vbo...recalculate_inputs being
set through the same mechanism as described above.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agovbo: Remove now duplicate _vbo_update_inputs from dlist draw.
Mathias Fröhlich [Fri, 16 Mar 2018 05:34:35 +0000 (06:34 +0100)]
vbo: Remove now duplicate _vbo_update_inputs from dlist draw.

At the current state, _vbo_update_inputs is called from
the draw callback if vbo...recalculate_inputs is set.
But that is now set of the _DrawVAO or its content or the
vertex program mode is changed.
So remove _vbo_update_inputs from the direct dlist draw path.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agovbo: Remove redundant set of DriverFlags.NewArray in vbo_bind_arrays.
Mathias Fröhlich [Fri, 16 Mar 2018 05:34:35 +0000 (06:34 +0100)]
vbo: Remove redundant set of DriverFlags.NewArray in vbo_bind_arrays.

Now that setting vbo...recalculate_inputs also sets the
DriverFlags.NewArray bits into the NewDriverState setting that from
vbo_bind_arrays is redundant.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agovbo: Remove vbo...recalculate_inputs from vbo_exec_invalidate_state.
Mathias Fröhlich [Fri, 16 Mar 2018 05:34:35 +0000 (06:34 +0100)]
vbo: Remove vbo...recalculate_inputs from vbo_exec_invalidate_state.

This flag is now set when the actual Array._DrawVAO changes.
So setting this flag is redundant here.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agomesa: A change of gl_vertex_processing_mode needs an array update.
Mathias Fröhlich [Fri, 16 Mar 2018 05:34:35 +0000 (06:34 +0100)]
mesa: A change of gl_vertex_processing_mode needs an array update.

Since arrays also handle the mapping of current values into the
disabled array slots, we need to tell the array update code that
this mapping has changed. Also mark only dirty if it has changed.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agomesa: Set DriverFlags.NewArray together with vbo...recalculate_inputs.
Mathias Fröhlich [Fri, 16 Mar 2018 05:34:35 +0000 (06:34 +0100)]
mesa: Set DriverFlags.NewArray together with vbo...recalculate_inputs.

Both mean something very similar and are set at the same time now.
For that vbo module to be set from core mesa, implement a public vbo
module method to set that flag. In the longer term the flag should
vanish in favor of a driver flag of the appropriate driver.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agomesa: Update VAO internal state when setting the _DrawVAO.
Mathias Fröhlich [Fri, 16 Mar 2018 05:34:35 +0000 (06:34 +0100)]
mesa: Update VAO internal state when setting the _DrawVAO.

Update the VAO internal state on Array._DrawVAO instead of
Array.VAO. Also the VAO internal state update gets triggered now
by a change of Array._DrawVAO instead of the _NEW_ARRAY state flag.
Also no driver looks at any VAO's NewArrays value from within
the Driver.UpdateState callback. So it should be safe to move
this update into the _mesa_set_draw_vao method.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agovbo: Move vbo_bind_arrays into a dd_driver_functions draw callback.
Mathias Fröhlich [Fri, 16 Mar 2018 05:34:35 +0000 (06:34 +0100)]
vbo: Move vbo_bind_arrays into a dd_driver_functions draw callback.

Factor out that common call into the almost single place.
Remove the _mesa_set_drawing_arrays call from vbo_{exec,save}_draw code
paths as the function is now called through vbo_bind_arrays.
Prepare updating the list of struct gl_vertex_array entries via
calling _vbo_update_inputs for being pushed into those drivers that
finally work on that long list of gl_vertex_array pointers.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agomesa: Move vbo draw functions into dd_function_table.
Mathias Fröhlich [Fri, 16 Mar 2018 05:34:35 +0000 (06:34 +0100)]
mesa: Move vbo draw functions into dd_function_table.

Move vbo draw functions into struct dd_function_table.
For now just wrap the underlying vbo functions.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
6 years agoclover/llvm: Fix build against LLVM/Clang 4.0
Aaron Watry [Thu, 22 Mar 2018 01:21:51 +0000 (20:21 -0500)]
clover/llvm: Fix build against LLVM/Clang 4.0

The opencl 1.0 langstandard was renamed in 5.0+

v2: Move preprocessor check into compat.hpp

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
6 years agoac/nir_to_llvm: add frexp support
Timothy Arceri [Tue, 20 Mar 2018 02:07:22 +0000 (13:07 +1100)]
ac/nir_to_llvm: add frexp support

Fixes CTS tests:
KHR-GL40.gpu_shader_fp64.builtin.frexp_double
KHR-GL40.gpu_shader_fp64.builtin.frexp_dvec2
KHR-GL40.gpu_shader_fp64.builtin.frexp_dvec3
KHR-GL40.gpu_shader_fp64.builtin.frexp_dvec4

And piglit test:
tests/spec/arb_gpu_shader_fp64/execution/built-in-functions/fs-frexp-dvec4.shader_test

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
6 years agonir: add frexp_exp and frexp_sig opcodes
Timothy Arceri [Tue, 20 Mar 2018 02:06:23 +0000 (13:06 +1100)]
nir: add frexp_exp and frexp_sig opcodes

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
6 years agoanv/pipeline: don't pass constant view index in multiview
Caio Marcelo de Oliveira Filho [Tue, 27 Feb 2018 19:46:51 +0000 (11:46 -0800)]
anv/pipeline: don't pass constant view index in multiview

If view mask has only one bit set, view index is effectively a
constant, so doesn't need to be passed to the next stages, just always
set it.

Part of this was in the original patch that added
anv_nir_lower_multiview.c but disabled.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agoanv/pipeline: use less instructions for multiview
Caio Marcelo de Oliveira Filho [Wed, 14 Mar 2018 23:12:44 +0000 (16:12 -0700)]
anv/pipeline: use less instructions for multiview

The view_index is encoded in the remainder of dividing instance id by
the number of views in the view mask (n). In the general case (handled
by the else clause), there is a need to map from 0..n-1 into the
number of the view being masked. For that a map is encoded.

In the case only the first n bits in the mask are set, the mapping is
trivial, 0..n-1 already represent what view is being referred to.

That case was in the original patch that added
anv_nir_lower_multiview.c but disabled.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agobroadcom/vc5: Fix up the NIR types of FS outputs generated by NIR-to-TGSI.
Eric Anholt [Wed, 21 Mar 2018 19:05:54 +0000 (12:05 -0700)]
broadcom/vc5: Fix up the NIR types of FS outputs generated by NIR-to-TGSI.

Unfortunately TGSI doesn't record the type of the FS output like GLSL
does, but VC5's TLB writes depend on the output's base type.  Just record
the type in the key at variant compile time when we've got a TGSI input
and then fix it up.

Fixes KHR-GLES3.packed_pixels.pbo_rectangle.rgba32i/ui and apparently a
GPU hang that breaks most tests that come after it.

6 years agospirv: Add a 64-bit implementation of Frexp
Neil Roberts [Thu, 8 Mar 2018 16:07:46 +0000 (17:07 +0100)]
spirv: Add a 64-bit implementation of Frexp

The implementation is inspired by
lower_instructions_visitor::dfrexp_sig_to_arith.

This has been tested against the arb_gpu_shader_fp64/fs-frexp-dvec4
test using the ARB_gl_spirv branch.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agoaubinator_error_decode: Compare only the class_name of the ring.
Rafael Antognolli [Tue, 20 Mar 2018 16:13:08 +0000 (09:13 -0700)]
aubinator_error_decode: Compare only the class_name of the ring.

ring_name is "<class_name> + <instance_id>" (e.g. rcs0). So we need to
first compare the class name only, then get the instance id.

Without this, INSTDONE is not being decoded.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
6 years agonir: Migrate nir_dce to instr worklist
Thomas Helland [Tue, 30 Jan 2018 20:35:50 +0000 (21:35 +0100)]
nir: Migrate nir_dce to instr worklist

Shader-db runtime change avarage of five runs:
   Before 125,77 seconds (+/- 0,09%)
   After  124,48 seconds (+/- 0,07%)

Tested-by: Dieter Nützel <Dieter at nuetzel-hh.de>
Reviewed-by: Eric Anholt <eric at anholt.net>
6 years agonir: Initial implementation of a nir_instr_worklist
Thomas Helland [Tue, 30 Jan 2018 20:24:44 +0000 (21:24 +0100)]
nir: Initial implementation of a nir_instr_worklist

Make a simple worklist by basically just wrapping u_vector.
This is intended used in nir_opt_dce to reduce the number of calls
to ralloc, as we are currenlty spamming ralloc quite bad. It should
also give better cache locality and much lower memory usage.

Tested-by: Dieter Nützel <Dieter at nuetzel-hh.de>
Reviewed-by: Eric Anholt <eric at anholt.net>
6 years agointel/tools: aubinator: Catch gen11 "enhanced execlist" submission
Scott D Phillips [Sat, 10 Mar 2018 00:29:41 +0000 (16:29 -0800)]
intel/tools: aubinator: Catch gen11 "enhanced execlist" submission

Different registers are used for execlist submission in gen11, so
also watch those. This code only watches element zero of the
submit queue, which is all aubdump currently writes.

Tested-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
6 years agoradeonsi: fix a snprintf warning on gcc 7.3.0
Marek Olšák [Tue, 20 Mar 2018 21:02:43 +0000 (17:02 -0400)]
radeonsi: fix a snprintf warning on gcc 7.3.0

6 years agoradeonsi/gfx9: print the swizzle mode for testdma
Marek Olšák [Sun, 11 Mar 2018 17:11:01 +0000 (13:11 -0400)]
radeonsi/gfx9: print the swizzle mode for testdma

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agoac/surface: compute tile swizzle for GFX9
Marek Olšák [Fri, 28 Jul 2017 23:40:48 +0000 (01:40 +0200)]
ac/surface: compute tile swizzle for GFX9

Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
6 years agobroadcom/vc5: Don't skip job submit just because everything is scissored.
Eric Anholt [Tue, 20 Mar 2018 19:52:19 +0000 (12:52 -0700)]
broadcom/vc5: Don't skip job submit just because everything is scissored.

The coordinate shaders may now have side effects in the form of transform
feedback.

Part of fixing
GTF-GLES3.gtf.GL3Tests.transform_feedback.transform_feedback_misc

6 years agobroadcom/vc5: Handle sparsely populated SO target array.
Eric Anholt [Tue, 20 Mar 2018 18:09:02 +0000 (11:09 -0700)]
broadcom/vc5: Handle sparsely populated SO target array.

Fixes
GTF-GLES3.gtf.GL3Tests.transform_feedback.transform_feedback_state_variables

6 years agobroadcom/vc5: Fix 3D miplevel limit to match other texture targets.
Eric Anholt [Tue, 20 Mar 2018 17:48:11 +0000 (10:48 -0700)]
broadcom/vc5: Fix 3D miplevel limit to match other texture targets.

Fixes segfault in
GTF-GLES3.gtf.GL3Tests.texture_storage.texture_storage_texture_levels on
level 13.

6 years agobroadcom/vc5: Clamp the instance divisor to 16 bits.
Eric Anholt [Tue, 20 Mar 2018 17:00:21 +0000 (10:00 -0700)]
broadcom/vc5: Clamp the instance divisor to 16 bits.

Fixes debug assert on
GTF-GLES3.gtf.GL3Tests.instanced_arrays.instanced_arrays_divisor

Signed-off-by: Eric Anholt <eric@anholt.net>
6 years agoi965: fix android build
Lionel Landwerlin [Tue, 20 Mar 2018 21:11:58 +0000 (21:11 +0000)]
i965: fix android build

This is the equivalent of commit 5770e1d89e0eb49eb3c9547e8657d636b6e7e5d7 for
android.

v2: fix xml files path and file given to --header

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Fixes: 2d2b15fbcab ("i965: fix autotools/android build")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105634
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
6 years agodocs: fix typo in 17.3.6 release notes
Juan A. Suarez Romero [Wed, 21 Mar 2018 16:31:13 +0000 (16:31 +0000)]
docs: fix typo in 17.3.6 release notes

Title is about 17.3.5, when it must be about 17.3.6.

CC: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
6 years agonir/dead_cf: also remove useless ifs
Caio Marcelo de Oliveira Filho [Mon, 19 Mar 2018 23:34:17 +0000 (16:34 -0700)]
nir/dead_cf: also remove useless ifs

Generalize the code for remove dead loops to also remove dead if
nodes. The conditions are the same in both cases, if the node (and
it's children) don't have side-effects AND the nodes after it don't
use the values produced by the node.

The only difference is when evaluating side effects: loops consider
only return jumps as a side-effect -- they can stop execution of nodes
after it; 'if' nodes outside loops should consider all kinds of
jumps (return, break, continue) since all of them can cause execution
of nodes after it to be skipped.

After this patch, empty ifs (those which both then and else blocks are
empty) will be removed by nir_opt_dead_cf.

It caused no change to shader-db, in part because the removal of empty
ifs is currently covered by nir_opt_peephole_select.

v2: Improve the identification of cases where break/continue can cause
    side-effects. (Jason)

v3: Move code comment changes to a different patch. (Jason)

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agonir/dead_cf: rephrase definition of a dead loop node
Caio Marcelo de Oliveira Filho [Mon, 19 Mar 2018 23:34:16 +0000 (16:34 -0700)]
nir/dead_cf: rephrase definition of a dead loop node

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
6 years agodocs: update calendar, add news and link release notes to 17.3.7
Juan A. Suarez Romero [Wed, 21 Mar 2018 16:02:37 +0000 (16:02 +0000)]
docs: update calendar, add news and link release notes to 17.3.7

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
6 years agodocs: add sha256 checksums for 17.3.7
Juan A. Suarez Romero [Wed, 21 Mar 2018 15:57:23 +0000 (15:57 +0000)]
docs: add sha256 checksums for 17.3.7

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit 13dd6016d749c07bfe2f20206a0bb8929ee585e8)

6 years agodocs: add release notes for 17.3.7
Juan A. Suarez Romero [Wed, 21 Mar 2018 13:10:00 +0000 (13:10 +0000)]
docs: add release notes for 17.3.7

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit 8a51f3857c22cfa5feab8e72abcdab8802e711df)

6 years agoradeon/vce: move feedback command inside of destroy function
Leo Liu [Mon, 19 Mar 2018 15:16:46 +0000 (11:16 -0400)]
radeon/vce: move feedback command inside of destroy function

On the CI family, firmware requires the destory command have to be the
last command in the IB, moving feedback command after destroy is causing
issues on CI cards, so we have to keep the previous logic that moves
destroy back to the last command.

But as the original issue fixed previously, with the newer family like Vega10,
feedback command have to be included inside of the task info command along
with destroy command.

Fixes: 6d74cb25("radeon/vce: move destroy command before feedback command")
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Cc: mesa-stable@lists.freedesktop.org