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st/nir: Free the GLSL IR after linking.
2019-03-27 Anuj Phogatintel: Add Elkhart Lake PCI-IDs
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2019-03-27 Anuj Phogatintel: Add Elkhart Lake device info
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2019-03-19 Anuj Phogatanv/icl: Add WA_2204188704 to disable pixel shader...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2019-03-19 Anuj Phogati965/icl: Add WA_2204188704 to disable pixel shader...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-11-26 Anuj Phogatanv/icl: Set use full ways in L3CNTLREG
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-11-26 Anuj Phogatintel/icl: Set way_size_per_bank to 4
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-11-26 Anuj Phogati965/icl: Set use full ways in L3CNTLREG
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-11-26 Anuj Phogati965/icl: Fix L3 configurations
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-11-02 Anuj Phogatanv/icl: Disable prefetching of sampler state entries
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-11-01 Anuj Phogatanv/icl: Set Error Detection Behavior Control Bit in...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-11-01 Anuj Phogati965/icl: Set Error Detection Behavior Control Bit...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-09-21 Anuj Phogatintel/icl: Fix URB size for different SKUs
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-09-21 Anuj Phogati965/icl: Set Enabled Texel Offset Precision Fix bit
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-09-21 Anuj Phogatanv/icl: Set Enabled Texel Offset Precision Fix bit
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-08-21 Anuj Phogatanv/icl: Allow headerless sampler messages for pre...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-08-21 Anuj Phogatanv/icl: Disable binding table prefetching
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-08-21 Anuj Phogati965/icl: Allow headerless sampler messages for pre...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-07-09 Anuj Phogati965/icl: Don't set float blend optimization bit in...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-07-09 Anuj Phogatanv/icl: Don't set float blend optimization bit in...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-05-21 Anuj Phogati965/glk: Add l3 banks count for 2x6 configuration
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-04-26 Anuj Phogatanv/icl: Enable Vulkan on Ice Lake
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-04-05 Anuj PhogatAdd more Coffee Lake brand strings
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-03-22 Anuj Phogatintel: Add a Ice Lake PCI IDs
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2018-03-22 Anuj Phogatintel: Disable fast color clear on icl
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2018-03-22 Anuj Phogatintel/compiler/icl: Update the assert in brw_stage_has_packe...
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2018-03-22 Anuj Phogatintel/common/icl: Disable hiz surface sampling
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2018-03-22 Anuj Phogatintel/common/icl: Add L3 config
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2018-03-02 Anuj Phogatintel/compiler: Memory fence commit must always be...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-28 Anuj Phogatintel: Add icl pci id for INTEL_DEVID_OVERRIDE
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-28 Anuj Phogatintel: Add a preliminary device for Ice Lake
Signed-off-by: Anuj Phogat <anuj.phogat@intel.com>
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2018-02-16 Anuj Phogatanv/icl: Add render target flush after uploading binding...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatanv/icl: Enable float blend optimization
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatanv/icl: Use gen11 functions
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatanv/icl: Build anv libs for gen11
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatanv/icl: Generate gen11 entry point functions
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatanv/icl: Don't use DISPATCH_MODE_SIMD4X2
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatanv/icl: Don't use SingleVertexDispatch
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatanv/icl: Don't set ResetGatewayTimer
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatanv/icl: Add #define genX
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatanv/icl: Add gen11 mocs defines
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogati965/icl: Add render target flush after uploading binding...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogati965/icl: Enable float blend optimization and Wa3DStateMode
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatintel/common/icl: Add has_sample_with_hiz flag in gen_device...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogati965/icl: Add assertions to check dispatch mode is...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogati965/icl: Update switch statements
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogati965/icl: Update the assert in brw_memory_barrier()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogati965/icl: Define and use icl mocs settings
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogati965/icl: Update the comment for maximum number of...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogati965/icl: Build and use gen11 functions for genxml...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogati965/icl: Don't set ResetGatewayTimer
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatintel/icl: Do StateCacheInvalidation for indirect clear...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatintel/isl/icl: Build and use gen11 surface state emit...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatintel/isl/icl: Add the maximum surface size limit
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatintel/genxml/icl: Update genx_bits header
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatintel/genxml/icl: Generate packing headers
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-16 Anuj Phogatintel/genxml/icl: Add gen11.xml
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-02-15 Anuj Phogatisl: Don't use surface format R32_FLOAT for typed atomic...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.co
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2018-02-08 Anuj Phogatintel: Add Coffee Lake brand strings
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-01-22 Anuj Phogatintel: Add Geminilake brand strings
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2018-01-11 Anuj Phogatintel: Add more Coffee Lake PCI IDs
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-12-23 Anuj PhogatRevert "i965/fs: Use align1 mode on ternary instructions...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-11-17 Anuj Phogati965: Remove DWord length from MI_FLUSH_DW definition
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-11-14 Anuj Phogati965: Make use of brw_load_register_imm32() helper...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-11-14 Anuj Phogati965/gen8+: Fix the number of dwords programmed in...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-11-14 Anuj Phogati965: Program DWord Length in MI_FLUSH_DW
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-11-14 Anuj Phogatanv/gen10: Enable float blend optimization
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-11-14 Anuj Phogatintel/genxml: Add Cache Mode SubSlice Register to gen10.xml
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-11-14 Anuj Phogatanv/gen10: Implement WaSampleOffsetIZ workaround
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-11-03 Anuj Phogati965/gen10: Implement Wa3DStateMode
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-11-03 Anuj Phogati965/gen10: Enable float blend optimization
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-11-03 Anuj Phogati965/gen10: Implement WaForceRCPFEHangWorkaround
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-11-03 Anuj Phogati965/gen10: Implement WaSampleOffsetIZ workaround
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-11-03 Anuj Phogati965/gen10: Don't set Antialiasing Enable in 3DSTATE_RASTER...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-11-03 Anuj Phogati965/gen10: Don't set Smooth Point Enable in 3DSTATE_SF...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-09-21 Anuj PhogatRevert "intel: Remove unused Kabylake pci ids
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-09-21 Anuj PhogatRevert "intel: Remove unused device info for KBL GT1.5"
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-09-11 Anuj Phogatintel: Remove unused Kabylake pci id
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-09-06 Anuj Phogatintel: Add brand string for KBL-R
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-09-06 Anuj Phogatintel: Remove unused device info for KBL GT1.5
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-09-06 Anuj Phogatintel: Change a KBL pci id to GT2 from GT1.5
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-09-06 Anuj Phogatintel: Fix few KBL brand strings
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-09-06 Anuj Phogatintel: Remove unused Kabylake pci ids
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-07-12 Anuj Phogatintel/compiler: Don't use opt_sampler_eot() optimization...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-23 Anuj Phogatanv/cnl: Don't write to Cache Mode Register 1 on gen10+
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-23 Anuj Phogati965/cnl: Don't write to Cache Mode Register 1 on gen10+
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-22 Anuj Phogatintel: Enable vulkan build for gen10
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-22 Anuj Phogatanv/cnl: Generate and use gen10 functions
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-22 Anuj Phogatanv/cnl: Don't set FloatBlendOptimizationEnable{Mask}
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-22 Anuj Phogatanv/cnl: Use GENX(xx) in place of GEN9_xx
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-22 Anuj Phogatanv/cnl: Add #defines for MOCS and genX(x)
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-22 Anuj Phogatintel/genxml: Add Gen10 CACHE_MODE_1 definitions
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-22 Anuj Phogatintel/genxml: Rename StartInstanceLocation to StartingInstan...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-22 Anuj Phogatintel/genxml: Rename IndirectStatePointer to BorderColorPointer
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-22 Anuj Phogatintel/genxml: Combine DataDWord{0, 1} fields in to...
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-22 Anuj Phogatintel/genxml: Add INSTDONE registers in gen10
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-22 Anuj Phogatintel/genxml: Add better support for MI_MATH in gen10
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-20 Anuj Phogati965: Add a variable for way size per bank in get_l3_way_size()
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-20 Anuj Phogati965: Fix broxton 2x6 l3 config
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-16 Anuj Phogatintel/isl: Add the maximum surface size limit
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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2017-06-16 Anuj Phogatintel/isl: Use uint64_t to store total surface size
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
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