src/spec/pinfunctions.py

   1 #!/usr/bin/env python
   2
   3 """ define functions here, with their pin names and the pin type.
   4
   5     each function returns a pair of lists
   6     (or objects with a __getitem__ function)
   7
   8     the first list (or object) contains pin name plus type specifications.
   9
  10     the type is:
  11
  12     * "-" for an input pin,
  13     * "+" for an output pin,
  14     * "*" for an in/out pin
  15
  16     each function is then added to the pinspec tuple, below, as a ("NAME",
  17     function) entry.
  18
  19     different functions may be added multiple times under the same NAME,
  20     so that complex (or large) functions can be split into one or more
  21     groups (and placed on different pinbanks).
  22
  23     eint, pwm and gpio are slightly odd in that instead of a fixed list
  24     an object is returned with a __getitem__ function that accepts a
  25     slice object.  in this way the actual generation of the pin name
  26     is delayed until it is known precisely how many pins are to be
  27     generated, and that's not known immediately (or it would be if
  28     every single one of the functions below had a start and end parameter
  29     added).  see spec.interfaces.PinGen class slice on pingroup
  30
  31     the second list is the names of pins that are part of an inout bus.
  32     this list of pins (a ganged group) will need to be changed under
  33     the control of the function, as a group.  for example: sdmmc's
  34     D0-D3 pins are in-out, they all change from input to output at
  35     the same time under the control of the function, therefore there's
  36     no point having multiple in-out switch/control wires, as the
  37     sdmmc is never going to do anything other than switch this entire
  38     bank all at once.  so in this particular example, sdmmc returns:
  39
  40     (['CMD+', 'CLK+', 'D0*', 'D1*', 'D2*', 'D3*'] # pin names
  41      ['D0*', 'D1*', 'D2*', 'D3*'])                # ganged bus names
  42
  43     addition:
  44
  45     3rd item in list gives the name of the clock.
  46 """
  47
  48
  49 def i2s(suffix, bank):
  50     return (['MCK+', 'BCK+', 'LRCK+', 'DI-', 'DO+'],
  51             [], "MCK")
  52
  53
  54 # XXX TODO: correct these.  this is a stub for now
  55 # https://bugs.libre-soc.org/show_bug.cgi?id=303
  56 def lpc(suffix, bank, pincount=4):
  57     lpcpins = ['CMD*', 'CLK+']
  58     inout = []
  59     for i in range(pincount):
  60         pname = "D%d*" % i
  61         lpcpins.append(pname)
  62         inout.append(pname)
  63     return (lpcpins, inout, 'CLK')
  64
  65
  66 def emmc(suffix, bank, pincount=8):
  67     emmcpins = ['CMD*', 'CLK+']
  68     inout = []
  69     for i in range(pincount):
  70         pname = "D%d*" % i
  71         emmcpins.append(pname)
  72         inout.append(pname)
  73     return (emmcpins, inout, 'CLK')
  74
  75
  76 def sdmmc(suffix, bank):
  77     return emmc(suffix, bank, pincount=4)
  78
  79
  80 def nspi(suffix, bank, iosize, masteronly=True):
  81     if masteronly:
  82         qpins = ['CK+', 'NSS+']
  83     else:
  84         qpins = ['CK*', 'NSS*']
  85     inout = []
  86     if iosize == 2:
  87         qpins += ['MOSI+', 'MISO-']
  88     else:
  89         for i in range(iosize):
  90             pname = "IO%d*" % i
  91             qpins.append(pname)
  92             inout.append(pname)
  93     return (qpins, inout, 'CK')
  94
  95
  96 def mspi(suffix, bank):
  97     return nspi(suffix, bank, 2, masteronly=True)
  98
  99
 100 def mquadspi(suffix, bank):
 101     return nspi(suffix, bank, 4, masteronly=True)
 102
 103
 104 def spi(suffix, bank):
 105     return nspi(suffix, bank, 2)
 106
 107
 108 def quadspi(suffix, bank):
 109     return nspi(suffix, bank, 4)
 110
 111
 112 def i2c(suffix, bank):
 113     """bi-directional (reversible, master-slave) I2C
 114     """
 115     return (['SDA*', 'SCL*'], [], 'SCL')
 116
 117
 118 def mi2c(suffix, bank):
 119     """master-only I2C (clock is output only)
 120     """
 121     return (['SDA*', 'SCL+'], [], 'SCL')
 122
 123
 124 def jtag(suffix, bank):
 125     return (['TMS-', 'TDI-', 'TDO+', 'TCK+'], [], 'TCK')
 126
 127
 128 def uart(suffix, bank):
 129     return (['TX+', 'RX-'], [], None)
 130
 131
 132 def ulpi(suffix, bank):
 133     ulpipins = ['CK+', 'DIR+', 'STP+', 'NXT+']
 134     for i in range(8):
 135         ulpipins.append('D%d*' % i)
 136     return (ulpipins, [], 'CK')
 137
 138
 139 def uartfull(suffix, bank):
 140     return (['TX+', 'RX-', 'CTS-', 'RTS+'], [], None)
 141
 142
 143 def rgbttl(suffix, bank):
 144     ttlpins = ['CK+', 'DE+', 'HS+', 'VS+']
 145     for i in range(24):
 146         ttlpins.append("OUT%d+" % i)
 147     return (ttlpins, [], 'CK')
 148
 149
 150 def rgmii(suffix, bank):
 151     buspins = []
 152     for i in range(4):
 153         buspins.append("ERXD%d-" % i)
 154     buspins += ['ERXCK-', 'ERXERR-']
 155     for i in range(4):
 156         buspins.append("ETXD%d+" % i)
 157     buspins += ['ETXCK-', 'ETXERR-',
 158                 'ETXEN+', 'ERXDV-',
 159                 'EMDC+', 'EMDIO*',
 160                 'ECRS-', 'ECOL+']
 161     return (buspins, [], ['ERXCK', 'ETXCK'])
 162
 163
 164 def flexbus1(suffix, bank):
 165     buspins = []
 166     inout = []
 167     for i in range(8):
 168         pname = "AD%d*" % i
 169         buspins.append(pname)
 170         inout.append(pname)
 171     for i in range(2):
 172         buspins.append("CS%d+" % i)
 173     buspins += ['ALE+', 'OE+', 'RW+', 'TA-',
 174                 # 'TS+',  commented out for now, mirrors ALE, for mux'd mode
 175                 'TBST+',
 176                 'TSIZ0+', 'TSIZ1+']
 177     for i in range(4):
 178         buspins.append("BWE%d+" % i)
 179     for i in range(2, 6):
 180         buspins.append("CS%d+" % i)
 181     return (buspins, inout, None)
 182
 183
 184 def flexbus2(suffix, bank):
 185     buspins = []
 186     for i in range(8, 32):
 187         buspins.append("AD%d*" % i)
 188     return (buspins, buspins, None)
 189
 190
 191 def sdram1(suffix, bank, n_adr=10):
 192     buspins = []
 193     inout = []
 194     for i in range(1):
 195         pname = "DQM%d+" % i
 196         buspins.append(pname)
 197     for i in range(8):
 198         pname = "D%d*" % i
 199         buspins.append(pname)
 200         inout.append(pname)
 201     for i in range(2):
 202         buspins.append("BA%d+" % i)
 203     for i in range(n_adr):
 204         buspins.append("AD%d+" % i)
 205     buspins += ['CLK+', 'CKE+', 'RASn+', 'CASn+', 'WEn+',
 206                 'CSn0+']
 207     return (buspins, inout, 'CLK')
 208
 209
 210 def sdram2(suffix, bank):
 211     buspins = []
 212     inout = []
 213     for i in range(10, 13):
 214         buspins.append("AD%d+" % i)
 215     for i in range(1, 2):
 216         pname = "DQM%d+" % i
 217         buspins.append(pname)
 218     for i in range(8, 16):
 219         pname = "D%d*" % i
 220         buspins.append(pname)
 221         inout.append(pname)
 222     return (buspins, inout, None)
 223
 224
 225 def sdram3(suffix, bank):
 226     buspins = []
 227     inout = []
 228     for i in range(1, 6):
 229         buspins.append("CSn%d+" % i)
 230     for i in range(13, 14):
 231         buspins.append("AD%d+" % i)
 232     for i in range(1, 4):
 233         pname = "DQM%d+" % i
 234     for i in range(8, 32):
 235         pname = "D%d*" % i
 236         buspins.append(pname)
 237         inout.append(pname)
 238     return (buspins, inout, None)
 239
 240
 241 def mcu8080(suffix, bank):
 242     buspins = []
 243     inout = []
 244     for i in range(8):
 245         pname = "D%d*" % i
 246         buspins.append(pname)
 247         inout.append(pname)
 248     for i in range(8):
 249         buspins.append("AD%d+" % (i + 8))
 250     for i in range(6):
 251         buspins.append("CS%d+" % i)
 252     for i in range(2):
 253         buspins.append("NRB%d+" % i)
 254     buspins += ['CD+', 'RD+', 'WR+', 'CLE+', 'ALE+',
 255                 'RST+']
 256     return (buspins, inout, None)
 257
 258
 259 class RangePin(object):
 260     def __init__(self, suffix, prefix=None):
 261         self.suffix = suffix
 262         self.prefix = prefix or ''
 263
 264     def __getitem__(self, s):
 265         res = []
 266         for idx in range(s.start or 0, s.stop or -1, s.step or 1):
 267             res.append("%s%d%s" % (self.prefix, idx, self.suffix))
 268         return res
 269
 270
 271 def eint(suffix, bank):
 272     return (RangePin("-"), [], None)
 273
 274
 275 def pwm(suffix, bank):
 276     return (RangePin("+"), [], None)
 277
 278
 279 def gpio(suffix, bank):
 280     return (("GPIO%s" % bank, RangePin(prefix=bank, suffix="*")), [], None)
 281
 282 def vss(suffix, bank):
 283     return (RangePin("-"), [], None)
 284
 285 def vdd(suffix, bank):
 286     return (RangePin("-"), [], None)
 287
 288 def sys(suffix, bank):
 289     return (['RST-',                       # reset line
 290              'PLLCLK-',                       # incoming clock (to PLL)
 291              'PLLSELA0-', 'PLLSELA1-',     # PLL divider-selector
 292              'PLLTESTOUT+',                # divided-output (for testing)
 293              'PLLVCOUT+',                  # PLL VCO analog out (for testing)
 294              ], [], 'CLK')
 295
 296 # list functions by name here
 297
 298 pinspec = (('IIS', i2s),
 299            ('LPC', lpc),
 300            ('EMMC', emmc),
 301            ('SD', sdmmc),
 302            ('MSPI', mspi),
 303            ('MQSPI', mquadspi),
 304            ('SPI', spi),
 305            ('QSPI', quadspi),
 306            ('TWI', i2c),
 307            ('MTWI', mi2c),
 308            ('JTAG', jtag),
 309            ('UART', uart),
 310            ('QUART', uartfull),
 311            ('LCD', rgbttl),
 312            ('ULPI', ulpi),
 313            ('RG', rgmii),
 314            ('FB', flexbus1),
 315            ('FB', flexbus2),
 316            ('SDR', sdram1),
 317            ('SDR', sdram2),
 318            ('SDR', sdram3),
 319            ('VSS', vss),
 320            ('VDD', vdd),
 321            ('SYS', sys),
 322            ('EINT', eint),
 323            ('PWM', pwm),
 324            ('GPIO', gpio),
 325            )