amo_func(uint32)
amo_func(uint64)
+ inline void yield_load_reservation()
+ {
+ load_reservation_address = (reg_t)-1;
+ }
+
+ inline void acquire_load_reservation(reg_t vaddr)
+ {
+ reg_t paddr = translate(vaddr, LOAD);
+ if (auto host_addr = sim->addr_to_mem(paddr))
+ load_reservation_address = refill_tlb(vaddr, paddr, host_addr, LOAD).target_offset + vaddr;
+ else
+ throw trap_load_access_fault(vaddr); // disallow LR to I/O space
+ }
+
+ inline bool check_load_reservation(reg_t vaddr)
+ {
+ reg_t paddr = translate(vaddr, STORE);
+ if (auto host_addr = sim->addr_to_mem(paddr))
+ return load_reservation_address == refill_tlb(vaddr, paddr, host_addr, STORE).target_offset + vaddr;
+ else
+ throw trap_store_access_fault(vaddr); // disallow SC to I/O space
+ }
+
static const reg_t ICACHE_ENTRIES = 1024;
inline size_t icache_index(reg_t addr)
simif_t* sim;
processor_t* proc;
memtracer_list_t tracer;
+ reg_t load_reservation_address;
uint16_t fetch_temp;
// implement an instruction cache for simulator performance