debug/programs/entry.S

   1 #ifndef ENTRY_S
   2 #define ENTRY_S
   3
   4 #include "encoding.h"
   5
   6 #define STACK_SIZE 512
   7
   8 #if XLEN == 64
   9 # define LREG ld
  10 # define SREG sd
  11 # define REGBYTES 8
  12 #else
  13 # define LREG lw
  14 # define SREG sw
  15 # define REGBYTES 4
  16 #endif
  17
  18   .section      .text.entry
  19   .globl _start
  20 _start:
  21   j handle_reset
  22
  23 nmi_vector:
  24   j nmi_vector
  25
  26 trap_vector:
  27   j trap_entry
  28
  29 handle_reset:
  30   la t0, trap_entry
  31   csrw mtvec, t0
  32   csrwi mstatus, 0
  33
  34   // make sure these registers exist by seeing if either S or U bits
  35   // are set before attempting to zero them out.
  36   csrr   t1, misa
  37   addi   t2, x0, 1
  38   slli   t2, t2, 20 // U_EXTENSION
  39   and    t2, t1, t2
  40   bne    x0, t2, 1f
  41   addi   t2, x0, 1
  42   slli   t2, t2, 18 // S_EXTENSION
  43   and    t2, t1, t2
  44   bne    x0, t2, 1f
  45   j 2f
  46 1:
  47   csrwi mideleg, 0
  48   csrwi medeleg, 0
  49 2:
  50   csrwi mie, 0
  51
  52   # initialize global pointer
  53 .option push
  54 .option norelax
  55   la gp, __global_pointer$
  56 .option pop
  57
  58   # initialize stack pointer
  59   la sp, stack_top
  60
  61   # Clear all hardware triggers
  62   li    t0, ~0
  63 1:
  64   addi  t0, t0, 1
  65   csrw  CSR_TSELECT, t0
  66   csrw  CSR_TDATA1, zero
  67   csrr  t1, CSR_TSELECT
  68   beq   t0, t1, 1b
  69
  70   # perform the rest of initialization in C
  71   j _init
  72
  73
  74 trap_entry:
  75   addi sp, sp, -32*REGBYTES
  76
  77   SREG x1, 1*REGBYTES(sp)
  78   SREG x2, 2*REGBYTES(sp)
  79   SREG x3, 3*REGBYTES(sp)
  80   SREG x4, 4*REGBYTES(sp)
  81   SREG x5, 5*REGBYTES(sp)
  82   SREG x6, 6*REGBYTES(sp)
  83   SREG x7, 7*REGBYTES(sp)
  84   SREG x8, 8*REGBYTES(sp)
  85   SREG x9, 9*REGBYTES(sp)
  86   SREG x10, 10*REGBYTES(sp)
  87   SREG x11, 11*REGBYTES(sp)
  88   SREG x12, 12*REGBYTES(sp)
  89   SREG x13, 13*REGBYTES(sp)
  90   SREG x14, 14*REGBYTES(sp)
  91   SREG x15, 15*REGBYTES(sp)
  92   SREG x16, 16*REGBYTES(sp)
  93   SREG x17, 17*REGBYTES(sp)
  94   SREG x18, 18*REGBYTES(sp)
  95   SREG x19, 19*REGBYTES(sp)
  96   SREG x20, 20*REGBYTES(sp)
  97   SREG x21, 21*REGBYTES(sp)
  98   SREG x22, 22*REGBYTES(sp)
  99   SREG x23, 23*REGBYTES(sp)
 100   SREG x24, 24*REGBYTES(sp)
 101   SREG x25, 25*REGBYTES(sp)
 102   SREG x26, 26*REGBYTES(sp)
 103   SREG x27, 27*REGBYTES(sp)
 104   SREG x28, 28*REGBYTES(sp)
 105   SREG x29, 29*REGBYTES(sp)
 106   SREG x30, 30*REGBYTES(sp)
 107   SREG x31, 31*REGBYTES(sp)
 108
 109   csrr a0, mcause
 110   csrr a1, mepc
 111   mv a2, sp
 112   jal handle_trap
 113   csrw mepc, a0
 114
 115   # Remain in M-mode after mret
 116   li t0, MSTATUS_MPP
 117   csrs mstatus, t0
 118
 119   LREG x1, 1*REGBYTES(sp)
 120   LREG x2, 2*REGBYTES(sp)
 121   LREG x3, 3*REGBYTES(sp)
 122   LREG x4, 4*REGBYTES(sp)
 123   LREG x5, 5*REGBYTES(sp)
 124   LREG x6, 6*REGBYTES(sp)
 125   LREG x7, 7*REGBYTES(sp)
 126   LREG x8, 8*REGBYTES(sp)
 127   LREG x9, 9*REGBYTES(sp)
 128   LREG x10, 10*REGBYTES(sp)
 129   LREG x11, 11*REGBYTES(sp)
 130   LREG x12, 12*REGBYTES(sp)
 131   LREG x13, 13*REGBYTES(sp)
 132   LREG x14, 14*REGBYTES(sp)
 133   LREG x15, 15*REGBYTES(sp)
 134   LREG x16, 16*REGBYTES(sp)
 135   LREG x17, 17*REGBYTES(sp)
 136   LREG x18, 18*REGBYTES(sp)
 137   LREG x19, 19*REGBYTES(sp)
 138   LREG x20, 20*REGBYTES(sp)
 139   LREG x21, 21*REGBYTES(sp)
 140   LREG x22, 22*REGBYTES(sp)
 141   LREG x23, 23*REGBYTES(sp)
 142   LREG x24, 24*REGBYTES(sp)
 143   LREG x25, 25*REGBYTES(sp)
 144   LREG x26, 26*REGBYTES(sp)
 145   LREG x27, 27*REGBYTES(sp)
 146   LREG x28, 28*REGBYTES(sp)
 147   LREG x29, 29*REGBYTES(sp)
 148   LREG x30, 30*REGBYTES(sp)
 149   LREG x31, 31*REGBYTES(sp)
 150
 151   addi sp, sp, 32*REGBYTES
 152   mret
 153
 154   // Fill the stack with data so we can see if it was overrun.
 155   .align 4
 156 stack_bottom:
 157   .fill STACK_SIZE/4, 4, 0x22446688
 158 stack_top:
 159 #endif