Add basic multicore test.
[riscv-tests.git] / debug / targets / freedom-e300-sim / openocd.cfg
1 adapter_khz 10000
2
3 source [find interface/jtag_vpi.cfg]
4 jtag_vpi_set_port $::env(JTAG_VPI_PORT)
5 #jtag_vpi_set_port 34448
6
7 set _CHIPNAME riscv
8 jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
9
10 set _TARGETNAME $_CHIPNAME.cpu
11 target create $_TARGETNAME riscv -chain-position $_TARGETNAME -rtos riscv
12
13 init
14 halt
15 echo "Ready for Remote Connections"