initial commit
[riscv-tests.git] / isa / macros / scalar / test_macros.h
1 #ifndef __TEST_MACROS_SCALAR_H
2 #define __TEST_MACROS_SCALAR_H
3
4 #define TEST_DATA
5
6 #-----------------------------------------------------------------------
7 # Helper macros
8 #-----------------------------------------------------------------------
9
10 #define TEST_CASE( testnum, testreg, correctval, code... ) \
11 test_ ## testnum: \
12 code; \
13 li x29, correctval; \
14 li x28, testnum; \
15 bne testreg, x29, fail;
16
17 #define TEST_CASE_JUMP( testnum, testreg, correctval, code... ) \
18 test_ ## testnum: \
19 code; \
20 li x29, correctval; \
21 li x28, testnum; \
22 beq testreg, x29, pass_ ## testnum; \
23 j fail; \
24 pass_ ## testnum: \
25
26 # We use a macro hack to simpify code generation for various numbers
27 # of bubble cycles.
28
29 #define TEST_INSERT_NOPS_0
30 #define TEST_INSERT_NOPS_1 nop; TEST_INSERT_NOPS_0
31 #define TEST_INSERT_NOPS_2 nop; TEST_INSERT_NOPS_1
32 #define TEST_INSERT_NOPS_3 nop; TEST_INSERT_NOPS_2
33 #define TEST_INSERT_NOPS_4 nop; TEST_INSERT_NOPS_3
34 #define TEST_INSERT_NOPS_5 nop; TEST_INSERT_NOPS_4
35 #define TEST_INSERT_NOPS_6 nop; TEST_INSERT_NOPS_5
36 #define TEST_INSERT_NOPS_7 nop; TEST_INSERT_NOPS_6
37 #define TEST_INSERT_NOPS_8 nop; TEST_INSERT_NOPS_7
38 #define TEST_INSERT_NOPS_9 nop; TEST_INSERT_NOPS_8
39 #define TEST_INSERT_NOPS_10 nop; TEST_INSERT_NOPS_9
40
41 #-----------------------------------------------------------------------
42 # Tests for instructions with immediate operand
43 #-----------------------------------------------------------------------
44
45 #define TEST_IMM_OP( testnum, inst, result, val1, imm ) \
46 TEST_CASE( testnum, x3, result, \
47 li x1, val1; \
48 inst x3, x1, imm; \
49 )
50
51 #define TEST_IMM_SRC1_EQ_DEST( testnum, inst, result, val1, imm ) \
52 TEST_CASE( testnum, x1, result, \
53 li x1, val1; \
54 inst x1, x1, imm; \
55 )
56
57 #define TEST_IMM_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
58 TEST_CASE( testnum, x6, result, \
59 li x4, 0; \
60 1: li x1, val1; \
61 inst x3, x1, imm; \
62 TEST_INSERT_NOPS_ ## nop_cycles \
63 addi x6, x3, 0; \
64 addi x4, x4, 1; \
65 li x5, 2; \
66 bne x4, x5, 1b \
67 )
68
69 #define TEST_IMM_SRC1_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
70 TEST_CASE( testnum, x3, result, \
71 li x4, 0; \
72 1: li x1, val1; \
73 TEST_INSERT_NOPS_ ## nop_cycles \
74 inst x3, x1, imm; \
75 addi x4, x4, 1; \
76 li x5, 2; \
77 bne x4, x5, 1b \
78 )
79
80 #define TEST_IMM_ZEROSRC1( testnum, inst, result, imm ) \
81 TEST_CASE( testnum, x1, result, \
82 inst x1, x0, imm; \
83 )
84
85 #define TEST_IMM_ZERODEST( testnum, inst, val1, imm ) \
86 TEST_CASE( testnum, x0, 0, \
87 li x1, val1; \
88 inst x0, x1, imm; \
89 )
90
91 #-----------------------------------------------------------------------
92 # Tests for vector config instructions
93 #-----------------------------------------------------------------------
94
95 #define TEST_VVCFGIVL( testnum, nxpr, nfpr, bank, vl, result ) \
96 TEST_CASE_JUMP( testnum, x1, result, \
97 li x2, bank; \
98 mtpcr x2, cr18; \
99 li x1, vl; \
100 vvcfgivl x1,x1,nxpr,nfpr; \
101 )
102
103 #define TEST_VVCFG( testnum, nxpr, nfpr, bank, vl, result ) \
104 TEST_CASE_JUMP( testnum, x1, result, \
105 li x2, bank; \
106 mtpcr x2, cr18; \
107 li x1, nxpr; \
108 li x2, nfpr; \
109 vvcfg x1,x2; \
110 li x1, vl; \
111 vsetvl x1,x1; \
112 )
113
114 #define TEST_VSETVL( testnum, nxpr, nfpr, bank, vl, result ) \
115 TEST_CASE_JUMP( testnum, x1, result, \
116 li x2, bank; \
117 mtpcr x2, cr18; \
118 vvcfgivl x0,x0,nxpr,nfpr; \
119 li x1, vl; \
120 vsetvl x1, x1; \
121 )
122
123 #-----------------------------------------------------------------------
124 # Tests for an instruction with register operands
125 #-----------------------------------------------------------------------
126
127 #define TEST_R_OP( testnum, inst, result, val1 ) \
128 TEST_CASE( testnum, x3, result, \
129 li x1, val1; \
130 inst x3, x1; \
131 )
132
133 #define TEST_R_SRC1_EQ_DEST( testnum, inst, result, val1 ) \
134 TEST_CASE( testnum, x1, result, \
135 li x1, val1; \
136 inst x1, x1; \
137 )
138
139 #define TEST_R_DEST_BYPASS( testnum, nop_cycles, inst, result, val1 ) \
140 TEST_CASE( testnum, x6, result, \
141 li x4, 0; \
142 1: li x1, val1; \
143 inst x3, x1; \
144 TEST_INSERT_NOPS_ ## nop_cycles \
145 addi x6, x3, 0; \
146 addi x4, x4, 1; \
147 li x5, 2; \
148 bne x4, x5, 1b \
149 )
150
151 #-----------------------------------------------------------------------
152 # Tests for an instruction with register-register operands
153 #-----------------------------------------------------------------------
154
155 #define TEST_RR_OP( testnum, inst, result, val1, val2 ) \
156 TEST_CASE( testnum, x3, result, \
157 li x1, val1; \
158 li x2, val2; \
159 inst x3, x1, x2; \
160 )
161
162 #define TEST_RR_SRC1_EQ_DEST( testnum, inst, result, val1, val2 ) \
163 TEST_CASE( testnum, x1, result, \
164 li x1, val1; \
165 li x2, val2; \
166 inst x1, x1, x2; \
167 )
168
169 #define TEST_RR_SRC2_EQ_DEST( testnum, inst, result, val1, val2 ) \
170 TEST_CASE( testnum, x2, result, \
171 li x1, val1; \
172 li x2, val2; \
173 inst x2, x1, x2; \
174 )
175
176 #define TEST_RR_SRC12_EQ_DEST( testnum, inst, result, val1 ) \
177 TEST_CASE( testnum, x1, result, \
178 li x1, val1; \
179 inst x1, x1, x1; \
180 )
181
182 #define TEST_RR_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, val2 ) \
183 TEST_CASE( testnum, x6, result, \
184 li x4, 0; \
185 1: li x1, val1; \
186 li x2, val2; \
187 inst x3, x1, x2; \
188 TEST_INSERT_NOPS_ ## nop_cycles \
189 addi x6, x3, 0; \
190 addi x4, x4, 1; \
191 li x5, 2; \
192 bne x4, x5, 1b \
193 )
194
195 #define TEST_RR_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
196 TEST_CASE( testnum, x3, result, \
197 li x4, 0; \
198 1: li x1, val1; \
199 TEST_INSERT_NOPS_ ## src1_nops \
200 li x2, val2; \
201 TEST_INSERT_NOPS_ ## src2_nops \
202 inst x3, x1, x2; \
203 addi x4, x4, 1; \
204 li x5, 2; \
205 bne x4, x5, 1b \
206 )
207
208 #define TEST_RR_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
209 TEST_CASE( testnum, x3, result, \
210 li x4, 0; \
211 1: li x2, val2; \
212 TEST_INSERT_NOPS_ ## src1_nops \
213 li x1, val1; \
214 TEST_INSERT_NOPS_ ## src2_nops \
215 inst x3, x1, x2; \
216 addi x4, x4, 1; \
217 li x5, 2; \
218 bne x4, x5, 1b \
219 )
220
221 #define TEST_RR_ZEROSRC1( testnum, inst, result, val ) \
222 TEST_CASE( testnum, x2, result, \
223 li x1, val; \
224 inst x2, x0, x1; \
225 )
226
227 #define TEST_RR_ZEROSRC2( testnum, inst, result, val ) \
228 TEST_CASE( testnum, x2, result, \
229 li x1, val; \
230 inst x2, x1, x0; \
231 )
232
233 #define TEST_RR_ZEROSRC12( testnum, inst, result ) \
234 TEST_CASE( testnum, x1, result, \
235 inst x1, x0, x0; \
236 )
237
238 #define TEST_RR_ZERODEST( testnum, inst, val1, val2 ) \
239 TEST_CASE( testnum, x0, 0, \
240 li x1, val1; \
241 li x2, val2; \
242 inst x0, x1, x2; \
243 )
244
245 #-----------------------------------------------------------------------
246 # Test memory instructions
247 #-----------------------------------------------------------------------
248
249 #define TEST_LD_OP( testnum, inst, result, offset, base ) \
250 TEST_CASE( testnum, x3, result, \
251 la x1, base; \
252 inst x3, offset(x1); \
253 )
254
255 #define TEST_ST_OP( testnum, load_inst, store_inst, result, offset, base ) \
256 TEST_CASE( testnum, x3, result, \
257 la x1, base; \
258 li x2, result; \
259 store_inst x2, offset(x1); \
260 load_inst x3, offset(x1); \
261 )
262
263 #define TEST_LD_DEST_BYPASS( testnum, nop_cycles, inst, result, offset, base ) \
264 test_ ## testnum: \
265 li x28, testnum; \
266 li x4, 0; \
267 1: la x1, base; \
268 inst x3, offset(x1); \
269 TEST_INSERT_NOPS_ ## nop_cycles \
270 addi x6, x3, 0; \
271 li x29, result; \
272 bne x6, x29, fail; \
273 addi x4, x4, 1; \
274 li x5, 2; \
275 bne x4, x5, 1b; \
276
277 #define TEST_LD_SRC1_BYPASS( testnum, nop_cycles, inst, result, offset, base ) \
278 test_ ## testnum: \
279 li x28, testnum; \
280 li x4, 0; \
281 1: la x1, base; \
282 TEST_INSERT_NOPS_ ## nop_cycles \
283 inst x3, offset(x1); \
284 li x29, result; \
285 bne x3, x29, fail; \
286 addi x4, x4, 1; \
287 li x5, 2; \
288 bne x4, x5, 1b \
289
290 #define TEST_ST_SRC12_BYPASS( testnum, src1_nops, src2_nops, load_inst, store_inst, result, offset, base ) \
291 test_ ## testnum: \
292 li x28, testnum; \
293 li x4, 0; \
294 1: la x1, result; \
295 TEST_INSERT_NOPS_ ## src1_nops \
296 la x2, base; \
297 TEST_INSERT_NOPS_ ## src2_nops \
298 store_inst x1, offset(x2); \
299 load_inst x3, offset(x2); \
300 li x29, result; \
301 bne x3, x29, fail; \
302 addi x4, x4, 1; \
303 li x5, 2; \
304 bne x4, x5, 1b \
305
306 #define TEST_ST_SRC21_BYPASS( testnum, src1_nops, src2_nops, load_inst, store_inst, result, offset, base ) \
307 test_ ## testnum: \
308 li x28, testnum; \
309 li x4, 0; \
310 1: la x2, base; \
311 TEST_INSERT_NOPS_ ## src1_nops \
312 la x1, result; \
313 TEST_INSERT_NOPS_ ## src2_nops \
314 store_inst x1, offset(x2); \
315 load_inst x3, offset(x2); \
316 li x29, result; \
317 bne x3, x29, fail; \
318 addi x4, x4, 1; \
319 li x5, 2; \
320 bne x4, x5, 1b \
321
322 #-----------------------------------------------------------------------
323 # Test branch instructions
324 #-----------------------------------------------------------------------
325
326 #define TEST_BR1_OP_TAKEN( testnum, inst, val1 ) \
327 test_ ## testnum: \
328 li x28, testnum; \
329 li x1, val1; \
330 inst x1, 2f; \
331 bne x0, x28, fail; \
332 1: bne x0, x28, 3f; \
333 2: inst x1, 1b; \
334 bne x0, x28, fail; \
335 3:
336
337 #define TEST_BR1_OP_NOTTAKEN( testnum, inst, val1 ) \
338 test_ ## testnum: \
339 li x28, testnum; \
340 li x1, val1; \
341 inst x1, 1f; \
342 bne x0, x28, 2f; \
343 1: bne x0, x28, fail; \
344 2: inst x1, 1b; \
345 3:
346
347 #define TEST_BR1_SRC1_BYPASS( testnum, nop_cycles, inst, val1 ) \
348 test_ ## testnum: \
349 li x28, testnum; \
350 li x4, 0; \
351 1: li x1, val1; \
352 TEST_INSERT_NOPS_ ## nop_cycles \
353 inst x1, fail; \
354 addi x4, x4, 1; \
355 li x5, 2; \
356 bne x4, x5, 1b \
357
358 #define TEST_BR2_OP_TAKEN( testnum, inst, val1, val2 ) \
359 test_ ## testnum: \
360 li x28, testnum; \
361 li x1, val1; \
362 li x2, val2; \
363 inst x1, x2, 2f; \
364 bne x0, x28, fail; \
365 1: bne x0, x28, 3f; \
366 2: inst x1, x2, 1b; \
367 bne x0, x28, fail; \
368 3:
369
370 #define TEST_BR2_OP_NOTTAKEN( testnum, inst, val1, val2 ) \
371 test_ ## testnum: \
372 li x28, testnum; \
373 li x1, val1; \
374 li x2, val2; \
375 inst x1, x2, 1f; \
376 bne x0, x28, 2f; \
377 1: bne x0, x28, fail; \
378 2: inst x1, x2, 1b; \
379 3:
380
381 #define TEST_BR2_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
382 test_ ## testnum: \
383 li x28, testnum; \
384 li x4, 0; \
385 1: li x1, val1; \
386 TEST_INSERT_NOPS_ ## src1_nops \
387 li x2, val2; \
388 TEST_INSERT_NOPS_ ## src2_nops \
389 inst x1, x2, fail; \
390 addi x4, x4, 1; \
391 li x5, 2; \
392 bne x4, x5, 1b \
393
394 #define TEST_BR2_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
395 test_ ## testnum: \
396 li x28, testnum; \
397 li x4, 0; \
398 1: li x2, val2; \
399 TEST_INSERT_NOPS_ ## src1_nops \
400 li x1, val1; \
401 TEST_INSERT_NOPS_ ## src2_nops \
402 inst x1, x2, fail; \
403 addi x4, x4, 1; \
404 li x5, 2; \
405 bne x4, x5, 1b \
406
407 #-----------------------------------------------------------------------
408 # Test jump instructions
409 #-----------------------------------------------------------------------
410
411 #define TEST_JR_SRC1_BYPASS( testnum, nop_cycles, inst ) \
412 test_ ## testnum: \
413 li x28, testnum; \
414 li x4, 0; \
415 1: la x6, 2f; \
416 TEST_INSERT_NOPS_ ## nop_cycles \
417 inst x6; \
418 bne x0, x28, fail; \
419 2: addi x4, x4, 1; \
420 li x5, 2; \
421 bne x4, x5, 1b \
422
423 #define TEST_JALR_SRC1_BYPASS( testnum, nop_cycles, inst ) \
424 test_ ## testnum: \
425 li x28, testnum; \
426 li x4, 0; \
427 1: la x6, 2f; \
428 TEST_INSERT_NOPS_ ## nop_cycles \
429 inst x19, x6, 0; \
430 bne x0, x28, fail; \
431 2: addi x4, x4, 1; \
432 li x5, 2; \
433 bne x4, x5, 1b \
434
435 #-----------------------------------------------------------------------
436 # Tests floating-point instructions
437 #-----------------------------------------------------------------------
438
439 #define TEST_FP_OP_S_INTERNAL( testnum, result, val1, val2, val3, code... ) \
440 test_ ## testnum: \
441 li x28, testnum; \
442 la a0, test_ ## testnum ## _data ;\
443 flw f0, 0(a0); \
444 flw f1, 4(a0); \
445 flw f2, 8(a0); \
446 lw a3, 12(a0); \
447 code; \
448 bne a0, a3, fail; \
449 b 1f; \
450 .align 2; \
451 test_ ## testnum ## _data: \
452 .float val1; \
453 .float val2; \
454 .float val3; \
455 .result; \
456 1:
457
458 #define TEST_FP_OP_D_INTERNAL( testnum, result, val1, val2, val3, code... ) \
459 test_ ## testnum: \
460 li x28, testnum; \
461 la a0, test_ ## testnum ## _data ;\
462 fld f0, 0(a0); \
463 fld f1, 8(a0); \
464 fld f2, 16(a0); \
465 ld a3, 24(a0); \
466 code; \
467 bne a0, a3, fail; \
468 b 1f; \
469 .align 3; \
470 test_ ## testnum ## _data: \
471 .double val1; \
472 .double val2; \
473 .double val3; \
474 .result; \
475 1:
476
477 #define TEST_FCVT_S_D( testnum, result, val1 ) \
478 TEST_FP_OP_D_INTERNAL( testnum, double result, val1, 0.0, 0.0, \
479 fcvt.s.d f3, f0; fcvt.d.s f3, f3; mftx.d a0, f3)
480
481 #define TEST_FCVT_D_S( testnum, result, val1 ) \
482 TEST_FP_OP_S_INTERNAL( testnum, float result, val1, 0.0, 0.0, \
483 fcvt.d.s f3, f0; fcvt.s.d f3, f3; mftx.s a0, f3)
484
485 #define TEST_FP_OP1_S( testnum, inst, result, val1 ) \
486 TEST_FP_OP_S_INTERNAL( testnum, float result, val1, 0.0, 0.0, \
487 inst f3, f0; mftx.s a0, f3)
488
489 #define TEST_FP_OP1_D( testnum, inst, result, val1 ) \
490 TEST_FP_OP_D_INTERNAL( testnum, double result, val1, 0.0, 0.0, \
491 inst f3, f0; mftx.d a0, f3)
492
493 #define TEST_FP_OP2_S( testnum, inst, result, val1, val2 ) \
494 TEST_FP_OP_S_INTERNAL( testnum, float result, val1, val2, 0.0, \
495 inst f3, f0, f1; mftx.s a0, f3)
496
497 #define TEST_FP_OP2_D( testnum, inst, result, val1, val2 ) \
498 TEST_FP_OP_D_INTERNAL( testnum, double result, val1, val2, 0.0, \
499 inst f3, f0, f1; mftx.d a0, f3)
500
501 #define TEST_FP_OP3_S( testnum, inst, result, val1, val2, val3 ) \
502 TEST_FP_OP_S_INTERNAL( testnum, float result, val1, val2, val3, \
503 inst f3, f0, f1, f2; mftx.s a0, f3)
504
505 #define TEST_FP_OP3_D( testnum, inst, result, val1, val2, val3 ) \
506 TEST_FP_OP_D_INTERNAL( testnum, double result, val1, val2, val3, \
507 inst f3, f0, f1, f2; mftx.d a0, f3)
508
509 #define TEST_FP_INT_OP_S( testnum, inst, result, val1, rm ) \
510 TEST_FP_OP_S_INTERNAL( testnum, word result, val1, 0.0, 0.0, \
511 inst a0, f0, rm)
512
513 #define TEST_FP_INT_OP_D( testnum, inst, result, val1, rm ) \
514 TEST_FP_OP_D_INTERNAL( testnum, dword result, val1, 0.0, 0.0, \
515 inst a0, f0, rm)
516
517 #define TEST_FP_CMP_OP_S( testnum, inst, result, val1, val2 ) \
518 TEST_FP_OP_S_INTERNAL( testnum, word result, val1, val2, 0.0, \
519 inst a0, f0, f1)
520
521 #define TEST_FP_CMP_OP_D( testnum, inst, result, val1, val2 ) \
522 TEST_FP_OP_D_INTERNAL( testnum, dword result, val1, val2, 0.0, \
523 inst a0, f0, f1)
524
525 #define TEST_INT_FP_OP_S( testnum, inst, result, val1 ) \
526 test_ ## testnum: \
527 li x28, testnum; \
528 la a0, test_ ## testnum ## _data ;\
529 lw a3, 0(a0); \
530 li a0, val1; \
531 inst f0, a0; \
532 mftx.s a0, f0; \
533 bne a0, a3, fail; \
534 b 1f; \
535 .align 2; \
536 test_ ## testnum ## _data: \
537 .float result; \
538 1:
539
540 #define TEST_INT_FP_OP_D( testnum, inst, result, val1 ) \
541 test_ ## testnum: \
542 li x28, testnum; \
543 la a0, test_ ## testnum ## _data ;\
544 ld a3, 0(a0); \
545 li a0, val1; \
546 inst f0, a0; \
547 mftx.d a0, f0; \
548 bne a0, a3, fail; \
549 b 1f; \
550 .align 3; \
551 test_ ## testnum ## _data: \
552 .double result; \
553 1:
554
555 #define TEST_ILLEGAL_VT_REGID( testnum, nxreg, nfreg, inst, reg1, reg2, reg3) \
556 mfpcr a0,cr0; \
557 li a1,1; \
558 slli a3,a1,8; \
559 or a0,a0,a1; \
560 mtpcr a0,cr0; \
561 la a0, handler ## testnum; \
562 mtpcr a0, cr3; \
563 li a0, 4; \
564 vvcfgivl a0, a0, nxreg, nfreg; \
565 la a0, src1; \
566 la a1, src2; \
567 vld vx2, a0; \
568 vld vx3, a1; \
569 lui a0,%hi(vtcode1 ## testnum); \
570 vf %lo(vtcode1 ## testnum)(a0); \
571 la a3, dest; \
572 vsd vx2, a3; \
573 fence.v.l; \
574 vtcode1 ## testnum: \
575 add x2, x2, x3; \
576 illegal ## testnum: \
577 inst reg1, reg2, reg3; \
578 stop; \
579 vtcode2 ## testnum: \
580 add x2, x2, x3; \
581 stop; \
582 handler ## testnum: \
583 vxcptkill; \
584 li x28,2; \
585 mfpcr a0,cr6; \
586 li a1,26; \
587 bne a0,a1,fail; \
588 mfpcr a0,cr2; \
589 la a1,illegal ## testnum; \
590 bne a0,a1,fail; \
591 li a0,4; \
592 vvcfgivl a0,a0,32,0; \
593 la a0,src1; \
594 la a1,src2; \
595 vld vx2,a0; \
596 vld vx3,a1; \
597 lui a0,%hi(vtcode2 ## testnum); \
598 vf %lo(vtcode2 ## testnum)(a0); \
599 la a3,dest; \
600 vsd vx2,a3; \
601 fence.v.l; \
602 ld a1,0(a3); \
603 li a2,5; \
604 li x28,2; \
605 bne a1,a2,fail; \
606 ld a1,8(a3); \
607 li x28,3; \
608 bne a1,a2,fail; \
609 ld a1,16(a3); \
610 li x28,4; \
611 bne a1,a2,fail; \
612 ld a1,24(a3); \
613 li x28,5; \
614 bne a1,a2,fail; \
615
616 #define TEST_ILLEGAL_TVEC_REGID( testnum, nxreg, nfreg, inst, reg1, reg2, aux) \
617 mfpcr a0,cr0; \
618 li a1,1; \
619 slli a2,a1,8; \
620 or a0,a0,a1; \
621 mtpcr a0,cr0; \
622 la a0, handler ## testnum; \
623 mtpcr a0, cr3; \
624 li a0, 4; \
625 vvcfgivl a0, a0, nxreg, nfreg; \
626 la a0, src1; \
627 la a1, src2; \
628 vld vx2, a0; \
629 vld vx3, a1; \
630 lui a0,%hi(vtcode1 ## testnum); \
631 vf %lo(vtcode1 ## testnum)(a0); \
632 la reg2, dest; \
633 illegal ## testnum: \
634 inst reg1, reg2; \
635 la a3, dest; \
636 vsd vx2, a3; \
637 fence.v.l; \
638 vtcode1 ## testnum: \
639 add x2, x2, x3; \
640 stop; \
641 vtcode2 ## testnum: \
642 add x2, x2, x3; \
643 stop; \
644 handler ## testnum: \
645 vxcptkill; \
646 li x28,2; \
647 mfpcr a0,cr6; \
648 li a1,27; \
649 bne a0,a1,fail; \
650 mfpcr a0, cr2; \
651 li a1, aux; \
652 bne a0, a1, fail; \
653 li a0,4; \
654 vvcfgivl a0,a0,32,0; \
655 la a0,src1; \
656 la a1,src2; \
657 vld vx2,a0; \
658 vld vx3,a1; \
659 lui a0,%hi(vtcode2 ## testnum); \
660 vf %lo(vtcode2 ## testnum)(a0); \
661 la a3,dest; \
662 vsd vx2,a3; \
663 fence.v.l; \
664 ld a1,0(a3); \
665 li a2,5; \
666 li x28,2; \
667 bne a1,a2,fail; \
668 ld a1,8(a3); \
669 li x28,3; \
670 bne a1,a2,fail; \
671 ld a1,16(a3); \
672 li x28,4; \
673 bne a1,a2,fail; \
674 ld a1,24(a3); \
675 li x28,5; \
676 bne a1,a2,fail; \
677
678 #-----------------------------------------------------------------------
679 # Pass and fail code (assumes test num is in x28)
680 #-----------------------------------------------------------------------
681
682
683 #define TEST_PASSFAIL \
684 bne x0, x28, pass; \
685 fail: \
686 RVTEST_FAIL \
687 pass: \
688 RVTEST_PASS \
689
690 #endif