1 # See LICENSE for license details.
3 #*****************************************************************************
5 #-----------------------------------------------------------------------------
7 # Test misaligned vt instruction trap.
10 #include "riscv_test.h"
11 #include "test_macros.h"
24 slli a4,a4,SR_IM_SHIFT
25 or a3,a3,a4 # enable IM[COP]
47 li a4,HWACHA_CAUSE_VF_MISALIGNED_FETCH
53 andi a3, a3, -4 # mask off lower bits so that may
54 andi a4, a4, -4 # ignore impl. specific behavior
57 # make sure vector unit has cleared out
106 .dword 0xdeadbeefcafebabe
107 .dword 0xdeadbeefcafebabe
108 .dword 0xdeadbeefcafebabe
109 .dword 0xdeadbeefcafebabe