redirect c_lwsp / c_swsp to x28
[riscv-tests.git] / isa / rv64uc / sv_c_lwsp.S
1 # See LICENSE for license details.
2
3 #*****************************************************************************
4 # rvc.S
5 #-----------------------------------------------------------------------------
6 #
7 # Test RVC corner cases.
8 #
9
10 #include "riscv_test.h"
11 #include "sv_test_macros.h"
12
13 RVTEST_RV64U
14 RVTEST_CODE_BEGIN
15
16 .align 2
17 .option push
18 .option norvc
19
20 li a2, 0
21 li a3, 0
22 li a4, 0
23
24 SET_SV_MVL(3)
25 SET_SV_2CSRS( SV_REG_CSR(1, 12, 0, 12, 1),
26 SV_REG_CSR(1, 2, 0, 28, 1) )
27 SET_SV_VL(3)
28
29 # store addr of data in x28 because CSR redirects x2 to x28
30 # and c.lwsp is an element-offset (if isvec=true that is)
31 la x28, data;
32
33 .option push;
34 .option rvc;
35 .align 2;
36 c.lwsp a2, 0(sp); # SP is actually redirected to x28!
37 .option pop
38
39
40 SET_SV_VL(1)
41 CLR_SV_CSRS()
42 SET_SV_MVL(1)
43
44 TEST_SV_IMM(a2, 1001)
45 TEST_SV_IMM(a3, 1002)
46 TEST_SV_IMM(a4, 1005)
47
48 .option pop
49
50 .align 2
51 .option push
52 .option norvc
53
54 li a2, 0
55 li a3, 0
56 li a4, 0
57
58 SET_SV_MVL(3)
59 SET_SV_2CSRS( SV_REG_CSR(1, 12, 0, 12, 1),
60 SV_REG_CSR(1, 2, 0, 2, 1) )
61 SET_SV_VL(3)
62
63 mv a1, sp
64 la sp, data;
65
66 .option push;
67 .option rvc;
68 .align 2;
69 c.lwsp a2, 0(sp);
70 #lw a2, 0(sp);
71 .option pop
72
73
74 SET_SV_VL(1)
75 CLR_SV_CSRS()
76 SET_SV_MVL(1)
77
78 mv sp, a1
79
80 TEST_SV_IMM(a2, 1001)
81 TEST_SV_IMM(a3, 1002)
82 TEST_SV_IMM(a4, 1005)
83
84 .option pop
85
86 RVTEST_PASS # Signal success.
87 fail:
88 RVTEST_FAIL
89
90 RVTEST_CODE_END # End of test code.
91
92 .data
93 data:
94 .word 1001;
95 .word 1002;
96 .word 1005;
97
98 RVTEST_DATA_BEGIN
99
100 RVTEST_DATA_END