src/peripherals/sdmmc/sdcard_dummy.bsv

   1 /*
   2 Copyright (c) 2013, IIT Madras All rights reserved.
   3
   4 Redistribution and use in source and binary forms, with or without modification, are permitted
   5 provided that the following conditions are met:
   6
   7 * Redistributions of source code must retain the above copyright notice, this list of conditions
   8   and the following disclaimer.
   9 * Redistributions in binary form must reproduce the above copyright notice, this list of
  10   conditions and the following disclaimer in the documentation and/or other materials provided
  11  with the distribution.
  12 * Neither the name of IIT Madras  nor the names of its contributors may be used to endorse or
  13   promote products derived from this software without specific prior written permission.
  14
  15 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS
  16 OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
  17 AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
  18 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19 DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  20 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  21 IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  22 OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  23 --------------------------------------------------------------------------------------------------
  24
  25 Author: Neel Gala
  26 Email id: neelgala@gmail.com
  27 Details:
  28
  29 --------------------------------------------------------------------------------------------------
  30 */
  31 package sdcard_dummy;
  32   `include "instance_defines.bsv"
  33   import ClockDiv::*;
  34   import ConcatReg::*;
  35         import Semi_FIFOF::*;
  36         import BUtils ::*;
  37         import AXI4_Lite_Types::*;
  38
  39   interface Ifc_sdcard_dummy;
  40           interface AXI4_Lite_Slave_IFC#(`ADDR, `DATA, `USERSPACE) slave;
  41     method  Bit#(1) cmd;
  42     method  Bit#(1) clk;
  43     method  Bit#(1) d0_out;
  44     method  Bit#(1) d0_outen;
  45     method  Action d0_in(Bit#(1) in);
  46     method  Bit#(1) d1_out;
  47     method  Bit#(1) d1_outen;
  48     method  Action d1_in(Bit#(1) in);
  49     method  Bit#(1) d2_out;
  50     method  Bit#(1) d2_outen;
  51     method  Action d2_in(Bit#(1) in);
  52     method  Bit#(1) d3_out;
  53     method  Bit#(1) d3_outen;
  54     method  Action d3_in(Bit#(1) in);
  55   endinterface
  56   (*synthesize*)
  57   module mksdcard_dummy(Ifc_sdcard_dummy);
  58                 AXI4_Lite_Slave_Xactor_IFC#(`ADDR,`DATA, `USERSPACE) s_xactor<-mkAXI4_Lite_Slave_Xactor();
  59       Reg#(Bit#(1)) rg_cmd <- mkReg(0);
  60       Reg#(Bit#(1)) rg_clk <- mkReg(0);
  61       Reg#(Bit#(1)) rg_d0_out <- mkReg(0);
  62       Reg#(Bit#(1)) rg_d0_outen <- mkReg(0);
  63       Reg#(Bit#(1)) rg_d0_in <- mkReg(0);
  64       Reg#(Bit#(1)) rg_d1_out <- mkReg(0);
  65       Reg#(Bit#(1)) rg_d1_outen <- mkReg(0);
  66       Reg#(Bit#(1)) rg_d1_in <- mkReg(0);
  67       Reg#(Bit#(1)) rg_d2_out <- mkReg(0);
  68       Reg#(Bit#(1)) rg_d2_outen <- mkReg(0);
  69       Reg#(Bit#(1)) rg_d2_in <- mkReg(0);
  70       Reg#(Bit#(1)) rg_d3_out <- mkReg(0);
  71       Reg#(Bit#(1)) rg_d3_outen <- mkReg(0);
  72       Reg#(Bit#(1)) rg_d3_in <- mkReg(0);
  73     method  cmd = rg_cmd;
  74     method  clk = rg_clk;
  75     method  d0_out=rg_d0_out;
  76     method  d0_outen=rg_d0_outen;
  77     method  Action d0_in(Bit#(1) in);
  78       rg_d0_in<= in;
  79     endmethod
  80     method  d1_out=rg_d1_out;
  81     method  d1_outen=rg_d1_outen;
  82     method  Action d1_in(Bit#(1) in);
  83       rg_d1_in<= in;
  84     endmethod
  85     method  d2_out=rg_d2_out;
  86     method  d2_outen=rg_d2_outen;
  87     method  Action d2_in(Bit#(1) in);
  88       rg_d2_in<= in;
  89     endmethod
  90     method  d3_out=rg_d3_out;
  91     method  d3_outen=rg_d3_outen;
  92     method  Action d3_in(Bit#(1) in);
  93       rg_d3_in<= in;
  94     endmethod
  95     interface slave=s_xactor.axi_side;
  96   endmodule
  97 endpackage