src/soc/fu/div/pipeline.py

   1 from nmutil.singlepipe import ControlBase
   2 from nmutil.pipemodbase import PipeModBaseChain
   3 from soc.fu.alu.input_stage import ALUInputStage
   4 from soc.fu.logical.main_stage import LogicalMainStage
   5 from soc.fu.alu.output_stage import ALUOutputStage
   6
   7
   8 class DivStagesStart(PipeModBaseChain):
   9     def get_chain(self):
  10         inp = ALUInputStage(self.pspec)
  11         main = DivMainStage1(self.pspec)
  12         return [inp, main, out]
  13
  14 class DivStagesEnd(PipeModBaseChain):
  15     def get_chain(self):
  16         main = DivMainStage2(self.pspec)
  17         out = ALUOutputStage(self.pspec)
  18         return [inp, main, out]
  19
  20
  21 class LogicalBasePipe(ControlBase):
  22     def __init__(self, pspec):
  23         ControlBase.__init__(self)
  24         self.pipe1 = DivStagesStart(pspec)
  25         self.pipe5 = DivStagesEnd(pspec)
  26         self._eqs = self.connect([self.pipe1, self.pipe5])
  27
  28     def elaborate(self, platform):
  29         m = ControlBase.elaborate(self, platform)
  30         m.submodules.pipe1 = self.pipe1
  31         m.submodules.pipe5 = self.pipe5
  32         m.d.comb += self._eqs
  33         return m